把龙芯1c的SPI接口改为RTT统一的SPI接口

2 files changed, 100 insertions, 137 deletions

diff --git a/bsp/ls1cdev/libraries/ls1c_spi.c b/bsp/ls1cdev/libraries/ls1c_spi.c
index 8547626c30..7da50e1c37 100644
--- a/bsp/ls1cdev/libraries/ls1c_spi.c
+++ b/bsp/ls1cdev/libraries/ls1c_spi.c
@@ -32,53 +32,13 @@
 #include "ls1c_spi.h"
 
 
-// �Ĵ���ƫ��
-#define LS1C_SPI_SPCR_OFFSET                (0)     // ���ƼĴ���
-#define LS1C_SPI_SPSR_OFFSET                (1)     // ״̬�Ĵ���
-#define LS1C_SPI_TxFIFO_OFFSET              (2)     // ���͵����ݼĴ�������������ݼĴ�����ƫ����ͬ
-#define LS1C_SPI_RxFIFO_OFFSET              (2)     // ���յ����ݼĴ������뷢�����ݼĴ�����ƫ����ͬ
-#define LS1C_SPI_SPER_OFFSET                (3)     // �ⲿ�Ĵ���
-#define LS1C_SPI_SFC_PARAM_OFFSET           (4)     // �������ƼĴ���
-#define LS1C_SPI_SFC_SOFTCS_OFFSET          (5)     // Ƭѡ���ƼĴ���
-#define LS1C_SPI_SFC_TIMING_OFFSET          (6)     // ʱ����ƼĴ���
-
-// �Ĵ���SPCR�е�λ��
-#define LS1C_SPI_SPCR_SPIE_BIT              (7)
-#define LS1C_SPI_SPCR_SPIE_MASK             (0x01 << LS1C_SPI_SPCR_SPIE_BIT)
-#define LS1C_SPI_SPCR_SPE_BIT               (6)
-#define LS1C_SPI_SPCR_SPE_MASK              (0x01 << LS1C_SPI_SPCR_SPE_BIT)
-#define LS1C_SPI_SPCR_CPOL_BIT              (3)
-#define LS1C_SPI_SPCR_CPOL_MASK             (0x01 << LS1C_SPI_SPCR_CPOL_BIT)
-#define LS1C_SPI_SPCR_CPHA_BIT              (2)
-#define LS1C_SPI_SPCR_CPHA_MASK             (0x01 << LS1C_SPI_SPCR_CPHA_BIT)
-#define LS1C_SPI_SPCR_SPR_BIT               (0)
-#define LS1C_SPI_SPCR_SPR_MASK              (0x03 << LS1C_SPI_SPCR_SPR_BIT)
-
-// �Ĵ���SPSR�е�λ��
-#define LS1C_SPI_SPSR_SPIF_BIT              (7)
-#define LS1C_SPI_SPSR_SPIF_MASK             (0x01 << LS1C_SPI_SPSR_SPIF_BIT)
-#define LS1C_SPI_SPSR_WCOL_BIT              (6)
-#define LS1C_SPI_SPSR_WCOL_MASK             (0x01 << LS1C_SPI_SPSR_WCOL_BIT)
-
-// �Ĵ���SPER�е�λ��
-#define LS1C_SPI_SPER_SPRE_BIT              (0)
-#define LS1C_SPI_SPER_SPRE_MASK             (0x3 << LS1C_SPI_SPER_SPRE_BIT)
-
-// �Ĵ���SFC_SOFTCS��λ��
-#define LS1C_SPI_SFC_SOFTCS_CSN_BIT         (4)
-#define LS1C_SPI_SFC_SOFTCS_CSN_MASK        (0x0f << LS1C_SPI_SFC_SOFTCS_CSN_BIT)
-#define LS1C_SPI_SFC_SOFTCS_CSEN_BIT        (0)
-#define LS1C_SPI_SFC_SOFTCS_CSEN_MASK       (0x0f << LS1C_SPI_SFC_SOFTCS_CSEN_BIT)
-
-// ���ͳ�ʱ������ֵ
-#define LS1C_SPI_TX_TIMEOUT                 (20000)
 
 
 /*
  * ��ȡָ��SPIģ��Ļ���ַ
  * @SPIx SPIģ��ı��
  */
-inline void *spi_get_base(ls1c_spi_t SPIx)
+inline void *ls1c_spi_get_base(unsigned char SPIx)
 {
     void *base = NULL;
 
@@ -103,15 +63,12 @@ inline void *spi_get_base(ls1c_spi_t SPIx)
 
 /*
  * ��ӡָ��SPIģ������мĴ�����ֵ
- * @spi_info_p SPIģ����Ϣ
+ * @spi_base ����ַ
  */
-void spi_print_all_regs_info(ls1c_spi_info_t *spi_info_p)
+void ls1c_spi_print_all_regs_info(void *spi_base)
 {
-    void *spi_base = spi_get_base(spi_info_p->SPIx);
-
-    rt_kprintf("[%s] SPI%d's info:\r\n\
-              SPCR=0x%x, SPSR=0x%x, SPER=0x%x, SFC_PARAM=0x%x, SFC_SOFTCS=0x%x, SFC_TIMING=0x%x\r\n",
-              __FUNCTION__, spi_info_p->SPIx,
+    rt_kprintf("[%s] SPCR=0x%x, SPSR=0x%x, SPER=0x%x, SFC_PARAM=0x%x, SFC_SOFTCS=0x%x, SFC_TIMING=0x%x\r\n",
+              __FUNCTION__, 
               reg_read_8(spi_base + LS1C_SPI_SPCR_OFFSET),
               reg_read_8(spi_base + LS1C_SPI_SPSR_OFFSET),
               reg_read_8(spi_base + LS1C_SPI_SPER_OFFSET),
@@ -128,7 +85,7 @@ void spi_print_all_regs_info(ls1c_spi_info_t *spi_info_p)
  * @max_speed_hz SPI���ͨ���ٶ�
  * @ret ��Ƶϵ��
  */
-unsigned int spi_get_div(unsigned int max_speed_hz)
+unsigned int ls1c_spi_get_div(unsigned int max_speed_hz)
 {
     unsigned long clk = 0;
     unsigned int div = 0;
@@ -189,16 +146,16 @@ unsigned int spi_get_div(unsigned int max_speed_hz)
 
 /*
  * ����ʱ��
- * @spi_info_p SPIģ����Ϣ
+ * @spi_base ����ַ
+ * @max_hz ���Ƶ�ʣ���λhz
  */
-void spi_set_clock(ls1c_spi_info_t *spi_info_p)
+void ls1c_spi_set_clock(void *spi_base, unsigned long max_hz)
 {
-    void *spi_base = spi_get_base(spi_info_p->SPIx);
     unsigned int div = 0;
     unsigned char val = 0;
 
     // ��ȡ��Ƶϵ��
-    div = spi_get_div(spi_info_p->max_speed_hz);
+    div = ls1c_spi_get_div(max_hz);
 
     // ����spr
     val = reg_read_8(spi_base + LS1C_SPI_SPCR_OFFSET);
@@ -218,22 +175,23 @@ void spi_set_clock(ls1c_spi_info_t *spi_info_p)
 
 /*
  * ����ͨ��ģʽ(ʱ�Ӽ��Ժ���λ)
- * @spi_info_p SPIģ����Ϣ
+ * @spi_base ����ַ
+ * @cpol ʱ�Ӽ���
+ * @cpha ʱ����λ
  */
-void spi_set_mode(ls1c_spi_info_t *spi_info_p)
+void ls1c_spi_set_mode(void *spi_base, unsigned char cpol, unsigned char cpha)
 {
-    void *spi_base = spi_get_base(spi_info_p->SPIx);
     unsigned char val = 0;
 
     val = reg_read_8(spi_base + LS1C_SPI_SPCR_OFFSET);
     
     // ����ʱ�Ӽ���--cpol
-    val &= (~LS1C_SPI_SPCR_CPOL_MASK);                      // cpol��0
-    val |= (spi_info_p->cpol << LS1C_SPI_SPCR_CPOL_BIT);    // д���µ�cpol
+    val &= (~LS1C_SPI_SPCR_CPOL_MASK);                  // cpol��0
+    val |= (cpol << LS1C_SPI_SPCR_CPOL_BIT);            // д���µ�cpol
     
     // ����ʱ����λ--cpha
-    val &= (~LS1C_SPI_SPCR_CPHA_MASK);                      // cpha��0
-    val |= (spi_info_p->cpha << LS1C_SPI_SPCR_CPHA_BIT);    // д���µ�cpha
+    val &= (~LS1C_SPI_SPCR_CPHA_MASK);                  // cpha��0
+    val |= (cpha << LS1C_SPI_SPCR_CPHA_BIT);            // д���µ�cpha
     
     reg_write_8(val, spi_base + LS1C_SPI_SPCR_OFFSET);
 
@@ -243,13 +201,12 @@ void spi_set_mode(ls1c_spi_info_t *spi_info_p)
 
 /*
  * ����ָ��ƬѡΪָ��״̬
- * @spi_info_p SPIģ����Ϣ
+ * @spi_base ����ַ
+ * @cs Ƭѡ
  * @new_status Ƭѡ���ŵ���״̬��ȡֵΪ0��1�����ߵ�ƽ��͵�ƽ
  */
-void spi_set_cs(ls1c_spi_info_t *spi_info_p, int new_status)
+void ls1c_spi_set_cs(void *spi_base, unsigned char cs, int new_status)
 {
-    void *spi_base = spi_get_base(spi_info_p->SPIx);
-    unsigned char cs = spi_info_p->cs;
     unsigned char val = 0;
 
     val = 0xf0 | (0x01 << cs);          // ȫ��csn=1��ָ����csen=1
@@ -268,50 +225,11 @@ void spi_set_cs(ls1c_spi_info_t *spi_info_p, int new_status)
 
 
 /*
- * ��ʼ��ָ��SPIģ��
- * @spi_info_p SPIģ����Ϣ
- */
-void spi_init(ls1c_spi_info_t *spi_info_p)
-{
-    void *spi_base = spi_get_base(spi_info_p->SPIx);
-    unsigned char val = 0;
-
-    // ʹ��SPI��������masterģʽ���ر��ж�
-    reg_write_8(0x53, spi_base + LS1C_SPI_SPCR_OFFSET);
-
-    // ���״̬�Ĵ���
-    reg_write_8(0xc0, spi_base + LS1C_SPI_SPSR_OFFSET);
-
-    // 1�ֽڲ����жϣ�����(��)�뷢��(д)ʱ��ͬʱ
-    reg_write_8(0x03, spi_base + LS1C_SPI_SPER_OFFSET);
-
-    // �ر�SPI flash
-    val = reg_read_8(spi_base + LS1C_SPI_SFC_PARAM_OFFSET);
-    val &= 0xfe;
-    reg_write_8(val, spi_base + LS1C_SPI_SFC_PARAM_OFFSET);
-
-    // spi flashʱ����ƼĴ���
-    reg_write_8(0x05, spi_base + LS1C_SPI_SFC_TIMING_OFFSET);
-
-    // ����ʱ��
-    spi_set_clock(spi_info_p);
-
-    // ����ͨ��ģʽ(ʱ�Ӽ��Ժ���λ)
-    spi_set_mode(spi_info_p);
-
-    // ��ӡ�Ĵ�����Ϣ(���ڵ���)
-//    spi_print_all_regs_info(spi_info_p);
-
-    return ;
-}
-
-
-/*
  * �ȴ��շ����
+ * @spi_base ����ַ
  */
-inline void spi_wait_txrx_done(ls1c_spi_info_t *spi_info_p)
+inline void ls1c_spi_wait_txrx_done(void *spi_base)
 {
-    void *spi_base = spi_get_base(spi_info_p->SPIx);
     int timeout = LS1C_SPI_TX_TIMEOUT;
 
     while (timeout--)
@@ -326,10 +244,10 @@ inline void spi_wait_txrx_done(ls1c_spi_info_t *spi_info_p)
 
 /*
  * ���жϺͱ�־λ
+ * @spi_base ����ַ
  */
-inline void spi_clear(ls1c_spi_info_t *spi_info_p)
+inline void ls1c_spi_clear(void *spi_base)
 {
-    void *spi_base = spi_get_base(spi_info_p->SPIx);
     unsigned char val = 0;
 
     // ���ж�
@@ -356,20 +274,19 @@ inline void spi_clear(ls1c_spi_info_t *spi_info_p)
  * ע�⣬�ڶ������ϵͳ�У��˺�����Ҫ���⡣
  * ����֤�ں�ij�����豸�շ�ij���ֽڵĹ����У����ܱ��л�����������ͬʱ���������ͬһ��SPI�����ϵĴ��豸ͨ��
  * ��Ϊ��о1c��ÿ·SPI�Ͽ��ܽ��в�ͬ�Ĵ��豸��ͨ��Ƶ�ʡ�ģʽ�ȿ��ܲ�ͬ
- * @spi_info_p SPI�ӿ�
+ * @spi_base ����ַ
  * @tx_ch �����͵�����
  * @ret �յ�������
  */
-unsigned char spi_txrx_byte(ls1c_spi_info_t *spi_info_p, unsigned char tx_ch)
+unsigned char ls1c_spi_txrx_byte(void *spi_base, unsigned char tx_ch)
 {
-    void *spi_base = spi_get_base(spi_info_p->SPIx);
     unsigned char rx_ch = 0;
 
     // �շ�����
     reg_write_8(tx_ch, spi_base + LS1C_SPI_TxFIFO_OFFSET);      // ��ʼ����
-    spi_wait_txrx_done(spi_info_p);                             // �ȴ��շ����
+    ls1c_spi_wait_txrx_done(spi_base);                          // �ȴ��շ����
     rx_ch = reg_read_8(spi_base + LS1C_SPI_RxFIFO_OFFSET);      // ��ȡ�յ�������
-    spi_clear(spi_info_p);                                      // ���жϺͱ�־λ
+    ls1c_spi_clear(spi_base);                                   // ���жϺͱ�־λ
 
     return rx_ch;
 }
diff --git a/bsp/ls1cdev/libraries/ls1c_spi.h b/bsp/ls1cdev/libraries/ls1c_spi.h
index 6b041b19c1..8046127de7 100644
--- a/bsp/ls1cdev/libraries/ls1c_spi.h
+++ b/bsp/ls1cdev/libraries/ls1c_spi.h
@@ -29,15 +29,10 @@
 
 
 // SPIģ����
-typedef enum
-{
-    LS1C_SPI_0 = 0,
-    LS1C_SPI_1,
-}ls1c_spi_t;
-
+#define LS1C_SPI_0                      (0)
+#define LS1C_SPI_1                      (1)
 
 // Ƭѡ
-#define LS1C_SPI_INVALID_CS             (-1)
 #define LS1C_SPI_CS_0                   (0)
 #define LS1C_SPI_CS_1                   (1)
 #define LS1C_SPI_CS_2                   (2)
@@ -50,31 +45,80 @@ typedef enum
 #define SPI_CPHA_0                      (0)
 
 
-// Ӳ��SPI��Ϣ
-typedef struct
-{
-    ls1c_spi_t SPIx;                    // SPIģ����
-    unsigned long max_speed_hz;         // ���ͨ���ٶȣ���λhz
-    unsigned char cs;                   // Ƭѡ
-    unsigned char cpol;                 // ʱ�Ӽ���
-    unsigned char cpha;                 // ʱ����λ
-}ls1c_spi_info_t;
+// �Ĵ���ƫ��
+#define LS1C_SPI_SPCR_OFFSET                (0)     // ���ƼĴ���
+#define LS1C_SPI_SPSR_OFFSET                (1)     // ״̬�Ĵ���
+#define LS1C_SPI_TxFIFO_OFFSET              (2)     // ���͵����ݼĴ�������������ݼĴ�����ƫ����ͬ
+#define LS1C_SPI_RxFIFO_OFFSET              (2)     // ���յ����ݼĴ������뷢�����ݼĴ�����ƫ����ͬ
+#define LS1C_SPI_SPER_OFFSET                (3)     // �ⲿ�Ĵ���
+#define LS1C_SPI_SFC_PARAM_OFFSET           (4)     // �������ƼĴ���
+#define LS1C_SPI_SFC_SOFTCS_OFFSET          (5)     // Ƭѡ���ƼĴ���
+#define LS1C_SPI_SFC_TIMING_OFFSET          (6)     // ʱ����ƼĴ���
+
+// �Ĵ���SPCR�е�λ��
+#define LS1C_SPI_SPCR_SPIE_BIT              (7)
+#define LS1C_SPI_SPCR_SPIE_MASK             (0x01 << LS1C_SPI_SPCR_SPIE_BIT)
+#define LS1C_SPI_SPCR_SPE_BIT               (6)
+#define LS1C_SPI_SPCR_SPE_MASK              (0x01 << LS1C_SPI_SPCR_SPE_BIT)
+#define LS1C_SPI_SPCR_CPOL_BIT              (3)
+#define LS1C_SPI_SPCR_CPOL_MASK             (0x01 << LS1C_SPI_SPCR_CPOL_BIT)
+#define LS1C_SPI_SPCR_CPHA_BIT              (2)
+#define LS1C_SPI_SPCR_CPHA_MASK             (0x01 << LS1C_SPI_SPCR_CPHA_BIT)
+#define LS1C_SPI_SPCR_SPR_BIT               (0)
+#define LS1C_SPI_SPCR_SPR_MASK              (0x03 << LS1C_SPI_SPCR_SPR_BIT)
+
+// �Ĵ���SPSR�е�λ��
+#define LS1C_SPI_SPSR_SPIF_BIT              (7)
+#define LS1C_SPI_SPSR_SPIF_MASK             (0x01 << LS1C_SPI_SPSR_SPIF_BIT)
+#define LS1C_SPI_SPSR_WCOL_BIT              (6)
+#define LS1C_SPI_SPSR_WCOL_MASK             (0x01 << LS1C_SPI_SPSR_WCOL_BIT)
+
+// �Ĵ���SPER�е�λ��
+#define LS1C_SPI_SPER_SPRE_BIT              (0)
+#define LS1C_SPI_SPER_SPRE_MASK             (0x3 << LS1C_SPI_SPER_SPRE_BIT)
+
+// �Ĵ���SFC_SOFTCS��λ��
+#define LS1C_SPI_SFC_SOFTCS_CSN_BIT         (4)
+#define LS1C_SPI_SFC_SOFTCS_CSN_MASK        (0x0f << LS1C_SPI_SFC_SOFTCS_CSN_BIT)
+#define LS1C_SPI_SFC_SOFTCS_CSEN_BIT        (0)
+#define LS1C_SPI_SFC_SOFTCS_CSEN_MASK       (0x0f << LS1C_SPI_SFC_SOFTCS_CSEN_BIT)
+
+// ���ͳ�ʱ������ֵ
+#define LS1C_SPI_TX_TIMEOUT                 (20000)
+
+
 
+/*
+ * ��ȡָ��SPIģ��Ļ���ַ
+ * @SPIx SPIģ��ı��
+ */
+inline void *ls1c_spi_get_base(unsigned char SPIx);
+
+
+/*
+ * ����ʱ��
+ * @spi_base ����ַ
+ * @max_hz ���Ƶ�ʣ���λhz
+ */
+void ls1c_spi_set_clock(void *spi_base, unsigned long max_hz);
 
 
 /*
- * ��ʼ��ָ��SPIģ��
- * @spi_info_p SPIģ����Ϣ
+ * ����ͨ��ģʽ(ʱ�Ӽ��Ժ���λ)
+ * @spi_base ����ַ
+ * @cpol ʱ�Ӽ���
+ * @cpha ʱ����λ
  */
-void spi_init(ls1c_spi_info_t *spi_info_p);
+void ls1c_spi_set_mode(void *spi_base, unsigned char cpol, unsigned char cpha);
 
 
 /*
  * ����ָ��ƬѡΪָ��״̬
- * @spi_info_p SPIģ����Ϣ
+ * @spi_base ����ַ
+ * @cs Ƭѡ
  * @new_status Ƭѡ���ŵ���״̬��ȡֵΪ0��1�����ߵ�ƽ��͵�ƽ
  */
-void spi_set_cs(ls1c_spi_info_t *spi_info_p, int new_status);
+void ls1c_spi_set_cs(void *spi_base, unsigned char cs, int new_status);
 
 
 /*
@@ -82,18 +126,20 @@ void spi_set_cs(ls1c_spi_info_t *spi_info_p, int new_status);
  * ע�⣬�ڶ������ϵͳ�У��˺�����Ҫ���⡣
  * ����֤�ں�ij�����豸�շ�ij���ֽڵĹ����У����ܱ��л�����������ͬʱ���������ͬһ��SPI�����ϵĴ��豸ͨ��
  * ��Ϊ��о1c��ÿ·SPI�Ͽ��ܽ��в�ͬ�Ĵ��豸��ͨ��Ƶ�ʡ�ģʽ�ȿ��ܲ�ͬ
- * @spi_info_p SPI�ӿ�
+ * @spi_base ����ַ
  * @tx_ch �����͵�����
  * @ret �յ�������
  */
-unsigned char spi_txrx_byte(ls1c_spi_info_t *spi_info_p, unsigned char tx_ch);
+unsigned char ls1c_spi_txrx_byte(void *spi_base, unsigned char tx_ch);
 
 
 /*
  * ��ӡָ��SPIģ������мĴ�����ֵ
- * @spi_info_p SPIģ����Ϣ
+ * @spi_base ����ַ
  */
-void spi_print_all_regs_info(ls1c_spi_info_t *spi_info_p);
+void ls1c_spi_print_all_regs_info(void *spi_base);
+
+
 
 
 #endif