Add Microchip SAM series MCU support for RT-Thread (#5771)

* Add Microchip SAM series MCU support for RT-Thread

Add Microchip SAM series MCU support for RT-Thread, including SAM Cortex-M0+, M4F and M7.

* Add bsp directory to ignored check list

Add bsp directory to ignored check list, add microchip /samc21/same54/same70 to workflows list

* remove STDIO definition and bug fix

1. remove STDIO code from Microchip official BSP. 2. bug fix of SAME70 hpl/hpl_usart.c, samc21&same54 hpl/hpl_sercom.c baudrate update interface.  3. Add RT-Thread standard STDIO implementation on Microchip SAM MCU.

* add CAN driver & example and script fix

Add CAN driver and example for SAMC21/SAME5x/SAME70 and fix rtconfig.py issue(unused space might result link error)

* Add Chinese version README

Add Chinese version README for SAMC21/E54/E70

6 files changed, 464 insertions, 0 deletions

diff --git a/bsp/microchip/same54/board/Kconfig b/bsp/microchip/same54/board/Kconfig
new file mode 100644
index 0000000000..33a8121227
--- /dev/null
+++ b/bsp/microchip/same54/board/Kconfig
@@ -0,0 +1,52 @@
+menu "Hardware Drivers Config"
+
+choice
+    prompt "select chip type"
+    default SOC_SAME54P20
+
+    config SOC_SAME54P20
+    bool "SOC_SAME54P20"
+    help
+        Refer to SAME54 DataSheet
+
+    config SOC_SAME54N20
+    bool "SOC_SAME54N20"
+    help
+        Refer to SAME54 DataSheet
+
+    config SOC_SAME53J20
+    bool "SOC_SAME53J20"
+    help
+        Refer to SAME54 DataSheet
+
+endchoice 
+endmenu
+
+menu "Onboard Peripheral Drivers"
+    depends on SOC_SAME54P20 || SOC_SAME54N20
+
+    config SAME5X_CAN0
+        bool "Enable CAN0"
+        default false
+
+    config SAME5X_ADC0
+        bool "Enable ADC0"
+        default false
+endmenu
+
+menu "Application Demo Config"
+    config SAM_CAN_EXAMPLE
+        bool "Enable SAM CAN Example"
+        depends on SAME5X_CAN0
+        default true
+        help
+            Add CAN example task to project
+
+    config SAM_ADC_EXAMPLE
+        bool "Enable SAM ADC Example"
+        depends on SAME5X_ADC0
+        default true
+        help
+            Add ADC example task to project
+
+endmenu
diff --git a/bsp/microchip/same54/board/SConscript b/bsp/microchip/same54/board/SConscript
new file mode 100644
index 0000000000..3c6e1cad63
--- /dev/null
+++ b/bsp/microchip/same54/board/SConscript
@@ -0,0 +1,17 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd = GetCurrentDir()
+src = Glob('*.c')
+CPPPATH = [cwd]
+
+#remove other no use files
+#SrcRemove(src, '*.c')
+
+# You can select chips from the list above
+CPPDEFINES = ['SAME54xxx']
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES)
+
+Return('group')
\ No newline at end of file
diff --git a/bsp/microchip/same54/board/board.c b/bsp/microchip/same54/board/board.c
new file mode 100644
index 0000000000..72f31efa6b
--- /dev/null
+++ b/bsp/microchip/same54/board/board.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c)
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date        Author    Email                    Notes
+ * 2019-07-16  Kevin.Liu [email protected] First Release
+ */
+
+#include <string.h>
+
+#include <atmel_start.h>
+#include "peripheral_clk_config.h"
+
+#include <rtthread.h>
+#include "board.h"
+
+#ifdef RT_USING_SERIAL
+extern int rt_hw_uart_init(void);
+#endif
+
+static struct io_descriptor* g_stdio;
+
+void rt_hw_console_output(const char *str)
+{
+    io_write(g_stdio, (uint8_t *)str, strlen(str));
+}
+RTM_EXPORT(rt_hw_console_output);
+
+static inline void hw_board_init_usart(void)
+{
+    usart_sync_get_io_descriptor(&TARGET_IO, &g_stdio);
+    usart_sync_enable(&TARGET_IO);
+}
+
+/**
+ * This is the timer interrupt service routine.
+ *
+ */
+void SysTick_Handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    rt_tick_increase();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+/**
+ * This function will initial SAME54 board.
+ */
+void rt_hw_board_init(void)
+{
+    /* Initializes MCU, drivers and middleware */
+    atmel_start_init();
+
+    /* enable USART stdout module */
+    hw_board_init_usart();
+
+    /* UART driver initialization is open by default */
+#ifdef RT_USING_SERIAL
+    rt_hw_uart_init();
+#endif
+
+    /* init systick */
+    SysTick_Config(CONF_CPU_FREQUENCY / RT_TICK_PER_SECOND);
+
+    /* set pend exception priority */
+    NVIC_SetPriority(PendSV_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
+
+#ifdef RT_USING_HEAP
+    #if defined(__CC_ARM) || defined(__CLANG_ARM)
+        rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)HEAP_END);
+    #elif __ICCARM__
+        rt_system_heap_init((void*)HEAP_BEGIN, (void*)HEAP_END);
+    #else
+        /* init memory system */
+        rt_system_heap_init((void*)&__bss_end, (void*)HEAP_END);
+    #endif
+#endif
+
+    /* Set the shell console output device */
+#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif
+
+#ifdef RT_USING_COMPONENTS_INIT
+    rt_components_board_init();
+#endif
+}
+
+/*@}*/
diff --git a/bsp/microchip/same54/board/board.h b/bsp/microchip/same54/board/board.h
new file mode 100644
index 0000000000..e0bf12cb83
--- /dev/null
+++ b/bsp/microchip/same54/board/board.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c)
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date        Author    Email                    Notes
+ * 2019-07-16  Kevin.Liu [email protected] First Release
+ */
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+// <o> Internal SRAM memory size[Kbytes] <128-256>
+//  <i>Default: 256
+#if   defined(__SAME54N19A__) || defined(__ATSAME54N19A__)
+  #define SAME5x_SRAM_SIZE   192
+#elif defined(__SAME54N20A__) || defined(__ATSAME54N20A__)
+  #define SAME5x_SRAM_SIZE   256
+#elif defined(__SAME54P19A__) || defined(__ATSAME54P19A__)
+  #define SAME5x_SRAM_SIZE   192
+#elif defined(__SAME54P20A__) || defined(__ATSAME54P20A__)
+  #define SAME5x_SRAM_SIZE   256
+#elif defined(__SAME53J18A__) || defined(__ATSAME53J18A__)
+  #define SAME5x_SRAM_SIZE   128
+#elif defined(__SAME53J19A__) || defined(__ATSAME53J19A__)
+  #define SAME5x_SRAM_SIZE   192
+#elif defined(__SAME53J20A__) || defined(__ATSAME53J20A__)
+  #define SAME5x_SRAM_SIZE   256
+#elif defined(__SAME53N19A__) || defined(__ATSAME53N19A__)
+  #define SAME5x_SRAM_SIZE   192
+#elif defined(__SAME53N20A__) || defined(__ATSAME53N20A__)
+  #define SAME5x_SRAM_SIZE   256
+#elif defined(__SAME51J18A__) || defined(__ATSAME51J18A__)
+  #define SAME5x_SRAM_SIZE   128
+#elif defined(__SAME51J19A__) || defined(__ATSAME51J19A__)
+  #define SAME5x_SRAM_SIZE   192
+#elif defined(__SAME51J20A__) || defined(__ATSAME51J20A__)
+  #define SAME5x_SRAM_SIZE   256
+#elif defined(__SAME51N19A__) || defined(__ATSAME51N19A__)
+  #define SAME5x_SRAM_SIZE   192
+#elif defined(__SAME51N20A__) || defined(__ATSAME51N20A__)
+  #define SAME5x_SRAM_SIZE   256
+#elif defined(__SAMD51J18A__) || defined(__ATSAMD51J18A__)
+  #define SAME5x_SRAM_SIZE   128
+#elif defined(__SAMD51J19A__) || defined(__ATSAMD51J19A__)
+  #define SAME5x_SRAM_SIZE   192
+#elif defined(__SAMD51J20A__) || defined(__ATSAMD51J20A__)
+  #define SAME5x_SRAM_SIZE   256
+#elif defined(__SAMD51N19A__) || defined(__ATSAMD51N19A__)
+  #define SAME5x_SRAM_SIZE   192
+#elif defined(__SAMD51N20A__) || defined(__ATSAMD51N20A__)
+  #define SAME5x_SRAM_SIZE   256
+#elif defined(__SAMD51P19A__) || defined(__ATSAMD51P19A__)
+  #define SAME5x_SRAM_SIZE   192
+#elif defined(__SAMD51P20A__) || defined(__ATSAMD51P20A__)
+  #define SAME5x_SRAM_SIZE   256
+#else
+  #error Board does not support the specified device.
+#endif
+
+#define SAME5x_SRAM_END      (0x20000000 + SAME5x_SRAM_SIZE * 1024)
+
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN    (&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="HEAP"
+#define HEAP_BEGIN    (__segment_begin("HEAP"))
+#define HEAP_END      (__segment_end("HEAP"))
+#else
+extern int __bss_end;
+#define HEAP_BEGIN    (&__bss_end)
+#define HEAP_END      SAME5x_SRAM_END
+#endif
+
+void rt_hw_board_init(void);
+
+#endif
+
diff --git a/bsp/microchip/same54/board/serial.c b/bsp/microchip/same54/board/serial.c
new file mode 100644
index 0000000000..28ba104dbe
--- /dev/null
+++ b/bsp/microchip/same54/board/serial.c
@@ -0,0 +1,199 @@
+/*
+ * Copyright (c)
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date        Author    Email                    Notes
+ * 2019-07-16  Kevin.Liu [email protected] First Release
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+
+#include <atmel_start.h>
+
+/* SAM MCU serial device */
+static struct rt_serial_device sam_serial;
+
+/**
+ * @brief Configure serial port
+ *
+ * This function will configure UART baudrate, parity and so on.
+ *
+ * @return RT_EOK.
+ */
+static rt_err_t serial_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
+{
+    struct usart_sync_descriptor* desc;
+
+    RT_ASSERT(serial != RT_NULL);
+
+    desc = (struct usart_sync_descriptor *)serial->parent.user_data;
+
+    RT_ASSERT(desc != RT_NULL);
+    RT_ASSERT(cfg  != RT_NULL);
+
+    usart_sync_disable(desc);
+
+    /* Set baudrate */
+    usart_sync_set_baud_rate(desc, (const uint32_t)cfg->baud_rate);
+
+    /* Set stop bit */
+    if (cfg->stop_bits == STOP_BITS_1)
+        usart_sync_set_stopbits(desc, USART_STOP_BITS_ONE);
+    else if (cfg->stop_bits == STOP_BITS_2)
+        usart_sync_set_stopbits(desc, USART_STOP_BITS_TWO);
+
+    if (cfg->bit_order == BIT_ORDER_LSB)
+        usart_sync_set_data_order(desc, USART_DATA_ORDER_LSB);
+    else if (cfg->bit_order == BIT_ORDER_MSB)
+        usart_sync_set_data_order(desc, USART_DATA_ORDER_MSB);
+
+    /* Set character size */
+    switch (cfg->data_bits)
+    {
+        case DATA_BITS_5:
+            usart_sync_set_character_size(desc, USART_CHARACTER_SIZE_5BITS);
+            break;
+        case DATA_BITS_6:
+            usart_sync_set_character_size(desc, USART_CHARACTER_SIZE_6BITS);
+            break;
+        case DATA_BITS_7:
+            usart_sync_set_character_size(desc, USART_CHARACTER_SIZE_7BITS);
+            break;
+        case DATA_BITS_8:
+            usart_sync_set_character_size(desc, USART_CHARACTER_SIZE_8BITS);
+            break;
+        case DATA_BITS_9:
+            usart_sync_set_character_size(desc, USART_CHARACTER_SIZE_9BITS);
+            break;
+        default:
+            break;
+    }
+
+    if (cfg->parity == PARITY_NONE)
+        usart_sync_set_parity(desc, USART_PARITY_NONE);
+    else if (cfg->parity == PARITY_ODD)
+        usart_sync_set_parity(desc, USART_PARITY_ODD);
+    else if (cfg->parity == PARITY_EVEN)
+        usart_sync_set_parity(desc, USART_PARITY_EVEN);
+
+    usart_sync_enable(desc);
+
+    return RT_EOK;
+}
+
+/**
+ * @brief Control serial port
+ *
+ * This function provide UART enable/disable control.
+ *
+ * @return RT_EOK.
+ */
+static rt_err_t serial_control(struct rt_serial_device *serial, int cmd, void *arg)
+{
+    struct usart_sync_descriptor* desc;
+
+    RT_ASSERT(serial != RT_NULL);
+    desc = (struct usart_sync_descriptor *)serial->parent.user_data;
+
+    RT_ASSERT(desc != RT_NULL);
+
+    switch (cmd)
+    {
+        /* disable interrupt */
+        case RT_DEVICE_CTRL_CLR_INT:
+            usart_sync_disable(desc);
+            break;
+        /* enable interrupt */
+        case RT_DEVICE_CTRL_SET_INT:
+            usart_sync_enable(desc);
+            break;
+        /* UART config */
+        case RT_DEVICE_CTRL_CONFIG :
+            break;
+    }
+
+    return RT_EOK;
+}
+
+/**
+ * @brief Serial sends a char
+ *
+ * This function will send a char to the UART
+ *
+ * @return 1.
+ */
+static int serial_putc(struct rt_serial_device *serial, char c)
+{
+    struct usart_sync_descriptor* desc;
+
+    RT_ASSERT(serial != RT_NULL);
+    desc = (struct usart_sync_descriptor *)serial->parent.user_data;
+
+    RT_ASSERT(desc != RT_NULL);
+
+    io_write(&desc->io, (const uint8_t *)&c, 1);
+
+    return 1;
+}
+
+/**
+ * @brief Serial gets a char
+ *
+ * This function will get a char from the UART
+ *
+ * @return received char character or -1 if no char received.
+ */
+static int serial_getc(struct rt_serial_device *serial)
+{
+    char c;
+    int ch;
+    struct usart_sync_descriptor* desc;
+
+    RT_ASSERT(serial != RT_NULL);
+    desc = (struct usart_sync_descriptor *)serial->parent.user_data;
+
+    RT_ASSERT(desc != RT_NULL);
+
+    ch = -1;
+    if (usart_sync_is_rx_not_empty(desc))
+    {
+        io_read(&desc->io, (uint8_t *)&c, 1);;
+        ch = c & 0xff;
+    }
+
+    return ch;
+}
+
+static const struct rt_uart_ops sam_serial_ops =
+{
+    serial_configure,
+    serial_control,
+    serial_putc,
+    serial_getc,
+};
+
+/**
+ * @brief Initialize the UART
+ *
+ * This function initialize the UART
+ *
+ * @return None.
+ */
+int rt_hw_uart_init(void)
+{
+    struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
+
+    sam_serial.ops       = &sam_serial_ops;
+    sam_serial.config    = config;
+    sam_serial.serial_rx = RT_NULL;
+    sam_serial.serial_rx = RT_NULL;
+    rt_hw_serial_register(&sam_serial, "uart0",
+                          RT_DEVICE_FLAG_RDWR, (void *)&TARGET_IO);
+
+    return 0;
+}
+
+/*@}*/
diff --git a/bsp/microchip/same54/board/serial.h b/bsp/microchip/same54/board/serial.h
new file mode 100644
index 0000000000..12e6811231
--- /dev/null
+++ b/bsp/microchip/same54/board/serial.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (c)
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date        Author    Email                    Notes
+ * 2019-07-16  Kevin.Liu [email protected] First Release
+ */
+
+#ifndef __BOARD_SERIAL_H_
+#define __BOARD_SERIAL_H_
+
+#include <rtthread.h>
+
+/**
+ * @brief External function definitions
+ *
+ */
+int rt_hw_uart_init(void);
+
+#endif // __BOARD_SERIAL_H_