Merge pull request #4737 from mysterywolf/3,1,xformatv3.1.5

[lts 3.1.x] format codes

11 files changed, 69 insertions, 69 deletions

diff --git a/bsp/qemu-vexpress-a9/drivers/audio/drv_ac97.c b/bsp/qemu-vexpress-a9/drivers/audio/drv_ac97.c
index cf88ebed5e..bf6c1604ba 100644
--- a/bsp/qemu-vexpress-a9/drivers/audio/drv_ac97.c
+++ b/bsp/qemu-vexpress-a9/drivers/audio/drv_ac97.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/qemu-vexpress-a9/drivers/audio/drv_ac97.h b/bsp/qemu-vexpress-a9/drivers/audio/drv_ac97.h
index 0d783adef2..8a63b92e4b 100644
--- a/bsp/qemu-vexpress-a9/drivers/audio/drv_ac97.h
+++ b/bsp/qemu-vexpress-a9/drivers/audio/drv_ac97.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -12,33 +12,33 @@
 #define __DRV_AC97_H__
 
 /* Register offsets */
-#define AC97_RESET				0x00
-#define AC97_MASTER				0x02
-#define AC97_HEADPHONE			0x04
-#define AC97_MASTER_MONO		0x06
-#define AC97_MASTER_TONE		0x08
-#define AC97_PC_BEEP			0x0A    //mixer volume
-#define AC97_PHONE				0x0C
-#define AC97_MIC				0x0E    //qwert db
-#define AC97_LINE				0x10		
-#define AC97_CD					0x12
-#define AC97_VIDEO				0x14
-#define AC97_AUX				0x16
-#define AC97_PCM				0x18
-#define AC97_REC_SEL			0x1A	//0 represent mic
-#define AC97_REC_GAIN			0x1C
-#define AC97_REC_GAIN_MIC		0x1E
-#define AC97_GENERAL_PURPOSE	0x20
-#define AC97_3D_CONTROL			0x22
-#define AC97_INT_PAGING			0x24    //qwert
-#define AC97_POWERDOWN			0x26
-#define AC97_PCM_FRONT_DAC_RATE 0x2c	/* PCM Front DAC Rate */
-#define AC97_PCM_SURR_DAC_RATE	0x2e	/* PCM Surround DAC Rate */
-#define AC97_PCM_LFE_DAC_RATE	0x30	/* PCM LFE DAC Rate */
-#define AC97_PCM_LR_ADC_RATE	0x32	/* PCM LR ADC Rate */
-#define AC97_PCM_MIC_ADC_RATE	0x34	/* PCM MIC ADC Rate */
-#define AC97_DAC_SLOT_MAP		0x6C
-#define AC97_ADC_SLOT_MAP		0x6E
+#define AC97_RESET              0x00
+#define AC97_MASTER             0x02
+#define AC97_HEADPHONE          0x04
+#define AC97_MASTER_MONO        0x06
+#define AC97_MASTER_TONE        0x08
+#define AC97_PC_BEEP            0x0A    //mixer volume
+#define AC97_PHONE              0x0C
+#define AC97_MIC                0x0E    //qwert db
+#define AC97_LINE               0x10
+#define AC97_CD                 0x12
+#define AC97_VIDEO              0x14
+#define AC97_AUX                0x16
+#define AC97_PCM                0x18
+#define AC97_REC_SEL            0x1A    //0 represent mic
+#define AC97_REC_GAIN           0x1C
+#define AC97_REC_GAIN_MIC       0x1E
+#define AC97_GENERAL_PURPOSE    0x20
+#define AC97_3D_CONTROL         0x22
+#define AC97_INT_PAGING         0x24    //qwert
+#define AC97_POWERDOWN          0x26
+#define AC97_PCM_FRONT_DAC_RATE 0x2c    /* PCM Front DAC Rate */
+#define AC97_PCM_SURR_DAC_RATE  0x2e    /* PCM Surround DAC Rate */
+#define AC97_PCM_LFE_DAC_RATE   0x30    /* PCM LFE DAC Rate */
+#define AC97_PCM_LR_ADC_RATE    0x32    /* PCM LR ADC Rate */
+#define AC97_PCM_MIC_ADC_RATE   0x34    /* PCM MIC ADC Rate */
+#define AC97_DAC_SLOT_MAP       0x6C
+#define AC97_ADC_SLOT_MAP       0x6E
 
 void ac97_reset(void);
 rt_err_t ac97_set_vol(int vol);
diff --git a/bsp/qemu-vexpress-a9/drivers/audio/drv_pl041.c b/bsp/qemu-vexpress-a9/drivers/audio/drv_pl041.c
index 3498031d7b..ad237bbf08 100644
--- a/bsp/qemu-vexpress-a9/drivers/audio/drv_pl041.c
+++ b/bsp/qemu-vexpress-a9/drivers/audio/drv_pl041.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/qemu-vexpress-a9/drivers/audio/drv_pl041.h b/bsp/qemu-vexpress-a9/drivers/audio/drv_pl041.h
index 0edda3d6ea..33b8ac8258 100644
--- a/bsp/qemu-vexpress-a9/drivers/audio/drv_pl041.h
+++ b/bsp/qemu-vexpress-a9/drivers/audio/drv_pl041.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -14,11 +14,11 @@
 #define PL041_BASE_ADDR    (0x10004000)
 
 /* offsets in CTRL_CH */
-#define AACI_RXCR        0x00	/* 29 bits Control Rx FIFO */
-#define AACI_TXCR        0x04	/* 17 bits Control Tx FIFO */
-#define AACI_SR          0x08	/* 12 bits Status */
-#define AACI_ISR         0x0C	/* 7 bits  Int Status */
-#define AACI_IE          0x10	/* 7 bits  Int Enable */
+#define AACI_RXCR        0x00   /* 29 bits Control Rx FIFO */
+#define AACI_TXCR        0x04   /* 17 bits Control Tx FIFO */
+#define AACI_SR          0x08   /* 12 bits Status */
+#define AACI_ISR         0x0C   /* 7 bits  Int Status */
+#define AACI_IE          0x10   /* 7 bits  Int Enable */
 
 /* both for AACI_RXCR and AACI_TXCR */
 #define AACI_CR_FEN           (1 << 16)  /* fifo enable */
@@ -39,7 +39,7 @@
 #define AACI_CR_SL3           (1 << 3)
 #define AACI_CR_SL2           (1 << 2)
 #define AACI_CR_SL1           (1 << 1)
-#define AACI_CR_EN            (1 << 0)	/* receive enable */
+#define AACI_CR_EN            (1 << 0)  /* receive enable */
 
 /* status register bits */
 #define AACI_SR_RXTOFE        (1 << 11)  /* rx timeout fifo empty */
@@ -66,29 +66,29 @@
 /* interrupt enable */
 #define AACI_IE_RXTOIE        (1 << 6)   /*rx timeout interrupt enable*/
 #define AACI_IE_URIE          (1 << 5)   /*Transmit underrun interrupt enable*/
-#define AACI_IE_ORIE          (1 << 4)	 /*Overrun receive interrupt enable*/
+#define AACI_IE_ORIE          (1 << 4)   /*Overrun receive interrupt enable*/
 #define AACI_IE_RXIE          (1 << 3)   /*Receive interrupt enable*/
 #define AACI_IE_TXIE          (1 << 2)   /*Transmit interrupt enable*/
 #define AACI_IE_RXTIE         (1 << 1)   /*Receive timeout interrupt enable*/
-#define AACI_IE_TXCIE         (1 << 0)	 /*Transmit complete interrupt enable*/
+#define AACI_IE_TXCIE         (1 << 0)   /*Transmit complete interrupt enable*/
 
 /* interrupt status */
-#define AACI_ISR_RXTOFE	(1 << 6)	/* rx timeout fifo empty */
-#define AACI_ISR_UR		(1 << 5)	/* tx fifo underrun */
-#define AACI_ISR_OR		(1 << 4)	/* rx fifo overrun */
-#define AACI_ISR_RX		(1 << 3)	/* rx interrupt status */
-#define AACI_ISR_TX		(1 << 2)	/* tx interrupt status */
-#define AACI_ISR_RXTO	(1 << 1)	/* rx timeout */
-#define AACI_ISR_TXC	(1 << 0)	/* tx complete */
+#define AACI_ISR_RXTOFE (1 << 6)    /* rx timeout fifo empty */
+#define AACI_ISR_UR     (1 << 5)    /* tx fifo underrun */
+#define AACI_ISR_OR     (1 << 4)    /* rx fifo overrun */
+#define AACI_ISR_RX     (1 << 3)    /* rx interrupt status */
+#define AACI_ISR_TX     (1 << 2)    /* tx interrupt status */
+#define AACI_ISR_RXTO   (1 << 1)    /* rx timeout */
+#define AACI_ISR_TXC    (1 << 0)    /* tx complete */
 
 /* interrupt enable */
-#define AACI_IE_RXTOFE	(1 << 6)	/* rx timeout fifo empty */
-#define AACI_IE_UR		(1 << 5)	/* tx fifo underrun */
-#define AACI_IE_OR		(1 << 4)	/* rx fifo overrun */
-#define AACI_IE_RX		(1 << 3)	/* rx interrupt status */
-#define AACI_IE_TX		(1 << 2)	/* tx interrupt status */
-#define AACI_IE_RXTO	(1 << 1)	/* rx timeout */
-#define AACI_IE_TXC		(1 << 0)	/* tx complete */
+#define AACI_IE_RXTOFE  (1 << 6)    /* rx timeout fifo empty */
+#define AACI_IE_UR      (1 << 5)    /* tx fifo underrun */
+#define AACI_IE_OR      (1 << 4)    /* rx fifo overrun */
+#define AACI_IE_RX      (1 << 3)    /* rx interrupt status */
+#define AACI_IE_TX      (1 << 2)    /* tx interrupt status */
+#define AACI_IE_RXTO    (1 << 1)    /* rx timeout */
+#define AACI_IE_TXC     (1 << 0)    /* tx complete */
 
 /* slot flag register bits */
 #define AACI_SLFR_RWIS        (1 << 13)    /* raw wake-up interrupt status */
@@ -120,7 +120,7 @@
 #define AACI_ICLR_RXOEC2      (1 << 2)       /* Receive overrun error clear */
 #define AACI_ICLR_RXOEC1      (1 << 1)       /* Receive overrun error clear */
 #define AACI_ICLR_WISC        (1 << 0)       /* Wake-up interrupt status clear */
-                                
+
 /* Main control register bits AACI_MAINCR */
 #define AACI_MAINCR_SCRA(x)   ((x) << 10)     /* secondary codec reg access */
 #define AACI_MAINCR_DMAEN     (1 << 9)        /* dma enable */
@@ -141,8 +141,8 @@
 #define SYNC_FORCE   (1 << 0)
 
 /* Main flag register bits. P66 */
-#define MAINFR_TXB   (1 << 1)	/* transmit busy */
-#define MAINFR_RXB   (1 << 0)	/* receive busy */
+#define MAINFR_TXB   (1 << 1)   /* transmit busy */
+#define MAINFR_RXB   (1 << 0)   /* receive busy */
 
 #define PL041_CHANNEL_LEFT_DAC    (0x1 << 3)
 #define PL041_CHANNEL_RIGHT_DAC   (0x1 << 3)
diff --git a/bsp/qemu-vexpress-a9/drivers/audio/drv_sound.c b/bsp/qemu-vexpress-a9/drivers/audio/drv_sound.c
index a2b46831b8..226a2cdb51 100644
--- a/bsp/qemu-vexpress-a9/drivers/audio/drv_sound.c
+++ b/bsp/qemu-vexpress-a9/drivers/audio/drv_sound.c
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- * 
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
  * SPDX-License-Identifier: Apache-2.0
  *
  * Date           Author       Notes
diff --git a/bsp/qemu-vexpress-a9/drivers/audio/drv_sound.h b/bsp/qemu-vexpress-a9/drivers/audio/drv_sound.h
index 7cb47532be..0752418495 100644
--- a/bsp/qemu-vexpress-a9/drivers/audio/drv_sound.h
+++ b/bsp/qemu-vexpress-a9/drivers/audio/drv_sound.h
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- * 
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
  * SPDX-License-Identifier: Apache-2.0
  *
  * Date           Author       Notes
diff --git a/bsp/qemu-vexpress-a9/drivers/board.c b/bsp/qemu-vexpress-a9/drivers/board.c
index e236c68b80..8b26e68eab 100644
--- a/bsp/qemu-vexpress-a9/drivers/board.c
+++ b/bsp/qemu-vexpress-a9/drivers/board.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/qemu-vexpress-a9/drivers/drv_timer.c b/bsp/qemu-vexpress-a9/drivers/drv_timer.c
index 7abfea0fae..6d6001b565 100644
--- a/bsp/qemu-vexpress-a9/drivers/drv_timer.c
+++ b/bsp/qemu-vexpress-a9/drivers/drv_timer.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -89,7 +89,7 @@ void timer_init(int timer, unsigned int preload)
 {
     uint32_t val;
 
-    if (timer == 0) 
+    if (timer == 0)
     {
         /* Setup Timer0 for generating irq */
         val = TIMER_CTRL(TIMER01_HW_BASE);
@@ -101,8 +101,8 @@ void timer_init(int timer, unsigned int preload)
 
         /* enable timer */
         TIMER_CTRL(TIMER01_HW_BASE) |= TIMER_CTRL_ENABLE;
-    } 
-    else 
+    }
+    else
     {
         /* Setup Timer1 for generating irq */
         val = TIMER_CTRL(TIMER23_HW_BASE);
@@ -122,7 +122,7 @@ void timer_clear_pending(int timer)
     if (timer == 0)
     {
         TIMER_INTCLR(TIMER01_HW_BASE) = 0x01;
-    } 
+    }
     else
     {
         TIMER_INTCLR(TIMER23_HW_BASE) = 0x01;
diff --git a/bsp/qemu-vexpress-a9/drivers/drv_timer.h b/bsp/qemu-vexpress-a9/drivers/drv_timer.h
index 718f5d43cf..c50b073d36 100644
--- a/bsp/qemu-vexpress-a9/drivers/drv_timer.h
+++ b/bsp/qemu-vexpress-a9/drivers/drv_timer.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/qemu-vexpress-a9/drivers/secondary_cpu.c b/bsp/qemu-vexpress-a9/drivers/secondary_cpu.c
index 3b0428859f..cddba63aac 100644
--- a/bsp/qemu-vexpress-a9/drivers/secondary_cpu.c
+++ b/bsp/qemu-vexpress-a9/drivers/secondary_cpu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/qemu-vexpress-a9/drivers/vexpress_a9.h b/bsp/qemu-vexpress-a9/drivers/vexpress_a9.h
index a6467973c5..5ecb8ecf39 100644
--- a/bsp/qemu-vexpress-a9/drivers/vexpress_a9.h
+++ b/bsp/qemu-vexpress-a9/drivers/vexpress_a9.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *