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authorBernard Xiong <[email protected]>2021-05-28 16:20:08 +0800
committerGitHub <[email protected]>2021-05-28 16:20:08 +0800
commit92beddf3bccf6346e26aa097f82464456fb8e6bd (patch)
tree197e4a108118dda016ea02274172f0c40e7ee8ed /bsp/stm32/stm32f769-st-disco
parentb18a99b44240ec3152011e159cc24a5af8dff0ce (diff)
parent03f4d40e30f3c94e1db0b3a65b3610dee695694a (diff)
Merge pull request #4737 from mysterywolf/3,1,xformatv3.1.5
[lts 3.1.x] format codes
Diffstat (limited to 'bsp/stm32/stm32f769-st-disco')
-rw-r--r--bsp/stm32/stm32f769-st-disco/applications/main.c2
-rw-r--r--bsp/stm32/stm32f769-st-disco/board/board.c12
-rw-r--r--bsp/stm32/stm32f769-st-disco/board/board.h2
3 files changed, 8 insertions, 8 deletions
diff --git a/bsp/stm32/stm32f769-st-disco/applications/main.c b/bsp/stm32/stm32f769-st-disco/applications/main.c
index 14a2f68f81..d61afe14c3 100644
--- a/bsp/stm32/stm32f769-st-disco/applications/main.c
+++ b/bsp/stm32/stm32f769-st-disco/applications/main.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
diff --git a/bsp/stm32/stm32f769-st-disco/board/board.c b/bsp/stm32/stm32f769-st-disco/board/board.c
index 97bbbe3076..55126435b1 100644
--- a/bsp/stm32/stm32f769-st-disco/board/board.c
+++ b/bsp/stm32/stm32f769-st-disco/board/board.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -20,14 +20,14 @@ void SystemClock_Config(void)
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
- /** Configure LSE Drive Capability
+ /** Configure LSE Drive Capability
*/
HAL_PWR_EnableBkUpAccess();
- /** Configure the main internal regulator output voltage
+ /** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- /** Initializes the CPU, AHB and APB busses clocks
+ /** Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
@@ -42,13 +42,13 @@ void SystemClock_Config(void)
{
Error_Handler();
}
- /** Activate the Over-Drive mode
+ /** Activate the Over-Drive mode
*/
if (HAL_PWREx_EnableOverDrive() != HAL_OK)
{
Error_Handler();
}
- /** Initializes the CPU, AHB and APB busses clocks
+ /** Initializes the CPU, AHB and APB busses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
diff --git a/bsp/stm32/stm32f769-st-disco/board/board.h b/bsp/stm32/stm32f769-st-disco/board/board.h
index 85c900e4c8..813dd5b27e 100644
--- a/bsp/stm32/stm32f769-st-disco/board/board.h
+++ b/bsp/stm32/stm32f769-st-disco/board/board.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*