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authorBernard Xiong <[email protected]>2021-05-28 16:20:08 +0800
committerGitHub <[email protected]>2021-05-28 16:20:08 +0800
commit92beddf3bccf6346e26aa097f82464456fb8e6bd (patch)
tree197e4a108118dda016ea02274172f0c40e7ee8ed /bsp/x86/drivers/include
parentb18a99b44240ec3152011e159cc24a5af8dff0ce (diff)
parent03f4d40e30f3c94e1db0b3a65b3610dee695694a (diff)
Merge pull request #4737 from mysterywolf/3,1,xformatv3.1.5
[lts 3.1.x] format codes
Diffstat (limited to 'bsp/x86/drivers/include')
-rw-r--r--bsp/x86/drivers/include/bsp.h176
-rw-r--r--bsp/x86/drivers/include/grub.h80
2 files changed, 128 insertions, 128 deletions
diff --git a/bsp/x86/drivers/include/bsp.h b/bsp/x86/drivers/include/bsp.h
index 724f518c6e..3c7960ed1c 100644
--- a/bsp/x86/drivers/include/bsp.h
+++ b/bsp/x86/drivers/include/bsp.h
@@ -19,127 +19,127 @@
#ifdef __cplusplus
extern "C" {
#endif
-
+
/*******************************************************************/
/* Timer Register */
/*******************************************************************/
-#define TIMER_CNTR0 (IO_TIMER1 + 0) /* timer 0 counter port */
-#define TIMER_CNTR1 (IO_TIMER1 + 1) /* timer 1 counter port */
-#define TIMER_CNTR2 (IO_TIMER1 + 2) /* timer 2 counter port */
-#define TIMER_MODE (IO_TIMER1 + 3) /* timer mode port */
-#define TIMER_SEL0 0x00 /* select counter 0 */
-#define TIMER_SEL1 0x40 /* select counter 1 */
-#define TIMER_INTTC 0x00 /* mode 0, intr on terminal cnt */
-#define TIMER_ONESHOT 0x02 /* mode 1, one shot */
-#define TIMER_RATEGEN 0x04 /* mode 2, rate generator */
-#define TIMER_SQWAVE 0x06 /* mode 3, square wave */
-#define TIMER_SWSTROBE 0x08 /* mode 4, s/w triggered strobe */
-#define TIMER_HWSTROBE 0x0a /* mode 5, h/w triggered strobe */
-#define TIMER_LATCH 0x00 /* latch counter for reading */
-#define TIMER_LSB 0x10 /* r/w counter LSB */
-#define TIMER_MSB 0x20 /* r/w counter MSB */
-#define TIMER_16BIT 0x30 /* r/w counter 16 bits, LSB first */
-#define TIMER_BCD 0x01 /* count in BCD */
+#define TIMER_CNTR0 (IO_TIMER1 + 0) /* timer 0 counter port */
+#define TIMER_CNTR1 (IO_TIMER1 + 1) /* timer 1 counter port */
+#define TIMER_CNTR2 (IO_TIMER1 + 2) /* timer 2 counter port */
+#define TIMER_MODE (IO_TIMER1 + 3) /* timer mode port */
+#define TIMER_SEL0 0x00 /* select counter 0 */
+#define TIMER_SEL1 0x40 /* select counter 1 */
+#define TIMER_INTTC 0x00 /* mode 0, intr on terminal cnt */
+#define TIMER_ONESHOT 0x02 /* mode 1, one shot */
+#define TIMER_RATEGEN 0x04 /* mode 2, rate generator */
+#define TIMER_SQWAVE 0x06 /* mode 3, square wave */
+#define TIMER_SWSTROBE 0x08 /* mode 4, s/w triggered strobe */
+#define TIMER_HWSTROBE 0x0a /* mode 5, h/w triggered strobe */
+#define TIMER_LATCH 0x00 /* latch counter for reading */
+#define TIMER_LSB 0x10 /* r/w counter LSB */
+#define TIMER_MSB 0x20 /* r/w counter MSB */
+#define TIMER_16BIT 0x30 /* r/w counter 16 bits, LSB first */
+#define TIMER_BCD 0x01 /* count in BCD */
-#define TIMER_FREQ 1193182
-#define TIMER_DIV(x) ((TIMER_FREQ+(x)/2)/(x))
+#define TIMER_FREQ 1193182
+#define TIMER_DIV(x) ((TIMER_FREQ+(x)/2)/(x))
-#define IO_TIMER1 0x040 /* 8253 Timer #1 */
+#define IO_TIMER1 0x040 /* 8253 Timer #1 */
/*******************************************************************/
/* Interrupt Controller */
/*******************************************************************/
/* these are processor defined */
-#define T_DIVIDE 0 /* divide error */
-#define T_DEBUG 1 /* debug exception */
-#define T_NMI 2 /* non-maskable interrupt */
-#define T_BRKPT 3 /* breakpoint */
-#define T_OFLOW 4 /* overflow */
-#define T_BOUND 5 /* bounds check */
-#define T_ILLOP 6 /* illegal opcode */
-#define T_DEVICE 7 /* device not available */
-#define T_DBLFLT 8 /* double fault */
+#define T_DIVIDE 0 /* divide error */
+#define T_DEBUG 1 /* debug exception */
+#define T_NMI 2 /* non-maskable interrupt */
+#define T_BRKPT 3 /* breakpoint */
+#define T_OFLOW 4 /* overflow */
+#define T_BOUND 5 /* bounds check */
+#define T_ILLOP 6 /* illegal opcode */
+#define T_DEVICE 7 /* device not available */
+#define T_DBLFLT 8 /* double fault */
/* 9 is reserved */
-#define T_TSS 10 /* invalid task switch segment */
-#define T_SEGNP 11 /* segment not present */
-#define T_STACK 12 /* stack exception */
-#define T_GPFLT 13 /* genernal protection fault */
-#define T_PGFLT 14 /* page fault */
+#define T_TSS 10 /* invalid task switch segment */
+#define T_SEGNP 11 /* segment not present */
+#define T_STACK 12 /* stack exception */
+#define T_GPFLT 13 /* genernal protection fault */
+#define T_PGFLT 14 /* page fault */
/* 15 is reserved */
-#define T_FPERR 16 /* floating point error */
-#define T_ALIGN 17 /* aligment check */
-#define T_MCHK 18 /* machine check */
-#define T_DEFAULT 500 /* catchall */
+#define T_FPERR 16 /* floating point error */
+#define T_ALIGN 17 /* aligment check */
+#define T_MCHK 18 /* machine check */
+#define T_DEFAULT 500 /* catchall */
-#define INTTIMER0 0
-#define INTKEYBOARD 1
-#define INTUART0_RX 4
-#define CLOCK_IRQ 0
-#define KEYBOARD_IRQ 1
-#define CASCADE_IRQ 2 /* cascade enable for 2nd AT controller */
-#define ETHER_IRQ 3 /* default ethernet interrupt vector */
-#define SECONDARY_IRQ 3 /* RS232 interrupt vector for port 2 */
-#define RS232_IRQ 4 /* RS232 interrupt vector for port 1 */
-#define XT_WINI_IRQ 5 /* xt winchester */
-#define FLOPPY_IRQ 6 /* floppy disk */
-#define PRINTER_IRQ 7
-#define AT_WINI_IRQ 14 /* at winchester */
+#define INTTIMER0 0
+#define INTKEYBOARD 1
+#define INTUART0_RX 4
+#define CLOCK_IRQ 0
+#define KEYBOARD_IRQ 1
+#define CASCADE_IRQ 2 /* cascade enable for 2nd AT controller */
+#define ETHER_IRQ 3 /* default ethernet interrupt vector */
+#define SECONDARY_IRQ 3 /* RS232 interrupt vector for port 2 */
+#define RS232_IRQ 4 /* RS232 interrupt vector for port 1 */
+#define XT_WINI_IRQ 5 /* xt winchester */
+#define FLOPPY_IRQ 6 /* floppy disk */
+#define PRINTER_IRQ 7
+#define AT_WINI_IRQ 14 /* at winchester */
/* I/O Addresses of the two 8259A programmable interrupt controllers */
-#define IO_PIC1 0x20 /* Master(IRQs 0-7) */
-#define IO_PIC2 0xa0 /* Slave(IRQs 8-15) */
-#define IRQ_SLAVE 0x2 /* IRQ at which slave connects to master */
-#define IRQ_OFFSET 0x20 /* IRQ 0 corresponds to int IRQ_OFFSET */
+#define IO_PIC1 0x20 /* Master(IRQs 0-7) */
+#define IO_PIC2 0xa0 /* Slave(IRQs 8-15) */
+#define IRQ_SLAVE 0x2 /* IRQ at which slave connects to master */
+#define IRQ_OFFSET 0x20 /* IRQ 0 corresponds to int IRQ_OFFSET */
-#define MAX_HANDLERS 16 /*max number of isr handler*/
+#define MAX_HANDLERS 16 /*max number of isr handler*/
/*******************************************************************/
/* CRT Register */
/*******************************************************************/
-#define MONO_BASE 0x3b4
-#define MONO_BUF 0xb0000
-#define CGA_BASE 0x3d4
-#define CGA_BUF 0xb8000
+#define MONO_BASE 0x3b4
+#define MONO_BUF 0xb0000
+#define CGA_BASE 0x3d4
+#define CGA_BUF 0xb8000
-#define CRT_ROWS 25
-#define CRT_COLS 80
-#define CRT_SIZE (CRT_ROWS * CRT_COLS)
+#define CRT_ROWS 25
+#define CRT_COLS 80
+#define CRT_SIZE (CRT_ROWS * CRT_COLS)
/*******************************************************************/
/* Keyboard Register */
/*******************************************************************/
-#define KBSTATP 0x64 /* kbd controller status port(I) */
-#define KBS_DIB 0x01 /* kbd data in buffer */
-#define KBDATAP 0x60 /* kbd data port(I) */
+#define KBSTATP 0x64 /* kbd controller status port(I) */
+#define KBS_DIB 0x01 /* kbd data in buffer */
+#define KBDATAP 0x60 /* kbd data port(I) */
/* AT keyboard */
/* 8042 ports */
-#define KB_DATA 0x60 /* I/O port for keyboard data
- Read : Read Output Buffer
- Write: Write Input Buffer(8042 Data&8048 Command) */
-#define KB_CMD 0x64 /* I/O port for keyboard command
- Read : Read Status Register
- Write: Write Input Buffer(8042 Command) */
-#define LED_CODE 0xED
-#define KB_ACK 0xFA
+#define KB_DATA 0x60 /* I/O port for keyboard data
+ Read : Read Output Buffer
+ Write: Write Input Buffer(8042 Data&8048 Command) */
+#define KB_CMD 0x64 /* I/O port for keyboard command
+ Read : Read Status Register
+ Write: Write Input Buffer(8042 Command) */
+#define LED_CODE 0xED
+#define KB_ACK 0xFA
/*******************************************************************/
/* Serial Register */
/*******************************************************************/
/*Serial I/O code */
-#define COM1 0x3F8
-#define COMSTATUS 5
-#define COMDATA 0x01
-#define COMREAD 0
-#define COMWRITE 0
+#define COM1 0x3F8
+#define COMSTATUS 5
+#define COMDATA 0x01
+#define COMREAD 0
+#define COMWRITE 0
/* Bits definition of the Line Status Register (LSR)*/
-#define DR 0x01 /* Data Ready */
-#define OE 0x02 /* Overrun Error */
-#define PE 0x04 /* Parity Error */
-#define FE 0x08 /* Framing Error */
-#define BI 0x10 /* Break Interrupt */
-#define THRE 0x20 /* Transmitter Holding Register Empty */
-#define TEMT 0x40 /* Transmitter Empty */
-#define ERFIFO 0x80 /* Error receive Fifo */
+#define DR 0x01 /* Data Ready */
+#define OE 0x02 /* Overrun Error */
+#define PE 0x04 /* Parity Error */
+#define FE 0x08 /* Framing Error */
+#define BI 0x10 /* Break Interrupt */
+#define THRE 0x20 /* Transmitter Holding Register Empty */
+#define TEMT 0x40 /* Transmitter Empty */
+#define ERFIFO 0x80 /* Error receive Fifo */
#ifdef __cplusplus
}
diff --git a/bsp/x86/drivers/include/grub.h b/bsp/x86/drivers/include/grub.h
index dcfa36b819..f50edbe8a2 100644
--- a/bsp/x86/drivers/include/grub.h
+++ b/bsp/x86/drivers/include/grub.h
@@ -9,7 +9,7 @@
*
* Change Logs:
* Date Author Notes
- * 2006-10-09 Bernard the grub related definitions
+ * 2006-10-09 Bernard the grub related definitions
* (multiboot)
*/
@@ -17,75 +17,75 @@
#define __GRUB_H__
/* the magic number for the multiboot header. */
-#define MULTIBOOT_HEADER_MAGIC 0x1BADB002
+#define MULTIBOOT_HEADER_MAGIC 0x1BADB002
/* the flags for the multiboot header. */
-#define MULTIBOOT_HEADER_FLAGS 0x00000003
+#define MULTIBOOT_HEADER_FLAGS 0x00000003
/* the magic number passed by a multiboot-compliant boot loader. */
-#define MULTIBOOT_BOOTLOADER_MAGIC 0x2BADB002
+#define MULTIBOOT_BOOTLOADER_MAGIC 0x2BADB002
#ifndef __ASM__
/* the multiboot header. */
typedef struct multiboot_header
{
- unsigned long magic;
- unsigned long flags;
- unsigned long checksum;
- unsigned long header_addr;
- unsigned long load_addr;
- unsigned long load_end_addr;
- unsigned long bss_end_addr;
- unsigned long entry_addr;
+ unsigned long magic;
+ unsigned long flags;
+ unsigned long checksum;
+ unsigned long header_addr;
+ unsigned long load_addr;
+ unsigned long load_end_addr;
+ unsigned long bss_end_addr;
+ unsigned long entry_addr;
} multiboot_header_t;
/* the section header table for elf. */
typedef struct elf_section_header_table
{
- unsigned long num;
- unsigned long size;
- unsigned long addr;
- unsigned long shndx;
+ unsigned long num;
+ unsigned long size;
+ unsigned long addr;
+ unsigned long shndx;
} elf_section_header_table_t;
/* the multiboot information. */
typedef struct multiboot_info
{
- unsigned long flags;
- unsigned long mem_lower;
- unsigned long mem_upper;
- unsigned long boot_device;
- unsigned long cmdline;
- unsigned long mods_count;
- unsigned long mods_addr;
- union
- {
- aout_symbol_table_t aout_sym;
- elf_section_header_table_t elf_sec;
- } u;
- unsigned long mmap_length;
- unsigned long mmap_addr;
+ unsigned long flags;
+ unsigned long mem_lower;
+ unsigned long mem_upper;
+ unsigned long boot_device;
+ unsigned long cmdline;
+ unsigned long mods_count;
+ unsigned long mods_addr;
+ union
+ {
+ aout_symbol_table_t aout_sym;
+ elf_section_header_table_t elf_sec;
+ } u;
+ unsigned long mmap_length;
+ unsigned long mmap_addr;
} multiboot_info_t;
/* the module structure. */
typedef struct module
{
- unsigned long mod_start;
- unsigned long mod_end;
- unsigned long string;
- unsigned long reserved;
+ unsigned long mod_start;
+ unsigned long mod_end;
+ unsigned long string;
+ unsigned long reserved;
} module_t;
/* the memory map. be careful that the offset 0 is base_addr_low
but no size. */
typedef struct memory_map
{
- unsigned long size;
- unsigned long base_addr_low;
- unsigned long base_addr_high;
- unsigned long length_low;
- unsigned long length_high;
- unsigned long type;
+ unsigned long size;
+ unsigned long base_addr_low;
+ unsigned long base_addr_high;
+ unsigned long length_low;
+ unsigned long length_high;
+ unsigned long type;
} memory_map_t;
#endif