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authorzyh <[email protected]>2018-09-02 11:21:03 +0800
committerzyh <[email protected]>2018-09-02 11:21:03 +0800
commit2bd06ea44805ab5c6f66c3255ae5472e1eb977ab (patch)
treea0fa2e21d45699a89bf903271f39d3c708296c63 /bsp
parent5251ab737f77318ee8e8290d8a6c1789bad1d6ff (diff)
[Bsp][Apollo2]fix build error with gcc
Diffstat (limited to 'bsp')
-rw-r--r--bsp/apollo2/libraries/drivers/hal/am_hal_iom.c8
-rw-r--r--bsp/apollo2/libraries/startup/SConscript4
-rw-r--r--bsp/apollo2/rtconfig.py2
-rw-r--r--bsp/apollo2/rtthread_link.ld142
4 files changed, 148 insertions, 8 deletions
diff --git a/bsp/apollo2/libraries/drivers/hal/am_hal_iom.c b/bsp/apollo2/libraries/drivers/hal/am_hal_iom.c
index 95653b9fa5..244c28732b 100644
--- a/bsp/apollo2/libraries/drivers/hal/am_hal_iom.c
+++ b/bsp/apollo2/libraries/drivers/hal/am_hal_iom.c
@@ -1122,7 +1122,7 @@ am_hal_iom_workaround_word_write(uint32_t ui32ChipSelect,
//! @return None.
//
//*****************************************************************************
-#if defined(__GNUC_STDC_INLINE__)
+#if defined(__GNUC__)
static void __attribute__((naked))
iom_workaround_loop(uint32_t ui32PadRegVal, volatile uint32_t *pui32PadReg,
bool bRising)
@@ -1164,8 +1164,7 @@ iom_workaround_loop(uint32_t ui32PadRegVal, volatile uint32_t *pui32PadReg,
__asm(" str r0, [r1]");
__asm(" bx lr");
}
-#endif
-#ifdef keil
+#elif defined(__CC_ARM)
__asm static void
iom_workaround_loop(uint32_t ui32PadRegVal, volatile uint32_t *pui32PadReg,
bool bRising)
@@ -1208,8 +1207,7 @@ falling_check_mosi
bx lr
nop
}
-#endif
-#ifdef iar
+#elif defined(__ICCARM__)
static void
iom_workaround_loop(uint32_t ui32PadRegVal, volatile uint32_t *pui32PadReg,
bool bRising)
diff --git a/bsp/apollo2/libraries/startup/SConscript b/bsp/apollo2/libraries/startup/SConscript
index e4758f1e2e..bbaef37870 100644
--- a/bsp/apollo2/libraries/startup/SConscript
+++ b/bsp/apollo2/libraries/startup/SConscript
@@ -11,7 +11,7 @@ src = Split("""
# add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
- src = src + ['gcc_ride7/' + 'startup_gcc.c']
+ src = src + ['gcc/' + 'startup_gcc.c']
elif rtconfig.CROSS_TOOL == 'keil':
src = src + ['arm/' + 'startup_keil.s']
elif rtconfig.CROSS_TOOL == 'iar':
@@ -19,7 +19,7 @@ elif rtconfig.CROSS_TOOL == 'iar':
path = [cwd]
-CPPDEFINES = ['AM_PACKAGE_BGA', 'AM_PART_APOLLO2', 'keil']
+CPPDEFINES = ['AM_PACKAGE_BGA', 'AM_PART_APOLLO2']
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
diff --git a/bsp/apollo2/rtconfig.py b/bsp/apollo2/rtconfig.py
index 90adde5435..506ee78eca 100644
--- a/bsp/apollo2/rtconfig.py
+++ b/bsp/apollo2/rtconfig.py
@@ -43,7 +43,7 @@ if PLATFORM == 'gcc':
DEVICE = ' -mcpu=cortex-m4 -mthumb -ffunction-sections -fdata-sections'
CFLAGS = DEVICE
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
- LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-apollo2.map,-cref,-u,Reset_Handler -T'
+ LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-apollo2.map,-cref,-u,am_reset_isr -T rtthread_link.ld'
CPATH = ''
LPATH = ''
diff --git a/bsp/apollo2/rtthread_link.ld b/bsp/apollo2/rtthread_link.ld
new file mode 100644
index 0000000000..9be7326368
--- /dev/null
+++ b/bsp/apollo2/rtthread_link.ld
@@ -0,0 +1,142 @@
+/*
+ * linker script for STM32F10x with GNU ld
+ * bernard.xiong 2009-10-14
+ */
+
+/* Program Entry, set to mark it as "used" and avoid gc */
+MEMORY
+{
+ CODE (rx) : ORIGIN = 0x00000000, LENGTH = 1024k /* 1024KB flash */
+ DATA (rw) : ORIGIN = 0x10000000, LENGTH = 256k /* 128K sram */
+}
+ENTRY(am_reset_isr)
+_system_stack_size = 0x200;
+
+SECTIONS
+{
+ .text :
+ {
+ . = ALIGN(4);
+ _stext = .;
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ *(.text) /* remaining code */
+ *(.text.*) /* remaining code */
+ *(.rodata) /* read-only data (constants) */
+ *(.rodata*)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.gnu.linkonce.t*)
+
+ /* section information for finsh shell */
+ . = ALIGN(4);
+ __fsymtab_start = .;
+ KEEP(*(FSymTab))
+ __fsymtab_end = .;
+ . = ALIGN(4);
+ __vsymtab_start = .;
+ KEEP(*(VSymTab))
+ __vsymtab_end = .;
+ . = ALIGN(4);
+
+ /* section information for initial. */
+ . = ALIGN(4);
+ __rt_init_start = .;
+ KEEP(*(SORT(.rti_fn*)))
+ __rt_init_end = .;
+ . = ALIGN(4);
+
+ . = ALIGN(4);
+ _etext = .;
+ } > CODE = 0
+
+ /* .ARM.exidx is sorted, so has to go in its own output section. */
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+
+ /* This is used by the startup in order to initialize the .data secion */
+ _init_data = .;
+ } > CODE
+ __exidx_end = .;
+
+ /* .data section which is used for initialized data */
+
+ .data : AT (_init_data)
+ {
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .data secion */
+ _sdata = . ;
+
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d*)
+
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .data secion */
+ _edata = . ;
+ } >DATA
+
+ .stack :
+ {
+ . = . + _system_stack_size;
+ . = ALIGN(4);
+ _estack = .;
+ } >DATA
+
+ __bss_start = .;
+ .bss :
+ {
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .bss secion */
+ _sbss = .;
+
+ *(.bss)
+ *(.bss.*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .bss secion */
+ _ebss = . ;
+
+ *(.bss.init)
+ } > DATA
+ __bss_end = .;
+
+ _end = .;
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ * Symbols in the DWARF debugging sections are relative to the beginning
+ * of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+}