[dm][hwcache] support hwcache (#11049)

Some ARCH not has std cache ops, such as RISC-V

Signed-off-by: GuEe-GUI <[email protected]>

3 files changed, 163 insertions, 0 deletions

diff --git a/components/drivers/hwcache/Kconfig b/components/drivers/hwcache/Kconfig
new file mode 100644
index 0000000000..6936dd1ff3
--- /dev/null
+++ b/components/drivers/hwcache/Kconfig
@@ -0,0 +1,9 @@
+menuconfig RT_USING_HWCACHE
+    bool "Using Hardware Cache device drivers"
+    depends on RT_USING_DM
+    depends on RT_USING_CACHE
+    default n
+
+if RT_USING_HWCACHE
+    osource "$(SOC_DM_HWCACHE_DIR)/Kconfig"
+endif
diff --git a/components/drivers/hwcache/SConscript b/components/drivers/hwcache/SConscript
new file mode 100644
index 0000000000..6d16ba02e6
--- /dev/null
+++ b/components/drivers/hwcache/SConscript
@@ -0,0 +1,15 @@
+from building import *
+
+group = []
+
+if not GetDepend(['RT_USING_HWCACHE']):
+    Return('group')
+
+cwd = GetCurrentDir()
+CPPPATH = [cwd + '/../include']
+
+src = ['hwcache.c']
+
+group = DefineGroup('DeviceDrivers', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
diff --git a/components/drivers/hwcache/hwcache.c b/components/drivers/hwcache/hwcache.c
new file mode 100644
index 0000000000..65029bf66e
--- /dev/null
+++ b/components/drivers/hwcache/hwcache.c
@@ -0,0 +1,139 @@
+/*
+ * Copyright (c) 2006-2023, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2023-02-25     GuEe-GUI     the first version
+ */
+
+#include <drivers/hwcache.h>
+
+#define DBG_TAG "rtdm.hwcache"
+#define DBG_LVL DBG_INFO
+#include <rtdbg.h>
+
+struct rt_hwcache_ops *rt_dm_cpu_dcache_ops = RT_NULL;
+struct rt_hwcache_ops *rt_dm_cpu_icache_ops = RT_NULL;
+
+static void hwcache_enable(struct rt_hwcache_ops *ops)
+{
+    if (ops && ops->enable)
+    {
+        ops->enable();
+    }
+}
+
+static void hwcache_disable(struct rt_hwcache_ops *ops)
+{
+    if (ops && ops->enable)
+    {
+        ops->enable();
+    }
+}
+
+static rt_base_t hwcache_status(struct rt_hwcache_ops *ops)
+{
+    if (ops && ops->status)
+    {
+        return ops->status();
+    }
+
+    return 0;
+}
+
+static void hwcache_ops(struct rt_hwcache_ops *ops, int op, void *addr, int size)
+{
+    if (ops)
+    {
+        if (op == RT_HW_CACHE_FLUSH)
+        {
+            if (ops->flush)
+            {
+                ops->flush(addr, size);
+            }
+        }
+        else if (op == RT_HW_CACHE_INVALIDATE)
+        {
+            if (ops->invalidate)
+            {
+                ops->invalidate(addr, size);
+            }
+        }
+    }
+}
+
+void rt_hwcache_icache_enable(void)
+{
+    hwcache_enable(rt_dm_cpu_icache_ops);
+}
+
+void rt_hwcache_icache_disable(void)
+{
+    hwcache_disable(rt_dm_cpu_icache_ops);
+}
+
+rt_base_t rt_hwcache_icache_status(void)
+{
+    return hwcache_status(rt_dm_cpu_icache_ops);
+}
+
+void rt_hwcache_icache_ops(int ops, void *addr, int size)
+{
+    hwcache_ops(rt_dm_cpu_icache_ops, ops, addr, size);
+}
+
+void rt_hwcache_dcache_enable(void)
+{
+    hwcache_enable(rt_dm_cpu_dcache_ops);
+}
+
+void rt_hwcache_dcache_disable(void)
+{
+    hwcache_disable(rt_dm_cpu_dcache_ops);
+}
+
+rt_base_t rt_hwcache_dcache_status(void)
+{
+    return hwcache_status(rt_dm_cpu_dcache_ops);
+}
+
+void rt_hwcache_dcache_ops(int ops, void *addr, int size)
+{
+    hwcache_ops(rt_dm_cpu_dcache_ops, ops, addr, size);
+}
+
+#ifdef RT_USING_OFW
+RT_OFW_STUB_RANGE_EXPORT(hwcache, _hwcache_ofw_start, _hwcache_ofw_end);
+
+static rt_err_t ofw_hwcache_init(void)
+{
+    struct rt_ofw_node *cache_np;
+
+    rt_ofw_foreach_allnodes(cache_np)
+    {
+        rt_ofw_stub_probe_range(cache_np, &_hwcache_ofw_start, &_hwcache_ofw_end);
+    }
+
+    return RT_EOK;
+}
+#else
+static rt_err_t ofw_hwcache_init(void)
+{
+    return RT_EOK;
+}
+#endif /* !RT_USING_OFW */
+
+rt_err_t rt_hwcache_init(void)
+{
+    rt_err_t err;
+
+    LOG_D("init start");
+
+    err = ofw_hwcache_init();
+
+    LOG_D("init end");
+
+    return err;
+}