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authorboa <[email protected]>2026-11-09 10:19:30 -0500
committerRbb666 <[email protected]>2026-11-11 09:44:25 +0800
commit5caa519bec2e261146260149e2a8aa1708d79940 (patch)
tree5c5cc40899e6c2829a65d07167b0ec1e125b2e4a /components/drivers/virtio/virtio_queue.h
parentf50c9bf7fbfcd2cc5eb7990b82464c0331868fb7 (diff)
[libcpu][risc-v] Fix PLIC completion order in non-DM modeHEADmaster
handler_plic_irq() completes a claimed interrupt before dispatching its handler. If a level-triggered source is still asserted at completion time, the PLIC gateway forwards the request again, so the same interrupt can be dispatched twice. Run the handler first, then complete. Completing after the handler means a handler may have masked its own source; the PLIC ignores a completion for an interrupt that is not enabled for the target, so temporarily enable the source around the completion, as the Linux SiFive PLIC driver does. Link: https://github.com/RT-Thread/rt-thread/issues/12010
Diffstat (limited to 'components/drivers/virtio/virtio_queue.h')
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