diff options
| author | OnlyoutzZ <[email protected]> | 2026-09-14 17:22:16 +0800 |
|---|---|---|
| committer | Rbb666 <[email protected]> | 2026-09-16 09:06:34 +0800 |
| commit | bd501fa9e32fba11076df475c776eb4a317d92e9 (patch) | |
| tree | c171019bd94107eb6d536cbf1f01565325467f43 /components/external/sqlite/sqlite3ext.h | |
| parent | ed59aaebf6a7709e5966a4fb8da72f99d7bfb4f3 (diff) | |
[bsp][n32] n32h497zgl7-evb: add SDRAM port and correct Kconfig defaults
drv_sdram.c includes <sdram_port.h> unconditionally under BSP_USING_SDRAM,
and n32h497zgl7-evb had no such header, so the option could not build at
all. Add one for the M12L64164A fitted on this board: 4 banks x 1M x 16
bits = 8 MB, 12 row address bits, 8 column address bits, SDRAM1 mapped at
0x98000000. The timing values are the ones validated on this board in
hardware.
Three of the Kconfig defaults described a different part:
BSP_SDRAM_DATA_WIDTH_SEL default 32 -> 16
BSP_SDRAM_COLUMN_BITS_SEL default 9 -> 8
BSP_SDRAM_SIZE default 32 -> 8
BANK1, ROW_BIT_12 and CAS_LATENCY_3 already matched and are unchanged.
Verified by building n32h497zgl7-evb with BSP_PERIPH_PIN_CFG_READY and
BSP_USING_SDRAM enabled: drv_sdram.c and the SDK's n32h49x_sdram.c compile
and link with no warnings.
Diffstat (limited to 'components/external/sqlite/sqlite3ext.h')
0 files changed, 0 insertions, 0 deletions
