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| author | qz721 <[email protected]> | 2019-03-29 20:22:25 +0800 |
|---|---|---|
| committer | qz721 <[email protected]> | 2019-03-29 20:22:25 +0800 |
| commit | fbd40fc5b8b94cf370fdea9a2433991f43e542f6 (patch) | |
| tree | c0df4ad4a5873d45cc665c55df2e467a289a7a3e /components | |
| parent | 2eb1bef773e099ac93ec74dba7ec216bdf61597c (diff) | |
Add standard rt-thread cache interfaces for arm/cortex-a.
Add cache invalidate and clean interfaces.
Adjust the default cache type of memory to 'WriteBach with WriteAllocate'.
Diffstat (limited to 'components')
0 files changed, 0 insertions, 0 deletions