diff options
| author | wdfk-prog <[email protected]> | 2026-03-13 14:15:05 +0800 |
|---|---|---|
| committer | Rbb666 <[email protected]> | 2026-03-16 10:27:53 +0800 |
| commit | 05445c04e8dc0a7968330ee981aac8de2c6315cc (patch) | |
| tree | 0a7bafc28579b8395e2b7a5252d7a2583637a9ea /include/rtatomic.h | |
| parent | b7686b8d793527b14d3ff52a7db42a01f9dc6f69 (diff) | |
feat(core): Add 8-bit and 16-bit atomic operation support
Diffstat (limited to 'include/rtatomic.h')
| -rw-r--r-- | include/rtatomic.h | 141 |
1 files changed, 141 insertions, 0 deletions
diff --git a/include/rtatomic.h b/include/rtatomic.h index 4719339d26..96c906f74b 100644 --- a/include/rtatomic.h +++ b/include/rtatomic.h @@ -7,6 +7,7 @@ * Date Author Notes * 2023-03-14 WangShun first version * 2023-05-20 Bernard add stdc atomic detection. + * 2026-03-09 wdfk-prog add 8/16-bit atomic operations support */ #ifndef __RT_ATOMIC_H__ #define __RT_ATOMIC_H__ @@ -17,8 +18,16 @@ rt_atomic_t rt_hw_atomic_load(volatile rt_atomic_t *ptr); void rt_hw_atomic_store(volatile rt_atomic_t *ptr, rt_atomic_t val); +rt_atomic8_t rt_hw_atomic_load8(volatile rt_atomic8_t *ptr); +void rt_hw_atomic_store8(volatile rt_atomic8_t *ptr, rt_atomic8_t val); +rt_atomic16_t rt_hw_atomic_load16(volatile rt_atomic16_t *ptr); +void rt_hw_atomic_store16(volatile rt_atomic16_t *ptr, rt_atomic16_t val); rt_atomic_t rt_hw_atomic_add(volatile rt_atomic_t *ptr, rt_atomic_t val); rt_atomic_t rt_hw_atomic_sub(volatile rt_atomic_t *ptr, rt_atomic_t val); +rt_atomic8_t rt_hw_atomic_and8(volatile rt_atomic8_t *ptr, rt_atomic8_t val); +rt_atomic8_t rt_hw_atomic_or8(volatile rt_atomic8_t *ptr, rt_atomic8_t val); +rt_atomic16_t rt_hw_atomic_and16(volatile rt_atomic16_t *ptr, rt_atomic16_t val); +rt_atomic16_t rt_hw_atomic_or16(volatile rt_atomic16_t *ptr, rt_atomic16_t val); rt_atomic_t rt_hw_atomic_and(volatile rt_atomic_t *ptr, rt_atomic_t val); rt_atomic_t rt_hw_atomic_or(volatile rt_atomic_t *ptr, rt_atomic_t val); rt_atomic_t rt_hw_atomic_xor(volatile rt_atomic_t *ptr, rt_atomic_t val); @@ -32,8 +41,16 @@ rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_a #ifndef __STDC_NO_ATOMICS__ #define rt_atomic_load(ptr) atomic_load(ptr) #define rt_atomic_store(ptr, v) atomic_store(ptr, v) +#define rt_atomic_load8(ptr) atomic_load(ptr) +#define rt_atomic_store8(ptr, v) atomic_store(ptr, v) +#define rt_atomic_load16(ptr) atomic_load(ptr) +#define rt_atomic_store16(ptr, v) atomic_store(ptr, v) #define rt_atomic_add(ptr, v) atomic_fetch_add(ptr, v) #define rt_atomic_sub(ptr, v) atomic_fetch_sub(ptr, v) +#define rt_atomic_and8(ptr, v) atomic_fetch_and(ptr, v) +#define rt_atomic_or8(ptr, v) atomic_fetch_or(ptr, v) +#define rt_atomic_and16(ptr, v) atomic_fetch_and(ptr, v) +#define rt_atomic_or16(ptr, v) atomic_fetch_or(ptr, v) #define rt_atomic_and(ptr, v) atomic_fetch_and(ptr, v) #define rt_atomic_or(ptr, v) atomic_fetch_or(ptr, v) #define rt_atomic_xor(ptr, v) atomic_fetch_xor(ptr, v) @@ -48,6 +65,28 @@ rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_a #elif defined(RT_USING_HW_ATOMIC) #define rt_atomic_load(ptr) rt_hw_atomic_load(ptr) #define rt_atomic_store(ptr, v) rt_hw_atomic_store(ptr, v) +#if defined(ARCH_USING_HW_ATOMIC_8) +#define rt_atomic_load8(ptr) rt_hw_atomic_load8(ptr) +#define rt_atomic_store8(ptr, v) rt_hw_atomic_store8(ptr, v) +#define rt_atomic_and8(ptr, v) rt_hw_atomic_and8(ptr, v) +#define rt_atomic_or8(ptr, v) rt_hw_atomic_or8(ptr, v) +#else +#define rt_atomic_load8(ptr) rt_soft_atomic_load8(ptr) +#define rt_atomic_store8(ptr, v) rt_soft_atomic_store8(ptr, v) +#define rt_atomic_and8(ptr, v) rt_soft_atomic_and8(ptr, v) +#define rt_atomic_or8(ptr, v) rt_soft_atomic_or8(ptr, v) +#endif +#if defined(ARCH_USING_HW_ATOMIC_16) +#define rt_atomic_load16(ptr) rt_hw_atomic_load16(ptr) +#define rt_atomic_store16(ptr, v) rt_hw_atomic_store16(ptr, v) +#define rt_atomic_and16(ptr, v) rt_hw_atomic_and16(ptr, v) +#define rt_atomic_or16(ptr, v) rt_hw_atomic_or16(ptr, v) +#else +#define rt_atomic_load16(ptr) rt_soft_atomic_load16(ptr) +#define rt_atomic_store16(ptr, v) rt_soft_atomic_store16(ptr, v) +#define rt_atomic_and16(ptr, v) rt_soft_atomic_and16(ptr, v) +#define rt_atomic_or16(ptr, v) rt_soft_atomic_or16(ptr, v) +#endif #define rt_atomic_add(ptr, v) rt_hw_atomic_add(ptr, v) #define rt_atomic_sub(ptr, v) rt_hw_atomic_sub(ptr, v) #define rt_atomic_and(ptr, v) rt_hw_atomic_and(ptr, v) @@ -62,8 +101,16 @@ rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_a #include <rthw.h> #define rt_atomic_load(ptr) rt_soft_atomic_load(ptr) #define rt_atomic_store(ptr, v) rt_soft_atomic_store(ptr, v) +#define rt_atomic_load8(ptr) rt_soft_atomic_load8(ptr) +#define rt_atomic_store8(ptr, v) rt_soft_atomic_store8(ptr, v) +#define rt_atomic_load16(ptr) rt_soft_atomic_load16(ptr) +#define rt_atomic_store16(ptr, v) rt_soft_atomic_store16(ptr, v) #define rt_atomic_add(ptr, v) rt_soft_atomic_add(ptr, v) #define rt_atomic_sub(ptr, v) rt_soft_atomic_sub(ptr, v) +#define rt_atomic_and8(ptr, v) rt_soft_atomic_and8(ptr, v) +#define rt_atomic_or8(ptr, v) rt_soft_atomic_or8(ptr, v) +#define rt_atomic_and16(ptr, v) rt_soft_atomic_and16(ptr, v) +#define rt_atomic_or16(ptr, v) rt_soft_atomic_or16(ptr, v) #define rt_atomic_and(ptr, v) rt_soft_atomic_and(ptr, v) #define rt_atomic_or(ptr, v) rt_soft_atomic_or(ptr, v) #define rt_atomic_xor(ptr, v) rt_soft_atomic_xor(ptr, v) @@ -72,6 +119,100 @@ rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_a #define rt_atomic_flag_test_and_set(ptr) rt_soft_atomic_flag_test_and_set(ptr) #define rt_atomic_compare_exchange_strong(ptr, v,des) rt_soft_atomic_compare_exchange_strong(ptr, v ,des) +rt_inline rt_atomic8_t rt_soft_atomic_load8(volatile rt_atomic8_t *ptr) +{ + rt_base_t level; + rt_atomic8_t temp; + + level = rt_hw_interrupt_disable(); + temp = *ptr; + rt_hw_interrupt_enable(level); + + return temp; +} + +rt_inline void rt_soft_atomic_store8(volatile rt_atomic8_t *ptr, rt_atomic8_t val) +{ + rt_base_t level; + + level = rt_hw_interrupt_disable(); + *ptr = val; + rt_hw_interrupt_enable(level); +} + +rt_inline rt_atomic16_t rt_soft_atomic_load16(volatile rt_atomic16_t *ptr) +{ + rt_base_t level; + rt_atomic16_t temp; + + level = rt_hw_interrupt_disable(); + temp = *ptr; + rt_hw_interrupt_enable(level); + + return temp; +} + +rt_inline void rt_soft_atomic_store16(volatile rt_atomic16_t *ptr, rt_atomic16_t val) +{ + rt_base_t level; + + level = rt_hw_interrupt_disable(); + *ptr = val; + rt_hw_interrupt_enable(level); +} + +rt_inline rt_atomic8_t rt_soft_atomic_and8(volatile rt_atomic8_t *ptr, rt_atomic8_t val) +{ + rt_base_t level; + rt_atomic8_t temp; + + level = rt_hw_interrupt_disable(); + temp = *ptr; + *ptr = temp & val; + rt_hw_interrupt_enable(level); + + return temp; +} + +rt_inline rt_atomic8_t rt_soft_atomic_or8(volatile rt_atomic8_t *ptr, rt_atomic8_t val) +{ + rt_base_t level; + rt_atomic8_t temp; + + level = rt_hw_interrupt_disable(); + temp = *ptr; + *ptr = temp | val; + rt_hw_interrupt_enable(level); + + return temp; +} + +rt_inline rt_atomic16_t rt_soft_atomic_and16(volatile rt_atomic16_t *ptr, rt_atomic16_t val) +{ + rt_base_t level; + rt_atomic16_t temp; + + level = rt_hw_interrupt_disable(); + temp = *ptr; + *ptr = temp & val; + rt_hw_interrupt_enable(level); + + return temp; +} + +rt_inline rt_atomic16_t rt_soft_atomic_or16(volatile rt_atomic16_t *ptr, rt_atomic16_t val) +{ + rt_base_t level; + rt_atomic16_t temp; + + level = rt_hw_interrupt_disable(); + temp = *ptr; + *ptr = temp | val; + rt_hw_interrupt_enable(level); + + return temp; +} + rt_inline rt_atomic_t rt_soft_atomic_exchange(volatile rt_atomic_t *ptr, rt_atomic_t val) { rt_base_t level; |
