diff options
| author | Grissiom <[email protected]> | 2013-05-24 10:04:51 +0800 |
|---|---|---|
| committer | Grissiom <[email protected]> | 2013-05-24 22:55:13 +0800 |
| commit | f51bce3fedcb5aa64514a4259068d85e8c534ab5 (patch) | |
| tree | 18ea7fc8c187d787c7603a4b3f5e169113b8f7b2 /include/rtthread.h | |
| parent | d0d1861d816dea34451a8b4a35b25a639f4c9d78 (diff) | |
add rm48x50 bsp and libcpu
We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:
1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
channel 5 in enabled and connected to IRQ.
2, RTI driver is enabled and compare3 source is selected to counter1
and the compare3 will generate tick in the period of 10ms. This
value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.
In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
Diffstat (limited to 'include/rtthread.h')
| -rw-r--r-- | include/rtthread.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/rtthread.h b/include/rtthread.h index 4b81464f18..cc1d90fe91 100644 --- a/include/rtthread.h +++ b/include/rtthread.h @@ -19,7 +19,7 @@ #ifndef __RT_THREAD_H__ #define __RT_THREAD_H__ - + #include <stdarg.h> #include <rtdef.h> #include <rtdebug.h> #include <rtservice.h> |