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| author | Bernard Xiong <[email protected]> | 2018-12-08 11:41:03 +0800 |
|---|---|---|
| committer | GitHub <[email protected]> | 2018-12-08 11:41:03 +0800 |
| commit | 5bdd141d1e633e40fcd1c443b8228e54d6be231f (patch) | |
| tree | c52fdd1f93be73ff5f0c8782235823847d13f632 /libcpu/SConscript | |
| parent | 94e6c349a699fc6d85738eaff048be97a3aa3495 (diff) | |
| parent | 4b0f9e76eb50a11a259aad1733555761ab9c0f22 (diff) | |
Merge pull request #2044 from RT-Thread/risc_v
Update risc-v code
Diffstat (limited to 'libcpu/SConscript')
| -rw-r--r-- | libcpu/SConscript | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/libcpu/SConscript b/libcpu/SConscript index a42909e64c..568da67cc9 100644 --- a/libcpu/SConscript +++ b/libcpu/SConscript @@ -2,30 +2,37 @@ Import('RTT_ROOT') Import('rtconfig') from building import * +arch = rtconfig.ARCH comm = rtconfig.ARCH + '/common' path = rtconfig.ARCH + '/' + rtconfig.CPU +src = [] ASFLAGS = '' # The set of source files associated with this SConscript file. if rtconfig.PLATFORM == 'armcc': - src = Glob(path + '/*.c') + Glob(path + '/*_rvds.S') + Glob(comm + '/*.c') + src += Glob(path + '/*.c') + Glob(path + '/*_rvds.S') + src += Glob(comm + '/*.c') + Glob(comm + '/*_rvds.S') if rtconfig.PLATFORM == 'gcc': - src = Glob(path + '/*.c') + Glob(path + '/*_gcc.S') + Glob(comm + '/*.c') + Glob(path + '/*_init.S') + src += Glob(path + '/*_init.S') + src += Glob(path + '/*.c') + Glob(path + '/*_gcc.S') + src += Glob(comm + '/*.c') + Glob(comm + '/*_gcc.S') if rtconfig.PLATFORM == 'iar': - src = Glob(path + '/*.c') + Glob(path + '/*_iar.S') + Glob(comm + '/*.c') + src += Glob(path + '/*.c') + Glob(path + '/*_iar.S') + src += Glob(comm + '/*.c') + Glob(comm + '/*_iar.S') if rtconfig.PLATFORM == 'cl': - src = Glob(path + '/*.c') + src = Glob(path + '/*.c') if rtconfig.PLATFORM == 'mingw': - src = Glob(path + '/*.c') + src = Glob(path + '/*.c') if rtconfig.PLATFORM == 'armcc' and rtconfig.ARCH == 'arm' and rtconfig.CPU == 'arm926': ASFLAGS = ' --cpreproc' - -CPPPATH = [RTT_ROOT + '/libcpu/' + rtconfig.ARCH + '/' + rtconfig.CPU, RTT_ROOT + '/libcpu/' + rtconfig.ARCH + '/common'] + +CPPPATH = [RTT_ROOT + '/libcpu/' + arch + '/' + rtconfig.CPU, RTT_ROOT + '/libcpu/' + arch + '/common'] + group = DefineGroup(rtconfig.CPU.upper(), src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) Return('group') |