[format] cleanup libcpu/aarch64 (#8950)

* [dfs] fixup compiler warning

Signed-off-by: Shell <[email protected]>

* [format] libcpu/arm64: separate context switching codes

Signed-off-by: Shell <[email protected]>

* [format] libcpu/arm64: separate vector

Signed-off-by: Shell <[email protected]>

* [format] libcpu/arm64: separate context_gcc.S

Signed-off-by: Shell <[email protected]>

* [format] libcpu/arm64: moving headers to include directory

Signed-off-by: Shell <[email protected]>

* style: replace tab with space

---------

Signed-off-by: Shell <[email protected]>

1 files changed, 39 insertions, 0 deletions

diff --git a/libcpu/aarch64/common/include/cache.h b/libcpu/aarch64/common/include/cache.h
new file mode 100644
index 0000000000..ef7b235d0e
--- /dev/null
+++ b/libcpu/aarch64/common/include/cache.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-12-18     RT-Thread    the first version
+ */
+
+#ifndef __CACHE_H__
+#define __CACHE_H__
+
+#include <rtdef.h>
+
+void __asm_invalidate_icache_all(void);
+
+void rt_hw_dcache_flush_all(void);
+void rt_hw_dcache_invalidate_all(void);
+void rt_hw_dcache_flush_range(unsigned long start_addr, unsigned long size);
+void rt_hw_cpu_dcache_clean(void *addr, unsigned long size);
+void rt_hw_cpu_dcache_invalidate(void *start_addr, unsigned long size);
+
+static inline void rt_hw_icache_invalidate_all(void)
+{
+    /* wait for previous modification to complete */
+    __asm__ volatile ("dsb ishst");
+
+    __asm__ volatile ("ic ialluis");
+    /* wait for ic to retire */
+    __asm__ volatile ("dsb nsh");
+    /* flush instruction pipeline */
+    __asm__ volatile ("isb");
+}
+
+void rt_hw_cpu_icache_invalidate(void *addr, rt_size_t size);
+void rt_hw_cpu_dcache_clean_and_invalidate(void *addr, rt_size_t size);
+
+#endif /* __CACHE_H__ */