summaryrefslogtreecommitdiff
path: root/libcpu/aarch64/cortex-a53
diff options
context:
space:
mode:
authorBernard Xiong <[email protected]>2021-03-31 13:52:30 +0800
committerGitHub <[email protected]>2021-03-31 13:52:30 +0800
commit3f64efd2a3c8265f1e5ddcea83e2dededf8eea8b (patch)
treead064f1ab426c4a46dec87fa807993ce07d42e9b /libcpu/aarch64/cortex-a53
parentac41503a4ab45ca3a647912e5b36fff7301c1399 (diff)
parent6c907c3a477b1f34ca1adb277748c3306110cabf (diff)
Merge pull request #4534 from mysterywolf/libcpu
[libcpu] auto formatted
Diffstat (limited to 'libcpu/aarch64/cortex-a53')
-rw-r--r--libcpu/aarch64/cortex-a53/interrupt.c10
-rw-r--r--libcpu/aarch64/cortex-a53/interrupt.h2
-rw-r--r--libcpu/aarch64/cortex-a53/stack.c108
-rw-r--r--libcpu/aarch64/cortex-a53/trap.c20
4 files changed, 70 insertions, 70 deletions
diff --git a/libcpu/aarch64/cortex-a53/interrupt.c b/libcpu/aarch64/cortex-a53/interrupt.c
index a412ca1953..4a5d502a3c 100644
--- a/libcpu/aarch64/cortex-a53/interrupt.c
+++ b/libcpu/aarch64/cortex-a53/interrupt.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -7,7 +7,7 @@
* Date Author Notes
* 2018/5/3 Bernard first version
* 2019-07-28 zdzn add smp support
- * 2019-08-09 zhangjun fixup the problem of smp startup and scheduling issues,
+ * 2019-08-09 zhangjun fixup the problem of smp startup and scheduling issues,
* write addr to mailbox3 to startup smp, and we use mailbox0 for ipi
*/
@@ -160,15 +160,15 @@ void rt_hw_ipi_send(int ipi_vector, unsigned int cpu_mask)
}
if(cpu_mask & 0x2)
{
- send_ipi_msg(1, ipi_vector);
+ send_ipi_msg(1, ipi_vector);
}
if(cpu_mask & 0x4)
{
- send_ipi_msg(2, ipi_vector);
+ send_ipi_msg(2, ipi_vector);
}
if(cpu_mask & 0x8)
{
- send_ipi_msg(3, ipi_vector);
+ send_ipi_msg(3, ipi_vector);
}
__DSB();
}
diff --git a/libcpu/aarch64/cortex-a53/interrupt.h b/libcpu/aarch64/cortex-a53/interrupt.h
index 8e741ed4e6..94a455550d 100644
--- a/libcpu/aarch64/cortex-a53/interrupt.h
+++ b/libcpu/aarch64/cortex-a53/interrupt.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
diff --git a/libcpu/aarch64/cortex-a53/stack.c b/libcpu/aarch64/cortex-a53/stack.c
index 68222c2c67..751793d7a3 100644
--- a/libcpu/aarch64/cortex-a53/stack.c
+++ b/libcpu/aarch64/cortex-a53/stack.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -21,70 +21,70 @@
* This function will initialize thread stack
*
* @param tentry the entry of thread
- * @param parameter the parameter of entry
+ * @param parameter the parameter of entry
* @param stack_addr the beginning stack address
* @param texit the function will be called when thread exit
*
* @return stack address
*/
rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
- rt_uint8_t *stack_addr, void *texit)
+ rt_uint8_t *stack_addr, void *texit)
{
- rt_ubase_t *stk;
- rt_ubase_t current_el;
+ rt_ubase_t *stk;
+ rt_ubase_t current_el;
- stk = (rt_ubase_t*)stack_addr;
+ stk = (rt_ubase_t*)stack_addr;
- *(--stk) = ( rt_ubase_t ) 11; /* X1 */
- *(--stk) = ( rt_ubase_t ) parameter; /* X0 */
- *(--stk) = ( rt_ubase_t ) 33; /* X3 */
- *(--stk) = ( rt_ubase_t ) 22; /* X2 */
- *(--stk) = ( rt_ubase_t ) 55; /* X5 */
- *(--stk) = ( rt_ubase_t ) 44; /* X4 */
- *(--stk) = ( rt_ubase_t ) 77; /* X7 */
- *(--stk) = ( rt_ubase_t ) 66; /* X6 */
- *(--stk) = ( rt_ubase_t ) 99; /* X9 */
- *(--stk) = ( rt_ubase_t ) 88; /* X8 */
- *(--stk) = ( rt_ubase_t ) 11; /* X11 */
- *(--stk) = ( rt_ubase_t ) 10; /* X10 */
- *(--stk) = ( rt_ubase_t ) 13; /* X13 */
- *(--stk) = ( rt_ubase_t ) 12; /* X12 */
- *(--stk) = ( rt_ubase_t ) 15; /* X15 */
- *(--stk) = ( rt_ubase_t ) 14; /* X14 */
- *(--stk) = ( rt_ubase_t ) 17; /* X17 */
- *(--stk) = ( rt_ubase_t ) 16; /* X16 */
- *(--stk) = ( rt_ubase_t ) 19; /* X19 */
- *(--stk) = ( rt_ubase_t ) 18; /* X18 */
- *(--stk) = ( rt_ubase_t ) 21; /* X21 */
- *(--stk) = ( rt_ubase_t ) 20; /* X20 */
- *(--stk) = ( rt_ubase_t ) 23; /* X23 */
- *(--stk) = ( rt_ubase_t ) 22; /* X22 */
- *(--stk) = ( rt_ubase_t ) 25; /* X25 */
- *(--stk) = ( rt_ubase_t ) 24; /* X24 */
- *(--stk) = ( rt_ubase_t ) 27; /* X27 */
- *(--stk) = ( rt_ubase_t ) 26; /* X26 */
- *(--stk) = ( rt_ubase_t ) 29; /* X29 */
- *(--stk) = ( rt_ubase_t ) 28; /* X28 */
- *(--stk) = ( rt_ubase_t ) 0; /* XZR - has no effect, used so there are an even number of registers. */
- *(--stk) = ( rt_ubase_t ) texit; /* X30 - procedure call link register. */
+ *(--stk) = ( rt_ubase_t ) 11; /* X1 */
+ *(--stk) = ( rt_ubase_t ) parameter; /* X0 */
+ *(--stk) = ( rt_ubase_t ) 33; /* X3 */
+ *(--stk) = ( rt_ubase_t ) 22; /* X2 */
+ *(--stk) = ( rt_ubase_t ) 55; /* X5 */
+ *(--stk) = ( rt_ubase_t ) 44; /* X4 */
+ *(--stk) = ( rt_ubase_t ) 77; /* X7 */
+ *(--stk) = ( rt_ubase_t ) 66; /* X6 */
+ *(--stk) = ( rt_ubase_t ) 99; /* X9 */
+ *(--stk) = ( rt_ubase_t ) 88; /* X8 */
+ *(--stk) = ( rt_ubase_t ) 11; /* X11 */
+ *(--stk) = ( rt_ubase_t ) 10; /* X10 */
+ *(--stk) = ( rt_ubase_t ) 13; /* X13 */
+ *(--stk) = ( rt_ubase_t ) 12; /* X12 */
+ *(--stk) = ( rt_ubase_t ) 15; /* X15 */
+ *(--stk) = ( rt_ubase_t ) 14; /* X14 */
+ *(--stk) = ( rt_ubase_t ) 17; /* X17 */
+ *(--stk) = ( rt_ubase_t ) 16; /* X16 */
+ *(--stk) = ( rt_ubase_t ) 19; /* X19 */
+ *(--stk) = ( rt_ubase_t ) 18; /* X18 */
+ *(--stk) = ( rt_ubase_t ) 21; /* X21 */
+ *(--stk) = ( rt_ubase_t ) 20; /* X20 */
+ *(--stk) = ( rt_ubase_t ) 23; /* X23 */
+ *(--stk) = ( rt_ubase_t ) 22; /* X22 */
+ *(--stk) = ( rt_ubase_t ) 25; /* X25 */
+ *(--stk) = ( rt_ubase_t ) 24; /* X24 */
+ *(--stk) = ( rt_ubase_t ) 27; /* X27 */
+ *(--stk) = ( rt_ubase_t ) 26; /* X26 */
+ *(--stk) = ( rt_ubase_t ) 29; /* X29 */
+ *(--stk) = ( rt_ubase_t ) 28; /* X28 */
+ *(--stk) = ( rt_ubase_t ) 0; /* XZR - has no effect, used so there are an even number of registers. */
+ *(--stk) = ( rt_ubase_t ) texit; /* X30 - procedure call link register. */
- current_el = rt_hw_get_current_el();
+ current_el = rt_hw_get_current_el();
- if(current_el == 3)
- {
- *(--stk) = INITIAL_SPSR_EL3;
- }
- else if(current_el == 2)
- {
- *(--stk) = INITIAL_SPSR_EL2;
- }
- else
- {
- *(--stk) = INITIAL_SPSR_EL1;
- }
+ if(current_el == 3)
+ {
+ *(--stk) = INITIAL_SPSR_EL3;
+ }
+ else if(current_el == 2)
+ {
+ *(--stk) = INITIAL_SPSR_EL2;
+ }
+ else
+ {
+ *(--stk) = INITIAL_SPSR_EL1;
+ }
- *(--stk) = ( rt_ubase_t ) tentry; /* Exception return address. */
+ *(--stk) = ( rt_ubase_t ) tentry; /* Exception return address. */
- /* return task's current stack address */
- return (rt_uint8_t *)stk;
+ /* return task's current stack address */
+ return (rt_uint8_t *)stk;
}
diff --git a/libcpu/aarch64/cortex-a53/trap.c b/libcpu/aarch64/cortex-a53/trap.c
index 41d4d620f6..d43e0e4d6a 100644
--- a/libcpu/aarch64/cortex-a53/trap.c
+++ b/libcpu/aarch64/cortex-a53/trap.c
@@ -1,8 +1,8 @@
/*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
- *
+ *
* Date Author Notes
* 2018-10-06 ZhaoXiaowei the first version
*/
@@ -28,14 +28,14 @@ void rt_hw_show_register(struct rt_hw_exp_stack *regs)
rt_kprintf("Execption:\n");
rt_kprintf("r00:0x%16.16lx r01:0x%16.16lx r02:0x%16.16lx r03:0x%16.16lx\n", regs->x0, regs->x1, regs->x2, regs->x3);
rt_kprintf("r04:0x%16.16lx r05:0x%16.16lx r06:0x%16.16lx r07:0x%16.16lx\n", regs->x4, regs->x5, regs->x6, regs->x7);
- rt_kprintf("r08:0x%16.16lx r09:0x%16.16lx r10:0x%16.16lx r11:0x%16.16lx\n", regs->x8, regs->x9, regs->x10, regs->x11);
- rt_kprintf("r12:0x%16.16lx r13:0x%16.16lx r14:0x%16.16lx r15:0x%16.16lx\n", regs->x12, regs->x13, regs->x14, regs->x15);
- rt_kprintf("r16:0x%16.16lx r17:0x%16.16lx r18:0x%16.16lx r19:0x%16.16lx\n", regs->x16, regs->x17, regs->x18, regs->x19);
- rt_kprintf("r20:0x%16.16lx r21:0x%16.16lx r22:0x%16.16lx r23:0x%16.16lx\n", regs->x20, regs->x21, regs->x22, regs->x23);
+ rt_kprintf("r08:0x%16.16lx r09:0x%16.16lx r10:0x%16.16lx r11:0x%16.16lx\n", regs->x8, regs->x9, regs->x10, regs->x11);
+ rt_kprintf("r12:0x%16.16lx r13:0x%16.16lx r14:0x%16.16lx r15:0x%16.16lx\n", regs->x12, regs->x13, regs->x14, regs->x15);
+ rt_kprintf("r16:0x%16.16lx r17:0x%16.16lx r18:0x%16.16lx r19:0x%16.16lx\n", regs->x16, regs->x17, regs->x18, regs->x19);
+ rt_kprintf("r20:0x%16.16lx r21:0x%16.16lx r22:0x%16.16lx r23:0x%16.16lx\n", regs->x20, regs->x21, regs->x22, regs->x23);
rt_kprintf("r24:0x%16.16lx r25:0x%16.16lx r26:0x%16.16lx r27:0x%16.16lx\n", regs->x24, regs->x25, regs->x26, regs->x27);
- rt_kprintf("r28:0x%16.16lx r29:0x%16.16lx r30:0x%16.16lx\n", regs->x28, regs->x29, regs->x30);
- rt_kprintf("spsr:0x%16.16lx\n", regs->spsr);
- rt_kprintf("return pc:0x%16.16lx\n", regs->pc);
+ rt_kprintf("r28:0x%16.16lx r29:0x%16.16lx r30:0x%16.16lx\n", regs->x28, regs->x29, regs->x30);
+ rt_kprintf("spsr:0x%16.16lx\n", regs->spsr);
+ rt_kprintf("return pc:0x%16.16lx\n", regs->pc);
}
/**
@@ -57,7 +57,7 @@ void rt_hw_trap_error(struct rt_hw_exp_stack *regs)
}
#define GIC_ACK_INTID_MASK (0x000003ff)
-#define CORE0_IRQ_SOURCE (0x40000060)
+#define CORE0_IRQ_SOURCE (0x40000060)
void rt_hw_trap_irq(void)
{