diff options
| author | Shell <[email protected]> | 2023-02-14 23:08:32 +0800 |
|---|---|---|
| committer | GitHub <[email protected]> | 2023-02-14 23:08:32 +0800 |
| commit | 2d0974908659bd41d748e69fac0166c37b15cb02 (patch) | |
| tree | ef9a9eb4ee3d6351138349d2314f48ccb9e6fa36 /libcpu/arm/cortex-a | |
| parent | fc1aced66574e6ef144b6b228978e734456e6f95 (diff) | |
[rt-smart] PV_OFFSET as a variable (#6904)
* [rt-smart/mem] remove pv_offset
* [rt-smart] list kernel space command
* [rt-smart] restore ioremap region
* [revert] restore kernel space isolation
* [rt-smart/pv_off] code format
* [rt-smart] add get_pvoff()
* [pvoffset] pvoff as constant for C codes
* [pvoff] pvoff as interfaces
Diffstat (limited to 'libcpu/arm/cortex-a')
| -rw-r--r-- | libcpu/arm/cortex-a/mmu.c | 3 | ||||
| -rw-r--r-- | libcpu/arm/cortex-a/start_gcc.S | 20 |
2 files changed, 18 insertions, 5 deletions
diff --git a/libcpu/arm/cortex-a/mmu.c b/libcpu/arm/cortex-a/mmu.c index 150dd98b27..12d441d8e9 100644 --- a/libcpu/arm/cortex-a/mmu.c +++ b/libcpu/arm/cortex-a/mmu.c @@ -24,7 +24,6 @@ #include "ioremap.h" #else #define KERNEL_VADDR_START 0 -#define PV_OFFSET 0 #endif /* level1 page table, each entry for 1MB memory. */ @@ -59,6 +58,8 @@ void rt_hw_init_mmu_table(struct mem_desc *mdesc, rt_uint32_t size) /* set page table */ for(; size > 0; size--) { + if (mdesc->paddr_start == (rt_uint32_t)ARCH_MAP_FAILED) + mdesc->paddr_start = mdesc->vaddr_start + PV_OFFSET; rt_hw_mmu_setmtt(mdesc->vaddr_start, mdesc->vaddr_end, mdesc->paddr_start, mdesc->attr); mdesc++; diff --git a/libcpu/arm/cortex-a/start_gcc.S b/libcpu/arm/cortex-a/start_gcc.S index 94f96468fa..b1cddebe0b 100644 --- a/libcpu/arm/cortex-a/start_gcc.S +++ b/libcpu/arm/cortex-a/start_gcc.S @@ -102,7 +102,10 @@ continue: isb #ifdef RT_USING_SMART - ldr r5, =PV_OFFSET + /* load r5 with PV_OFFSET */ + ldr r7, =_reset + adr r5, _reset + sub r5, r5, r7 mov r7, #0x100000 sub r7, #1 @@ -166,6 +169,9 @@ bss_loop: strlo r0,[r1],#4 /* clear 4 bytes */ blo bss_loop /* loop until done */ + mov r0, r5 + bl rt_kmem_pvoff_set + #ifdef RT_USING_SMP mrc p15, 0, r1, c1, c0, 1 mov r0, #(1<<6) @@ -173,7 +179,10 @@ bss_loop: mcr p15, 0, r1, c1, c0, 1 /* enable smp */ #endif - /* initialize the mmu table and enable mmu */ + /** + * void rt_hw_init_mmu_table(struct mem_desc *mdesc, rt_uint32_t size) + * initialize the mmu table and enable mmu + */ ldr r0, =platform_mem_desc ldr r1, =platform_mem_desc_size ldr r1, [r1] @@ -595,16 +604,19 @@ vector_resv: bl rt_hw_trap_resv b . -#ifdef RT_USING_SMP .global rt_hw_clz rt_hw_clz: clz r0, r0 bx lr +#ifdef RT_USING_SMP + .global rt_secondary_cpu_entry rt_secondary_cpu_entry: #ifdef RT_USING_SMART - ldr r5, =PV_OFFSET + ldr r0, =_reset + adr r5, _reset + sub r5, r5, r0 ldr lr, =after_enable_mmu_n ldr r0, =init_mtbl |