diff options
| author | liuxianliang <[email protected]> | 2021-04-06 10:42:58 +0800 |
|---|---|---|
| committer | liuxianliang <[email protected]> | 2021-04-06 10:42:58 +0800 |
| commit | 233e1cd8bc7cbdc38006dfc18adde8bc2595620f (patch) | |
| tree | cec4669f56b09734b7dcc2682d854fef325722b8 /libcpu/arm/cortex-m7 | |
| parent | 4431c4796fb3e26fb66c012feb8bf47f3292b473 (diff) | |
| parent | c5a0df2254bd6fadc941a33d9066ce6b972c4274 (diff) | |
Merge branch 'master' of https://github.com/RT-Thread/rt-thread into develop_one
Diffstat (limited to 'libcpu/arm/cortex-m7')
| -rw-r--r-- | libcpu/arm/cortex-m7/cpu_cache.c | 4 | ||||
| -rw-r--r-- | libcpu/arm/cortex-m7/cpuport.c | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/libcpu/arm/cortex-m7/cpu_cache.c b/libcpu/arm/cortex-m7/cpu_cache.c index 350b819c00..417558e285 100644 --- a/libcpu/arm/cortex-m7/cpu_cache.c +++ b/libcpu/arm/cortex-m7/cpu_cache.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -13,7 +13,7 @@ #include <rtdef.h> #include <board.h> -/* The L1-caches on all Cortex®-M7s are divided into lines of 32 bytes. */ +/* The L1-caches on all Cortex®-M7s are divided into lines of 32 bytes. */ #define L1CACHE_LINESIZE_BYTE (32) void rt_hw_cpu_icache_enable(void) diff --git a/libcpu/arm/cortex-m7/cpuport.c b/libcpu/arm/cortex-m7/cpuport.c index aeb9f14ac5..dbc42d21cf 100644 --- a/libcpu/arm/cortex-m7/cpuport.c +++ b/libcpu/arm/cortex-m7/cpuport.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * |