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authorBernard Xiong <[email protected]>2021-05-28 16:20:08 +0800
committerGitHub <[email protected]>2021-05-28 16:20:08 +0800
commit92beddf3bccf6346e26aa097f82464456fb8e6bd (patch)
tree197e4a108118dda016ea02274172f0c40e7ee8ed /libcpu/arm/lpc24xx/interrupt.c
parentb18a99b44240ec3152011e159cc24a5af8dff0ce (diff)
parent03f4d40e30f3c94e1db0b3a65b3610dee695694a (diff)
Merge pull request #4737 from mysterywolf/3,1,xformatv3.1.5
[lts 3.1.x] format codes
Diffstat (limited to 'libcpu/arm/lpc24xx/interrupt.c')
-rw-r--r--libcpu/arm/lpc24xx/interrupt.c72
1 files changed, 36 insertions, 36 deletions
diff --git a/libcpu/arm/lpc24xx/interrupt.c b/libcpu/arm/lpc24xx/interrupt.c
index a855de1e11..87bb86b879 100644
--- a/libcpu/arm/lpc24xx/interrupt.c
+++ b/libcpu/arm/lpc24xx/interrupt.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -13,10 +13,10 @@
#include <rthw.h>
#include "LPC24xx.h"
-#define MAX_HANDLERS 32
+#define MAX_HANDLERS 32
/* exception and interrupt handler table */
-struct rt_irq_desc irq_desc[MAX_HANDLERS];
+struct rt_irq_desc irq_desc[MAX_HANDLERS];
extern rt_uint32_t rt_interrupt_nest;
@@ -30,19 +30,19 @@ rt_uint32_t rt_thread_switch_interrupt_flag;
/*@{*/
void rt_hw_interrupt_handler(int vector, void *param)
{
- rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
+ rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
}
void rt_hw_interrupt_init(void)
{
- register int i;
+ register int i;
- rt_uint32_t *vect_addr, *vect_cntl;
-
- /* initialize VIC*/
- VICIntEnClr = 0xffffffff;
- VICVectAddr = 0;
- VICIntSelect = 0;
+ rt_uint32_t *vect_addr, *vect_cntl;
+
+ /* initialize VIC*/
+ VICIntEnClr = 0xffffffff;
+ VICVectAddr = 0;
+ VICIntSelect = 0;
/* init exceptions table */
rt_memset(irq_desc, 0x00, sizeof(irq_desc));
@@ -50,27 +50,27 @@ void rt_hw_interrupt_init(void)
{
irq_desc[i].handler = rt_hw_interrupt_handler;
- vect_addr = (rt_uint32_t *)(VIC_BASE_ADDR + 0x100 + i*4);
- vect_cntl = (rt_uint32_t *)(VIC_BASE_ADDR + 0x200 + i*4);
- *vect_addr = (rt_uint32_t)&irq_desc[i];
- *vect_cntl = 0xF;
+ vect_addr = (rt_uint32_t *)(VIC_BASE_ADDR + 0x100 + i*4);
+ vect_cntl = (rt_uint32_t *)(VIC_BASE_ADDR + 0x200 + i*4);
+ *vect_addr = (rt_uint32_t)&irq_desc[i];
+ *vect_cntl = 0xF;
}
-
- /* init interrupt nest, and context in thread sp */
- rt_interrupt_nest = 0;
- rt_interrupt_from_thread = 0;
- rt_interrupt_to_thread = 0;
- rt_thread_switch_interrupt_flag = 0;
+
+ /* init interrupt nest, and context in thread sp */
+ rt_interrupt_nest = 0;
+ rt_interrupt_from_thread = 0;
+ rt_interrupt_to_thread = 0;
+ rt_thread_switch_interrupt_flag = 0;
}
void rt_hw_interrupt_mask(int vector)
{
- VICIntEnClr = (1 << vector);
+ VICIntEnClr = (1 << vector);
}
void rt_hw_interrupt_umask(int vector)
{
- VICIntEnable = (1 << vector);
+ VICIntEnable = (1 << vector);
}
/**
@@ -82,22 +82,22 @@ void rt_hw_interrupt_umask(int vector)
*
* @return the old handler
*/
-rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
- void *param, const char *name)
+rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
+ void *param, const char *name)
{
- rt_isr_handler_t old_handler = RT_NULL;
+ rt_isr_handler_t old_handler = RT_NULL;
- if(vector >= 0 && vector < MAX_HANDLERS)
- {
- old_handler = irq_desc[vector].handler;
- if (handler != RT_NULL)
- {
- irq_desc[vector].handler = handler;
- irq_desc[vector].param = param;
- }
- }
+ if(vector >= 0 && vector < MAX_HANDLERS)
+ {
+ old_handler = irq_desc[vector].handler;
+ if (handler != RT_NULL)
+ {
+ irq_desc[vector].handler = handler;
+ irq_desc[vector].param = param;
+ }
+ }
- return old_handler;
+ return old_handler;
}
/*@}*/