summaryrefslogtreecommitdiff
path: root/libcpu/arm
diff options
context:
space:
mode:
authorWayne Lin <[email protected]>2023-08-24 14:43:58 +0800
committerMeco Man <[email protected]>2023-08-24 12:54:19 -0400
commit86f72ed6da1a8a3f5d95e40c83151f7f91d971bb (patch)
tree922ba3f9805f3fe1a8348ffffd7ce74c017a2b9f /libcpu/arm
parentd55066e10d9b7e1bab272d9df3a1ff120e17a62e (diff)
Update NuMaker-M2354 BSP building.
1. Remove rt_hw_cpu_reset implementation in libcpu. 2. Update configuration. 3. Add drv_log.h for building. 4. Fix warnings.
Diffstat (limited to 'libcpu/arm')
-rw-r--r--libcpu/arm/cortex-m23/cpuport.c18
1 files changed, 0 insertions, 18 deletions
diff --git a/libcpu/arm/cortex-m23/cpuport.c b/libcpu/arm/cortex-m23/cpuport.c
index f831db416d..20c611a6f0 100644
--- a/libcpu/arm/cortex-m23/cpuport.c
+++ b/libcpu/arm/cortex-m23/cpuport.c
@@ -118,21 +118,3 @@ void rt_hw_hard_fault_exception(struct exception_stack_frame *contex)
while (1);
}
-#define SCB_CFSR (*(volatile const unsigned *)0xE000ED28) /* Configurable Fault Status Register */
-#define SCB_HFSR (*(volatile const unsigned *)0xE000ED2C) /* HardFault Status Register */
-#define SCB_MMAR (*(volatile const unsigned *)0xE000ED34) /* MemManage Fault Address register */
-#define SCB_BFAR (*(volatile const unsigned *)0xE000ED38) /* Bus Fault Address Register */
-#define SCB_AIRCR (*(volatile unsigned long *)0xE000ED00) /* Reset control Address Register */
-#define SCB_RESET_VALUE 0x05FA0004 /* Reset value, write to SCB_AIRCR can reset cpu */
-
-#define SCB_CFSR_MFSR (*(volatile const unsigned char*)0xE000ED28) /* Memory-management Fault Status Register */
-#define SCB_CFSR_BFSR (*(volatile const unsigned char*)0xE000ED29) /* Bus Fault Status Register */
-#define SCB_CFSR_UFSR (*(volatile const unsigned short*)0xE000ED2A) /* Usage Fault Status Register */
-
-/**
- * reset CPU
- */
-void rt_hw_cpu_reset(void)
-{
- SCB_AIRCR = SCB_RESET_VALUE;//((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |SCB_AIRCR_SYSRESETREQ_Msk);
-}