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authorbernard.xiong <[email protected]>2010-09-05 08:21:56 +0000
committerbernard.xiong <[email protected]>2010-09-05 08:21:56 +0000
commit8c8530ff6e156fa3d40f0bddfe7bad2b43a662cc (patch)
treee98a752b7d666b3396ddc466d20a57e9adeb9b82 /libcpu/mips
parentb63899a92ada1326302840b3b9ce358f948e87aa (diff)
update interrupt handler.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@893 bbd45198-f89e-11dd-88c7-29a3b14d5316
Diffstat (limited to 'libcpu/mips')
-rw-r--r--libcpu/mips/jz47xx/cpu.c7
-rw-r--r--libcpu/mips/jz47xx/interrupt.c21
2 files changed, 18 insertions, 10 deletions
diff --git a/libcpu/mips/jz47xx/cpu.c b/libcpu/mips/jz47xx/cpu.c
index bb6cd22c53..ca1f1a461c 100644
--- a/libcpu/mips/jz47xx/cpu.c
+++ b/libcpu/mips/jz47xx/cpu.c
@@ -1,5 +1,12 @@
/*
* File : cpu.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2010, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
* Change Logs:
* Date Author Notes
* 2010-07-09 Bernard first version
diff --git a/libcpu/mips/jz47xx/interrupt.c b/libcpu/mips/jz47xx/interrupt.c
index b8567bfdc9..8c44c63cc0 100644
--- a/libcpu/mips/jz47xx/interrupt.c
+++ b/libcpu/mips/jz47xx/interrupt.c
@@ -1,5 +1,11 @@
/*
* File : interrupt.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2010, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
@@ -17,11 +23,6 @@ rt_uint32_t rt_thread_switch_interrput_flag;
static rt_isr_handler_t irq_handle_table[JZ47XX_MAX_INTR];
-extern rt_uint32_t cp0_get_cause(void);
-extern rt_uint32_t cp0_get_status(void);
-extern void disable_cp0_counter(void);
-extern void enable_cp0_counter(void);
-
/**
* @addtogroup Jz47xx
*/
@@ -58,7 +59,7 @@ void rt_hw_interrupt_init()
void rt_hw_interrupt_mask(int vector)
{
/* mask interrupt */
- INTC_IMSR = 1 << vector;
+ INTC_IMSR = (1 << vector);
}
/**
@@ -67,7 +68,7 @@ void rt_hw_interrupt_mask(int vector)
*/
void rt_hw_interrupt_umask(int vector)
{
- INTC_IMCR = 1 << vector;
+ INTC_IMCR = (1 << vector);
}
/**
@@ -87,14 +88,14 @@ void rt_hw_interrupt_install(int vector, rt_isr_handler_t new_handler, rt_isr_ha
}
}
+static rt_uint32_t pending ;
void rt_interrupt_dispatch(void *ptreg)
{
int i;
- rt_uint32_t pending;
rt_isr_handler_t irq_func;
/* the hardware interrupt */
- pending = INTC_IPR;
+ pending |= INTC_IPR;
if (!pending) return;
for (i = 0; i < JZ47XX_MAX_INTR; i++)
@@ -108,7 +109,7 @@ void rt_interrupt_dispatch(void *ptreg)
(*irq_func)(i);
/* ack interrupt */
- INTC_IPR = 1 << i;
+ INTC_IPR = (1 << i);
}
}
}