[ARCH/RISC-V] Next RISC-V (#10320)

* [libcpu][risc-v] Refactor the RISC-V architecture port

Introduce an opt-in unified RISC-V common layer for RV32 and RV64 while keeping existing BSPs on the legacy implementation during migration.

- use ARCH_RISCV and ARCH_CPU_64BIT for architecture and XLEN selection
- unify context, trap, MMU, cache, timer, SBI, SMP and ISA handling
- add PLIC, CLIC, ACLINT, APLIC and IMSIC support
- map physical hart IDs to contiguous logical CPU IDs
- add T-Head vendor overrides while preserving legacy ports
- migrate qemu-virt64-riscv with RV32 and RV64 support
- update clock_time, MM, LWP, OFW, PCI and Rust integration

Existing BSPs continue using legacy_common or common64 unless they select RT_USING_RISCV_NEW_COMMON.

Signed-off-by: GuEe-GUI <[email protected]>

* [libcpu][risc-v] skip disabled CPU nodes in early FDT walk

Rbb666 noted that rt_hw_fdt_install_early() walked every /cpus child
without checking status, so disabled cores still joined hart registration
and MMU capability probing. Skip nodes that are not okay/ok via
rt_fdt_device_is_available() before reading reg or mmu-type.

Signed-off-by: seteiro <[email protected]>

* [libcpu][risc-v] Fix per-CPU page table mapping

- reuse existing non-leaf page table entries when mapping per-CPU areas
- reject leaf entry conflicts instead of overwriting mappings

Signed-off-by: GuEe-GUI <[email protected]>

---------

Signed-off-by: GuEe-GUI <[email protected]>
Signed-off-by: seteiro <[email protected]>
Co-authored-by: seteiro <[email protected]>

1 files changed, 55 insertions, 14 deletions

diff --git a/libcpu/risc-v/SConscript b/libcpu/risc-v/SConscript
index fafb8524ec..eb259f7125 100644
--- a/libcpu/risc-v/SConscript
+++ b/libcpu/risc-v/SConscript
@@ -1,27 +1,68 @@
-# RT-Thread building script for bridge
+# RT-Thread building script for RISC-V
 
 import os
 from building import *
 
 Import('rtconfig')
 
-common64_arch = ['virt64', 'c906', 'c908','ur-cp100']
-cwd   = GetCurrentDir()
+cwd = GetCurrentDir()
 group = []
-list  = os.listdir(cwd)
+cpu = getattr(rtconfig, 'CPU', '')
+vendor = getattr(rtconfig, 'VENDOR', '')
+
+if GetDepend('RT_USING_RISCV_NEW_COMMON'):
+    bsp_path = Dir('#').abspath
+
+    if not os.path.exists(os.path.join(bsp_path, 'link.lds')):
+        Env['LINKFLAGS'] = Env['LINKFLAGS'].replace(
+            'link.lds', os.path.join(cwd, 'link.lds'))
+        Preprocessing('link.lds.S', '.lds',
+                      CPPPATH=[bsp_path, os.path.join(cwd, 'common', 'include')])
+
+    # The new common owns the complete C runtime entry.
+    Env['LINKFLAGS'] += ' -nostartfiles'
 
-# add common code files
-if rtconfig.CPU in common64_arch :
-    group += SConscript(os.path.join('common64', 'SConscript'))
-else :
     group += SConscript(os.path.join('common', 'SConscript'))
 
-group += SConscript(os.path.join('vector', 'SConscript'))
+    # New vendor ports are architecture-wide overrides, not per-CPU copies.
+    if vendor:
+        vendor_path = os.path.join(cwd, vendor)
+        vendor_script = os.path.join(vendor, 'SConscript')
+
+        if os.path.isfile(os.path.join(cwd, vendor_script)):
+            Env.Append(CPPPATH=[vendor_path])
+            group += SConscript(vendor_script)
+
+            if os.path.exists(os.path.join(vendor_path, 'mmu_vendor.h')):
+                Env.Append(ASFLAGS=' -D__HAS_MMU_VENDOR__')
+                Env.Append(CFLAGS=' -D__HAS_MMU_VENDOR__')
+                Env.Append(CXXFLAGS=' -D__HAS_MMU_VENDOR__')
+
+            if os.path.exists(os.path.join(vendor_path, 'opcode_vendor.h')):
+                Env.Append(ASFLAGS=' -D__HAS_OPCODE_VENDOR__')
+                Env.Append(CFLAGS=' -D__HAS_OPCODE_VENDOR__')
+                Env.Append(CXXFLAGS=' -D__HAS_OPCODE_VENDOR__')
+else:
+    common64_cpus = ['virt64', 'c906', 'c908', 'ur-cp100']
+
+    if cpu in common64_cpus:
+        group += SConscript(os.path.join('common64', 'SConscript'))
+    else:
+        group += SConscript(os.path.join('legacy_common', 'SConscript'))
+
+    group += SConscript(os.path.join('vector', 'SConscript'))
+
+    if vendor:
+        if vendor == 't-head':
+            port_script = os.path.join('legacy-t-head', cpu, 'SConscript')
+        else:
+            port_script = os.path.join(vendor, cpu, 'SConscript')
 
-# cpu porting code files
-if 'VENDOR' in vars(rtconfig) and rtconfig.VENDOR != '':
-    group = group + SConscript(os.path.join(rtconfig.VENDOR, rtconfig.CPU, 'SConscript'))
-elif rtconfig.CPU in list:
-    group = group + SConscript(os.path.join(rtconfig.CPU, 'SConscript'))
+        if os.path.isfile(os.path.join(cwd, port_script)):
+            group += SConscript(port_script)
+    elif cpu:
+        port_script = os.path.join(cpu, 'SConscript')
+        if os.path.isfile(os.path.join(cwd, port_script)):
+            group += SConscript(port_script)
 
 Return('group')