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authorblta <[email protected]>2022-04-04 11:07:49 +0800
committerguo <[email protected]>2022-04-06 11:06:55 +0800
commit99526cc047466a46a5683075c94c618599cca27d (patch)
tree74d658caba70ff6051f5d60d48201232d5269ed8 /libcpu/risc-v/SConscript
parentcceefd5ef99d54d082487f19a1afcd74fbc6e765 (diff)
[bsp/ch32v103r-evt] add ch32v103r-evt bsp
feat: move MRS demo source to bsp and libraries folder feat: update Sconscript feat: modify SConstruct in the bsp feat: use the rtconfig.py of gd32vf103v-eval bsp to modify feat: use the MRS's rtconfig.h temoporarily feat: update Kconfig files feat: use the MRS's .ld and rename as link.lds feat: add ch32v1 porting folder perf: remove board/system_ch32v10x.c fix: define SOC_ARM_SERIES_CH32V103 in rtconfig.h fix: add some neccessary macros in rtconfig.h perf: use the menuconfig to generate rtconfig.h feat: add readme.md fix: correct the bad encode in main.c fix: include board.h in main.c perf: check and update README.md perf: remove ch32f10x_port_cn.md feat: ignore the standard libraries's CI checking feat: add sdk_dist.py fix: correct some style errors again perf: simply the board/kconfig fix: format ch32v103r-evt fix: format drvs and libcpu
Diffstat (limited to 'libcpu/risc-v/SConscript')
-rw-r--r--libcpu/risc-v/SConscript2
1 files changed, 2 insertions, 0 deletions
diff --git a/libcpu/risc-v/SConscript b/libcpu/risc-v/SConscript
index 95b5370c1a..ffb2e7ae17 100644
--- a/libcpu/risc-v/SConscript
+++ b/libcpu/risc-v/SConscript
@@ -16,6 +16,8 @@ elif rtconfig.CPU == "nuclei" :
group = group
elif rtconfig.CPU == "virt64" :
group = group
+elif rtconfig.CPU == "ch32v1" :
+ group = group
else :
group = group + SConscript(os.path.join('common', 'SConscript'))