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| author | Yaochenger <[email protected]> | 2022-12-09 04:01:37 +0800 |
|---|---|---|
| committer | GitHub <[email protected]> | 2022-12-08 15:01:37 -0500 |
| commit | 9d8da76543e924027fcbb3191d6ec69bf4602549 (patch) | |
| tree | 100fdd071b87e58540a578e1b8ebc60016216baa /libcpu/risc-v/SConscript | |
| parent | ab9a80c4081c4bcb8e25c0e2100671d8f981b95b (diff) | |
[bsp] add core-v-mcu bsp (#6705)
* add core-v-mcu bsp
* 规范bsp格式 添加readme
* 修改readme
Co-authored-by: [email protected] <ws051000>
Diffstat (limited to 'libcpu/risc-v/SConscript')
| -rw-r--r-- | libcpu/risc-v/SConscript | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/libcpu/risc-v/SConscript b/libcpu/risc-v/SConscript index 1a279ffe4b..6639ea7a22 100644 --- a/libcpu/risc-v/SConscript +++ b/libcpu/risc-v/SConscript @@ -24,6 +24,8 @@ elif rtconfig.CPU == "ch32v3" : group = group elif rtconfig.CPU == "hpmicro": group = group +elif rtconfig.CPU == "cv32e40p": + group = group else : group = group + SConscript(os.path.join('common', 'SConscript')) |