add new bsp tms320c6678

原始提交PR：https://gitee.com/rtthread/rt-thread/pulls/372
提交者：https://gitee.com/wei-handong

----------------------

在TI公司C6000 DSP处理器上成功移植rt-thread操作系统；主要在libcpu/ti-dsp/c6x添加keystone架构底层代码，在bsp/ti-c6678添加bsp工程，该工程已在本人的开发板上成功运行

* 添加TMS320C6678处理器，keystone架构底层代码

* 添加支持中断栈部分代码，修改格式

* 修改汇编rt_hw_context_switch_to处关于时间槽的使用；修改格式

* 修改使用C语言构建任务栈帧，清除fls和ffs对<c6x.h>文件的依赖

* 修改bsp tms320c6678工程，并测试

* 删除依赖TI的KeyStone_common.c文件

* 添加编译说明

* update bsp/ti-tms320c6678/README.md.

* format code

Co-authored-by: Huang bo <[email protected]>
Co-authored-by: hdwei <[email protected]>
Co-authored-by: bernard <[email protected]>
Co-authored-by: rtthread-bot <[email protected]>
Co-authored-by: Meco Man <[email protected]>

1 files changed, 95 insertions, 0 deletions

diff --git a/libcpu/ti-dsp/c6x/vector.asm b/libcpu/ti-dsp/c6x/vector.asm
new file mode 100644
index 0000000000..9c74de1bb7
--- /dev/null
+++ b/libcpu/ti-dsp/c6x/vector.asm
@@ -0,0 +1,95 @@
+;
+; Copyright (c) 2021, Shenzhen Academy of Aerospace Technology
+;
+; SPDX-License-Identifier: Apache-2.0
+;
+; Change Logs:
+; Date           Author       Notes
+; 2021-11-16     Dystopia     the first version
+;
+
+;-----------------------------------------------------------
+;           interrupt vector table for C6000 DSP
+;-----------------------------------------------------------
+
+;-----------------------------------------------------------
+;                       extern function
+;-----------------------------------------------------------
+    .ref _c_int00       ; entry point
+    .ref _nmi_handler
+    .ref _bad_handler
+    .ref _int4_handler
+    .ref _int5_handler
+    .ref _int6_handler
+    .ref _int7_handler
+    .ref _int8_handler
+    .ref _int9_handler
+    .ref _int10_handler
+    .ref _int11_handler
+    .ref _int12_handler
+    .ref _int13_handler
+    .ref _int14_handler
+    .ref _int15_handler
+
+;-----------------------------------------------------------
+;                       macro definition
+;-----------------------------------------------------------
+
+;
+; create interrupt vector for reset (interrupt 0)
+;
+VEC_RESET .macro addr
+    MVKL  addr,B0
+    MVKH  addr,B0
+    B     B0
+    MVC   PCE1,B0
+    NOP   4
+    .align 32
+    .endm
+
+;
+; create interrupt vector for other used interrupts
+;
+IRQVEC  .macro  __name, __isr
+    .align 32
+    .hidden __name
+    .global __name
+__name:
+    B   .S2 __isr
+    NOP
+    NOP
+    NOP
+    NOP
+    NOP
+    NOP
+    NOP
+        .endm
+;
+;-----------------------------------------------------------
+;
+
+;
+; vector table
+;
+    .sect ".vecs"
+    .align 32
+    .global vector
+vector:
+    VEC_RESET       _c_int00
+    IRQVEC NMI,     _nmi_handler
+    IRQVEC AINT,    _bad_handler
+    IRQVEC MSGINT,  _bad_handler
+    IRQVEC INT4,    _int4_handler
+    IRQVEC INT5,    _int5_handler
+    IRQVEC INT6,    _int6_handler
+    IRQVEC INT7,    _int7_handler
+    IRQVEC INT8,    _int8_handler
+    IRQVEC INT9,    _int9_handler
+    IRQVEC INT10,   _int10_handler
+    IRQVEC INT11,   _int11_handler
+    IRQVEC INT12,   _int12_handler
+    IRQVEC INT13,   _int13_handler
+    IRQVEC INT14,   _int14_handler
+    IRQVEC INT15,   _int15_handler
+
+    .end