diff options
| author | bernard.xiong <[email protected]> | 2009-09-18 13:10:14 +0000 |
|---|---|---|
| committer | bernard.xiong <[email protected]> | 2009-09-18 13:10:14 +0000 |
| commit | 04234d1821be9b5686dd661a448270f2092ae05d (patch) | |
| tree | a11f4180587157364b60a89f827877560b5e340a /libcpu | |
| parent | 90238948bad877b7226c0545742ff67d585977fb (diff) | |
fix context switch bug because interrupt preemptive occurs during context switch procedure.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@48 bbd45198-f89e-11dd-88c7-29a3b14d5316
Diffstat (limited to 'libcpu')
| -rw-r--r-- | libcpu/arm/stm32/context_rvds.S | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/libcpu/arm/stm32/context_rvds.S b/libcpu/arm/stm32/context_rvds.S index 11e88c351c..6904f58563 100644 --- a/libcpu/arm/stm32/context_rvds.S +++ b/libcpu/arm/stm32/context_rvds.S @@ -81,6 +81,11 @@ rt_hw_context_switch PROC ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
rt_hw_pend_sv PROC
EXPORT rt_hw_pend_sv
+
+ ; disable interrupt to protect context switch
+ MRS r2, PRIMASK
+ CPSID I
+
; clear rt_thread_switch_interrput_flag to 0
LDR r0, =rt_thread_switch_interrput_flag
MOV r1, #0x00
@@ -103,6 +108,9 @@ swtich_to_thread LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
MSR psp, r1 ; update stack pointer
+ ; restore interrupt
+ MSR PRIMASK, r2
+
ORR lr, lr, #0x04
BX lr
ENDP
@@ -183,7 +191,6 @@ rt_hw_interrupt_thread_switch PROC _no_switch
BX lr
- NOP
ENDP
|