diff options
| author | laidene <[email protected]> | 2026-04-02 09:36:07 +0800 |
|---|---|---|
| committer | Rbb666 <[email protected]> | 2026-04-03 20:13:35 +0800 |
| commit | 11a1348ed6d2490a54e0e248fdf031119d5779ff (patch) | |
| tree | 041d21561556efa45d9fd27bad9f93a8dd15b837 /libcpu | |
| parent | ebe65849dbf33bb8c5774876aa46fa17b1a5f998 (diff) | |
[docs][libcpu][arm][cortex-a] correct TLBIALL comments in start_gcc.S
Diffstat (limited to 'libcpu')
| -rw-r--r-- | libcpu/arm/cortex-a/start_gcc.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/libcpu/arm/cortex-a/start_gcc.S b/libcpu/arm/cortex-a/start_gcc.S index 2beef86a93..300d83df98 100644 --- a/libcpu/arm/cortex-a/start_gcc.S +++ b/libcpu/arm/cortex-a/start_gcc.S @@ -182,7 +182,7 @@ continue_exit: /* invalidate TLB, I-cache and branch predictor */ mov r0, #0 - mcr p15, 0, r0, c8, c7, 0 /* ITLBIALL */ + mcr p15, 0, r0, c8, c7, 0 /* TLBIALL */ mcr p15, 0, r0, c7, c5, 0 /* ICIALLU */ mcr p15, 0, r0, c7, c5, 6 /* BPIALL */ dsb @@ -268,7 +268,7 @@ enable_mmu_page_table_early: /* invalidate TLB, I-cache and branch predictor */ mov r0, #0 - mcr p15, 0, r0, c8, c7, 0 /* ITLBIALL */ + mcr p15, 0, r0, c8, c7, 0 /* TLBIALL */ mcr p15, 0, r0, c7, c5, 0 /* ICIALLU */ mcr p15, 0, r0, c7, c5, 6 /* BPIALL */ @@ -660,7 +660,7 @@ rt_hw_mmu_switch: /* invalidate TLB, I-cache and branch predictor */ mov r0, #0 - mcr p15, 0, r0, c8, c7, 0 /* ITLBIALL */ + mcr p15, 0, r0, c8, c7, 0 /* TLBIALL */ mcr p15, 0, r0, c7, c5, 0 /* ICIALLU */ mcr p15, 0, r0, c7, c5, 6 /* BPIALL */ |