feat: Added rt_interrupt_context* family for nested interrupt handling

These changes introduce the rt_interrupt_context family, providing a
mechanism for managing nested interrupts. The context management
ensures proper storage and retrieval of interrupt states, improving
reliability in nested interrupt scenarios by enabling context tracking
across different interrupt levels. This enhancement is essential for
platforms where nested interrupt handling is crucial, such as in real-
time or multi-threaded applications.

Changes:
- Defined rt_interrupt_context structure with context and node fields
  in `rtdef.h` to support nested interrupts.
- Added rt_slist_pop function in `rtservice.h` for simplified node
  removal in singly linked lists.
- Declared rt_interrupt_context_push, rt_interrupt_context_pop, and
  rt_interrupt_context_get functions in `rtthread.h` to manage the
  interrupt/exception stack.
- Modified AArch64 CPU support in `cpuport.h` to include
  rt_hw_show_register for debugging registers.
- Refactored `_rt_hw_trap_irq` in `trap.c` for context-aware IRQ
  handling, with stack push/pop logic to handle nested contexts.
- Implemented interrupt context push, pop, and retrieval logic in
  `irq.c` to manage context at the CPU level.

Signed-off-by: Shell <[email protected]>

3 files changed, 21 insertions, 2 deletions

diff --git a/libcpu/Kconfig b/libcpu/Kconfig
index eebb26e281..1a7422540e 100644
--- a/libcpu/Kconfig
+++ b/libcpu/Kconfig
@@ -219,6 +219,7 @@ config ARCH_ARMV8
     select ARCH_ARM
     select ARCH_ARM_MMU
     select RT_USING_CPU_FFS
+    select ARCH_USING_IRQ_CTX_LIST
 
 config ARCH_MIPS
     bool
@@ -325,3 +326,7 @@ config ARCH_CPU_STACK_GROWS_UPWARD
 config ARCH_USING_HW_THREAD_SELF
     bool
     default n
+
+config ARCH_USING_IRQ_CTX_LIST
+    bool
+    default n
diff --git a/libcpu/aarch64/common/include/armv8.h b/libcpu/aarch64/common/include/armv8.h
index 7388b078a2..7d7fbd79d9 100644
--- a/libcpu/aarch64/common/include/armv8.h
+++ b/libcpu/aarch64/common/include/armv8.h
@@ -145,6 +145,8 @@ struct rt_hw_exp_stack
     rt_uint128_t fpu[32];
 };
 
+void rt_hw_show_register(struct rt_hw_exp_stack *regs);
+
 #define SP_ELx     ((unsigned long)0x01)
 #define SP_EL0     ((unsigned long)0x00)
 #define PSTATE_EL1 ((unsigned long)0x04)
diff --git a/libcpu/aarch64/common/trap.c b/libcpu/aarch64/common/trap.c
index ca6ad1761f..6586091a93 100644
--- a/libcpu/aarch64/common/trap.c
+++ b/libcpu/aarch64/common/trap.c
@@ -167,7 +167,7 @@ void rt_hw_show_register(struct rt_hw_exp_stack *regs)
 }
 
 #ifndef RT_USING_PIC
-void rt_hw_trap_irq(void)
+static void _rt_hw_trap_irq(rt_interrupt_context_t irq_context)
 {
 #ifdef SOC_BCM283x
     extern rt_uint8_t core_timer_flag;
@@ -269,12 +269,24 @@ void rt_hw_trap_irq(void)
 #endif
 }
 #else
-void rt_hw_trap_irq(void)
+static void _rt_hw_trap_irq(struct rt_interrupt_context *this_ctx)
 {
     rt_pic_do_traps();
 }
 #endif
 
+void rt_hw_trap_irq(struct rt_hw_exp_stack *regs)
+{
+    struct rt_interrupt_context this_ctx = {
+        .context = regs,
+        .node = RT_SLIST_OBJECT_INIT(this_ctx.node),
+    };
+
+    rt_interrupt_context_push(&this_ctx);
+    _rt_hw_trap_irq(&this_ctx);
+    rt_interrupt_context_pop();
+}
+
 #ifdef RT_USING_SMART
 #define DBG_CHECK_EVENT(regs, esr) dbg_check_event(regs, esr)
 #else