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authorBernard Xiong <[email protected]>2026-01-31 17:44:27 +0800
committerGitHub <[email protected]>2026-01-31 17:44:27 +0800
commit743b614875fc33257be47ab53b6c5e040ec27893 (patch)
treee4b78b63c5c331e4a69a9d01ffcc9ed24389a9b8 /libcpu
parentf2a646cff4947bef7554ddbf443765e63d888d96 (diff)
[components][clock_time] Refactor time subsystem around clock_time (#11111)
* [components][clock_time] Refactor time subsystem around clock_time Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals. Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional. Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer. * [components][clock_time] Use BSP-provided clock timer frequency on riscv64 * [risc-v] Use runtime clock timer frequency for tick and delays * [bsp] Add clock timer frequency hooks for riscv64 boards * [bsp] Update Renesas RA driver doc clock_timer link * [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh * [bsp][rk3500] Update rk3500 clock configuration * [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays * [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci * [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings. * [bsp][raspi3] select clock time for systimer * [bsp][hpm5300evk] Trim trailing blank line * [bsp][hpm5301evklite] Trim trailing blank line * [bsp][hpm5e00evk] Trim trailing blank line * [bsp][hpm6200evk] Trim trailing blank line * [bsp][hpm6300evk] Trim trailing blank line * [bsp][hpm6750evk] Trim trailing blank line * [bsp][hpm6750evk2] Trim trailing blank line * [bsp][hpm6750evkmini] Trim trailing blank line * [bsp][hpm6800evk] Trim trailing blank line * [bsp][hpm6e00evk] Trim trailing blank line * [bsp][nxp] switch lpc178x to gcc and remove mcx timer source * [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue. * [docs][clock_time] add clock time documentation * [docs][clock_time] Update clock time subsystem documentation - Update device driver index to use correct page reference - Clarify upper layer responsibilities in architecture overview - Update README to describe POSIX/libc, Soft RTC, and device driver usage - Refine architecture diagram with improved layout and color scheme - Remove obsolete clock_timer.md file * [kernel][utest] Trim trailing space * [clock_time] Fix hrtimer wrap handling * [clock_time] fix the static rt_inline issue * [clock_time] fix the rt_clock_hrtimer_control result issue
Diffstat (limited to 'libcpu')
-rw-r--r--libcpu/Kconfig2
-rw-r--r--libcpu/aarch64/common/SConscript2
-rw-r--r--libcpu/aarch64/common/gtimer.c8
-rw-r--r--libcpu/aarch64/common/setup.c24
-rw-r--r--libcpu/risc-v/common64/tick.c51
5 files changed, 51 insertions, 36 deletions
diff --git a/libcpu/Kconfig b/libcpu/Kconfig
index b089b61725..22381a42fe 100644
--- a/libcpu/Kconfig
+++ b/libcpu/Kconfig
@@ -264,7 +264,7 @@ if ARCH_RISCV64
config ARCH_USING_RISCV_COMMON64
bool
depends on ARCH_RISCV64
- select RT_USING_CPUTIME
+ select RT_USING_CLOCK_TIME
select ARCH_USING_NEW_CTX_SWITCH
help
Using the common64 implementation under ./libcpu/risc-v
diff --git a/libcpu/aarch64/common/SConscript b/libcpu/aarch64/common/SConscript
index 13e5f2fdb0..99645683b8 100644
--- a/libcpu/aarch64/common/SConscript
+++ b/libcpu/aarch64/common/SConscript
@@ -21,7 +21,7 @@ if GetDepend('RT_USING_OFW') == False:
if GetDepend('RT_USING_PIC') == True:
SrcRemove(src, ['gicv3.c', 'gic.c', 'gtimer.c', 'interrupt.c'])
-if GetDepend('RT_HWTIMER_ARM_ARCH') == True:
+if GetDepend('RT_CLOCK_TIME_ARM_ARCH') == True:
SrcRemove(src, ['gtimer.c'])
group = DefineGroup('CPU', src, depend = [''], CPPPATH = CPPPATH)
diff --git a/libcpu/aarch64/common/gtimer.c b/libcpu/aarch64/common/gtimer.c
index 514ec4e043..46ce287aeb 100644
--- a/libcpu/aarch64/common/gtimer.c
+++ b/libcpu/aarch64/common/gtimer.c
@@ -13,8 +13,8 @@
#include <gtimer.h>
#include <cpuport.h>
-#ifdef RT_USING_KTIME
-#include <ktime.h>
+#ifdef RT_USING_CLOCK_TIME
+#include <drivers/clock_time.h>
#endif
#define EL1_PHY_TIMER_IRQ_NUM 30
@@ -42,8 +42,8 @@ void rt_hw_gtimer_local_enable(void)
rt_hw_gtimer_disable();
rt_hw_set_gtimer_val(timer_step);
rt_hw_interrupt_umask(EL1_PHY_TIMER_IRQ_NUM);
-#ifdef RT_USING_KTIME
- rt_ktime_cputimer_init();
+#ifdef RT_USING_CLOCK_TIME
+ rt_clock_time_source_init();
#endif
rt_hw_gtimer_enable();
}
diff --git a/libcpu/aarch64/common/setup.c b/libcpu/aarch64/common/setup.c
index 2109179134..79df36ec5b 100644
--- a/libcpu/aarch64/common/setup.c
+++ b/libcpu/aarch64/common/setup.c
@@ -72,7 +72,7 @@ void rt_hw_fdt_install_early(void *fdt)
#endif
}
-#ifdef RT_USING_HWTIMER
+#ifdef RT_USING_CLOCK_TIME
static rt_ubase_t loops_per_tick[RT_CPUS_NR];
static rt_ubase_t cpu_get_cycles(void)
@@ -132,7 +132,7 @@ static void cpu_us_delay(rt_uint32_t us)
rt_hw_cpu_relax();
}
}
-#endif /* RT_USING_HWTIMER */
+#endif /* RT_USING_CLOCK_TIME */
rt_weak void rt_hw_idle_wfi(void)
{
@@ -188,14 +188,14 @@ rt_inline void cpu_info_init(void)
rt_hw_cpu_dcache_ops(RT_HW_CACHE_FLUSH, rt_cpu_mpidr_table, sizeof(rt_cpu_mpidr_table));
-#ifdef RT_USING_HWTIMER
+#if defined(RT_USING_CLOCK_TIME) && defined(RT_USING_DM)
cpu_loops_per_tick_init();
- if (!rt_device_hwtimer_us_delay)
+ if (!rt_clock_timer_us_delay)
{
- rt_device_hwtimer_us_delay = &cpu_us_delay;
+ rt_clock_timer_us_delay = &cpu_us_delay;
}
-#endif /* RT_USING_HWTIMER */
+#endif /* RT_USING_CLOCK_TIME && RT_USING_DM */
}
rt_inline rt_size_t string_to_size(const char *string, const char *who)
@@ -382,10 +382,10 @@ void rt_hw_common_setup(void)
rt_hw_uart_init();
#endif
-#ifndef RT_HWTIMER_ARM_ARCH
+#ifndef RT_CLOCK_TIME_ARM_ARCH
/* initialize timer for os tick */
rt_hw_gtimer_init();
-#endif /* !RT_HWTIMER_ARM_ARCH */
+#endif /* !RT_CLOCK_TIME_ARM_ARCH */
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
@@ -478,10 +478,10 @@ rt_weak void rt_hw_secondary_cpu_bsp_start(void)
#endif /* BSP_USING_GICV3 */
#endif
-#ifndef RT_HWTIMER_ARM_ARCH
+#ifndef RT_CLOCK_TIME_ARM_ARCH
/* initialize timer for os tick */
rt_hw_gtimer_local_enable();
-#endif /* !RT_HWTIMER_ARM_ARCH */
+#endif /* !RT_CLOCK_TIME_ARM_ARCH */
rt_dm_secondary_cpu_init();
@@ -491,8 +491,8 @@ rt_weak void rt_hw_secondary_cpu_bsp_start(void)
LOG_I("Call cpu %d on %s", cpu_id, "success");
-#ifdef RT_USING_HWTIMER
- if (rt_device_hwtimer_us_delay == &cpu_us_delay)
+#if defined(RT_USING_CLOCK_TIME) && defined(RT_USING_DM)
+ if (rt_clock_timer_us_delay == &cpu_us_delay)
{
cpu_loops_per_tick_init();
}
diff --git a/libcpu/risc-v/common64/tick.c b/libcpu/risc-v/common64/tick.c
index 8e8ff86a74..06ede73a54 100644
--- a/libcpu/risc-v/common64/tick.c
+++ b/libcpu/risc-v/common64/tick.c
@@ -6,49 +6,61 @@
* Change Logs:
* Date Author Notes
* 2018/10/28 Bernard The unify RISC-V porting code.
- * 2024/07/08 Shell Using CPUTIME as tick
+ * 2024/07/08 Shell Using clock_time as tick
*/
#include <rthw.h>
#include <rtthread.h>
-#include <drivers/cputime.h>
#include <encoding.h>
#include "sbi.h"
-#ifdef RT_USING_KTIME
-#include <ktime.h>
+#ifdef RT_USING_CLOCK_TIME
+#include <drivers/clock_time.h>
#endif
static volatile unsigned long tick_cycles = 0;
+static rt_uint64_t _clock_timer_freq = 0;
+
+rt_weak rt_uint64_t rt_hw_get_clock_timer_freq(void)
+{
+ return CLOCK_TIMER_FREQ;
+}
+
+static rt_uint64_t _riscv_read_time(void)
+{
+ unsigned long time_elapsed;
+
+ __asm__ __volatile__("rdtime %0" : "=r"(time_elapsed));
+ return (rt_uint64_t)time_elapsed;
+}
int tick_isr(void)
{
rt_tick_increase();
- sbi_set_timer(clock_cpu_gettime() + tick_cycles);
+ sbi_set_timer(_riscv_read_time() + tick_cycles);
return 0;
}
-/* BSP should config clockbase frequency */
-RT_STATIC_ASSERT(defined_clockbase_freq, CPUTIME_TIMER_FREQ != 0);
-
/* Sets and enable the timer interrupt */
int rt_hw_tick_init(void)
{
+ rt_uint64_t freq = rt_hw_get_clock_timer_freq();
+ RT_ASSERT(freq != 0);
+
+ _clock_timer_freq = freq;
+
/* calculate the tick cycles */
- tick_cycles = CPUTIME_TIMER_FREQ / RT_TICK_PER_SECOND;
+ tick_cycles = freq / RT_TICK_PER_SECOND;
/* Clear the Supervisor-Timer bit in SIE */
clear_csr(sie, SIP_STIP);
- /* Init riscv timer */
- riscv_cputime_init();
-
/* Set timer */
- sbi_set_timer(clock_cpu_gettime() + tick_cycles);
+ sbi_set_timer(_riscv_read_time() + tick_cycles);
-#ifdef RT_USING_KTIME
- rt_ktime_cputimer_init();
+#ifdef RT_USING_CLOCK_TIME
+ rt_clock_time_source_init();
#endif
/* Enable the Supervisor-Timer bit in SIE */
set_csr(sie, SIP_STIP);
@@ -66,11 +78,14 @@ void rt_hw_us_delay(rt_uint32_t us)
unsigned long start_time;
unsigned long end_time;
unsigned long run_time;
+ rt_uint64_t freq;
- start_time = clock_cpu_gettime();
- end_time = start_time + us * (CPUTIME_TIMER_FREQ / 1000000);
+ start_time = _riscv_read_time();
+ freq = _clock_timer_freq ? _clock_timer_freq : rt_hw_get_clock_timer_freq();
+ RT_ASSERT(freq != 0);
+ end_time = start_time + (rt_uint64_t)us * freq / 1000000ULL;
do
{
- run_time = clock_cpu_gettime();
+ run_time = _riscv_read_time();
} while(run_time < end_time);
}