diff options
| author | Shell <[email protected]> | 2024-03-28 23:32:05 +0800 |
|---|---|---|
| committer | GitHub <[email protected]> | 2024-03-28 23:32:05 +0800 |
| commit | 751c2ada4362db4f80ef48c8cf5d4ed4c7472c51 (patch) | |
| tree | 94df183ccf730ef9aad4c5fe6cf06022c70083ba /libcpu | |
| parent | 56fd6984ac234a29bee58998a9d43db125b20705 (diff) | |
[libcpu/aarch64] improve performance of IRQ dis/en-able (#8687)
Signed-off-by: Shell <[email protected]>
Diffstat (limited to 'libcpu')
| -rw-r--r-- | libcpu/aarch64/common/context_gcc.S | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/libcpu/aarch64/common/context_gcc.S b/libcpu/aarch64/common/context_gcc.S index bbd7e72371..39a516dc59 100644 --- a/libcpu/aarch64/common/context_gcc.S +++ b/libcpu/aarch64/common/context_gcc.S @@ -314,6 +314,12 @@ rt_hw_interrupt_is_disabled: .globl rt_hw_interrupt_disable rt_hw_interrupt_disable: MRS X0, DAIF + AND X0, X0, #0xc0 + CMP X0, #0xc0 + /* branch if bits not both set(zero) */ + BNE 1f + RET +1: MSR DAIFSet, #3 DSB NSH ISB @@ -324,6 +330,12 @@ rt_hw_interrupt_disable: */ .globl rt_hw_interrupt_enable rt_hw_interrupt_enable: + AND X0, X0, #0xc0 + CMP X0, #0xc0 + /* branch if one of the bits not set(zero) */ + BNE 1f + RET +1: ISB DSB NSH AND X0, X0, #0xc0 @@ -439,7 +451,7 @@ rt_hw_context_switch_exit: MOV X0, SP RESTORE_CONTEXT -#else /* RT_USING_SMP */ +#else /* !RT_USING_SMP */ /* * void rt_hw_context_switch_to(rt_ubase_t to); |