Merge branch 'master' of https://github.com/RT-Thread/rt-thread

10 files changed, 114 insertions, 117 deletions

diff --git a/libcpu/arm/cortex-m0/context_gcc.S b/libcpu/arm/cortex-m0/context_gcc.S
index 997c345179..3186a5ae9f 100644
--- a/libcpu/arm/cortex-m0/context_gcc.S
+++ b/libcpu/arm/cortex-m0/context_gcc.S
@@ -79,8 +79,8 @@ _reswitch:
     STR     R1, [R0]
     BX      LR
 
-/* R0 --> swith from thread stack
- * R1 --> swith to thread stack
+/* R0 --> switch from thread stack
+ * R1 --> switch to thread stack
  * psr, pc, LR, R12, R3, R2, R1, R0 are pushed into [from] stack
  */
     .global PendSV_Handler
@@ -103,7 +103,7 @@ PendSV_Handler:
     LDR     R0, =rt_interrupt_from_thread
     LDR     R1, [R0]
     CMP     R1, #0x00
-    BEQ     swtich_to_thread    /* skip register save at the first time */
+    BEQ     switch_to_thread    /* skip register save at the first time */
 
 	MRS     R1, PSP                 /* get from thread stack pointer */
 
@@ -118,7 +118,7 @@ PendSV_Handler:
     MOV     R6, R10
     MOV     R7, R11
     STMIA   R1!, {R4 - R7}          /* push thread {R8 - R11} high register to thread stack */
-swtich_to_thread:
+switch_to_thread:
     LDR     R1, =rt_interrupt_to_thread
     LDR     R1, [R1]
     LDR     R1, [R1]                /* load thread stack pointer */
diff --git a/libcpu/arm/cortex-m0/context_iar.S b/libcpu/arm/cortex-m0/context_iar.S
index f1318e552d..67ea808d8c 100644
--- a/libcpu/arm/cortex-m0/context_iar.S
+++ b/libcpu/arm/cortex-m0/context_iar.S
@@ -81,8 +81,8 @@ _reswitch
     STR     r1, [r0]
     BX      LR
 
-; r0 --> swith from thread stack
-; r1 --> swith to thread stack
+; r0 --> switch from thread stack
+; r1 --> switch to thread stack
 ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
     EXPORT PendSV_Handler
 PendSV_Handler:
@@ -104,7 +104,7 @@ PendSV_Handler:
     LDR     r0, =rt_interrupt_from_thread
     LDR     r1, [r0]
     CMP     r1, #0x00
-    BEQ     swtich_to_thread        ; skip register save at the first time
+    BEQ     switch_to_thread        ; skip register save at the first time
 
     MRS     r1, psp                 ; get from thread stack pointer
 
@@ -120,7 +120,7 @@ PendSV_Handler:
     MOV     r7, r11
     STMIA   r1!, {r4 - r7}          ; push thread {r8 - r11} high register to thread stack
 
-swtich_to_thread
+switch_to_thread
     LDR     r1, =rt_interrupt_to_thread
     LDR     r1, [r1]
     LDR     r1, [r1]                ; load thread stack pointer
diff --git a/libcpu/arm/cortex-m0/context_rvds.S b/libcpu/arm/cortex-m0/context_rvds.S
index 9c2f42ac83..89ac029282 100644
--- a/libcpu/arm/cortex-m0/context_rvds.S
+++ b/libcpu/arm/cortex-m0/context_rvds.S
@@ -85,8 +85,8 @@ _reswitch
     BX      LR
     ENDP
 
-; r0 --> swith from thread stack
-; r1 --> swith to thread stack
+; r0 --> switch from thread stack
+; r1 --> switch to thread stack
 ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
 PendSV_Handler    PROC
     EXPORT PendSV_Handler
@@ -108,7 +108,7 @@ PendSV_Handler    PROC
     LDR     r0, =rt_interrupt_from_thread
     LDR     r1, [r0]
     CMP     r1, #0x00
-    BEQ     swtich_to_thread        ; skip register save at the first time
+    BEQ     switch_to_thread        ; skip register save at the first time
 
     MRS     r1, psp                 ; get from thread stack pointer
 
@@ -124,7 +124,7 @@ PendSV_Handler    PROC
     MOV     r7, r11
     STMIA   r1!, {r4 - r7}          ; push thread {r8 - r11} high register to thread stack
 
-swtich_to_thread
+switch_to_thread
     LDR     r1, =rt_interrupt_to_thread
     LDR     r1, [r1]
     LDR     r1, [r1]                ; load thread stack pointer
diff --git a/libcpu/arm/cortex-m3/context_gcc.S b/libcpu/arm/cortex-m3/context_gcc.S
index 7ff810d534..ca961bbd87 100644
--- a/libcpu/arm/cortex-m3/context_gcc.S
+++ b/libcpu/arm/cortex-m3/context_gcc.S
@@ -80,8 +80,8 @@ _reswitch:
     STR     R1, [R0]
     BX      LR
 
-/* R0 --> swith from thread stack
- * R1 --> swith to thread stack
+/* R0 --> switch from thread stack
+ * R1 --> switch to thread stack
  * psr, pc, LR, R12, R3, R2, R1, R0 are pushed into [from] stack
  */
     .global PendSV_Handler
@@ -102,14 +102,14 @@ PendSV_Handler:
 
     LDR     R0, =rt_interrupt_from_thread
     LDR     R1, [R0]
-    CBZ     R1, swtich_to_thread    /* skip register save at the first time */
+    CBZ     R1, switch_to_thread    /* skip register save at the first time */
 
     MRS     R1, PSP                 /* get from thread stack pointer */
     STMFD   R1!, {R4 - R11}         /* push R4 - R11 register */
     LDR     R0, [R0]
     STR     R1, [R0]                /* update from thread stack pointer */
 
-swtich_to_thread:
+switch_to_thread:
     LDR     R1, =rt_interrupt_to_thread
     LDR     R1, [R1]
     LDR     R1, [R1]                /* load thread stack pointer */
diff --git a/libcpu/arm/cortex-m3/context_iar.S b/libcpu/arm/cortex-m3/context_iar.S
index 7dc595f6c1..ad9fa0dd0f 100644
--- a/libcpu/arm/cortex-m3/context_iar.S
+++ b/libcpu/arm/cortex-m3/context_iar.S
@@ -81,8 +81,8 @@ _reswitch
     STR     r1, [r0]
     BX      LR
 
-; r0 --> swith from thread stack
-; r1 --> swith to thread stack
+; r0 --> switch from thread stack
+; r1 --> switch to thread stack
 ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
     EXPORT PendSV_Handler
 PendSV_Handler:
@@ -102,14 +102,14 @@ PendSV_Handler:
 
     LDR     r0, =rt_interrupt_from_thread
     LDR     r1, [r0]
-    CBZ     r1, swtich_to_thread    ; skip register save at the first time
+    CBZ     r1, switch_to_thread    ; skip register save at the first time
 
     MRS     r1, psp                 ; get from thread stack pointer
     STMFD   r1!, {r4 - r11}         ; push r4 - r11 register
     LDR     r0, [r0]
     STR     r1, [r0]                ; update from thread stack pointer
 
-swtich_to_thread
+switch_to_thread
     LDR     r1, =rt_interrupt_to_thread
     LDR     r1, [r1]
     LDR     r1, [r1]                ; load thread stack pointer
diff --git a/libcpu/arm/cortex-m3/context_rvds.S b/libcpu/arm/cortex-m3/context_rvds.S
index 7f431cc042..c86b70e1f9 100644
--- a/libcpu/arm/cortex-m3/context_rvds.S
+++ b/libcpu/arm/cortex-m3/context_rvds.S
@@ -84,8 +84,8 @@ _reswitch
     BX      LR
     ENDP
 
-; r0 --> swith from thread stack
-; r1 --> swith to thread stack
+; r0 --> switch from thread stack
+; r1 --> switch to thread stack
 ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
 PendSV_Handler   PROC
     EXPORT PendSV_Handler
@@ -105,14 +105,14 @@ PendSV_Handler   PROC
 
     LDR     r0, =rt_interrupt_from_thread
     LDR     r1, [r0]
-    CBZ     r1, swtich_to_thread    ; skip register save at the first time
+    CBZ     r1, switch_to_thread    ; skip register save at the first time
 
     MRS     r1, psp                 ; get from thread stack pointer
     STMFD   r1!, {r4 - r11}         ; push r4 - r11 register
     LDR     r0, [r0]
     STR     r1, [r0]                ; update from thread stack pointer
 
-swtich_to_thread
+switch_to_thread
     LDR     r1, =rt_interrupt_to_thread
     LDR     r1, [r1]
     LDR     r1, [r1]                ; load thread stack pointer
diff --git a/libcpu/arm/cortex-m4/context_gcc.S b/libcpu/arm/cortex-m4/context_gcc.S
index 6a910355a8..908a44f847 100644
--- a/libcpu/arm/cortex-m4/context_gcc.S
+++ b/libcpu/arm/cortex-m4/context_gcc.S
@@ -82,8 +82,8 @@ _reswitch:
     STR r1, [r0]
     BX  LR
 
-/* r0 --> swith from thread stack
- * r1 --> swith to thread stack
+/* r0 --> switch from thread stack
+ * r1 --> switch to thread stack
  * psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
  */
 .global PendSV_Handler
@@ -104,7 +104,7 @@ PendSV_Handler:
 
     LDR r0, =rt_interrupt_from_thread
     LDR r1, [r0]
-    CBZ r1, swtich_to_thread    /* skip register save at the first time */
+    CBZ r1, switch_to_thread    /* skip register save at the first time */
 
     MRS r1, psp                 /* get from thread stack pointer */
     
@@ -127,7 +127,7 @@ PendSV_Handler:
     LDR r0, [r0]
     STR r1, [r0]                /* update from thread stack pointer */
 
-swtich_to_thread:
+switch_to_thread:
     LDR r1, =rt_interrupt_to_thread
     LDR r1, [r1]
     LDR r1, [r1]                /* load thread stack pointer */
diff --git a/libcpu/arm/cortex-m4/context_iar.S b/libcpu/arm/cortex-m4/context_iar.S
index e882f36f64..8761a97052 100644
--- a/libcpu/arm/cortex-m4/context_iar.S
+++ b/libcpu/arm/cortex-m4/context_iar.S
@@ -82,8 +82,8 @@ _reswitch
     STR     r1, [r0]
     BX      LR
 
-; r0 --> swith from thread stack
-; r1 --> swith to thread stack
+; r0 --> switch from thread stack
+; r1 --> switch to thread stack
 ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
     EXPORT PendSV_Handler
 PendSV_Handler:
@@ -103,7 +103,7 @@ PendSV_Handler:
 
     LDR     r0, =rt_interrupt_from_thread
     LDR     r1, [r0]
-    CBZ     r1, swtich_to_thread    ; skip register save at the first time
+    CBZ     r1, switch_to_thread    ; skip register save at the first time
 
     MRS     r1, psp                 ; get from thread stack pointer
 
@@ -130,7 +130,7 @@ push_flag
     LDR     r0, [r0]
     STR     r1, [r0]                ; update from thread stack pointer
 
-swtich_to_thread
+switch_to_thread
     LDR     r1, =rt_interrupt_to_thread
     LDR     r1, [r1]
     LDR     r1, [r1]                ; load thread stack pointer
diff --git a/libcpu/arm/cortex-m4/context_rvds.S b/libcpu/arm/cortex-m4/context_rvds.S
index 189ae33db1..af7461fd49 100644
--- a/libcpu/arm/cortex-m4/context_rvds.S
+++ b/libcpu/arm/cortex-m4/context_rvds.S
@@ -85,8 +85,8 @@ _reswitch
     BX      LR
     ENDP
 
-; r0 --> swith from thread stack
-; r1 --> swith to thread stack
+; r0 --> switch from thread stack
+; r1 --> switch to thread stack
 ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
 PendSV_Handler   PROC
     EXPORT PendSV_Handler
@@ -106,7 +106,7 @@ PendSV_Handler   PROC
 
     LDR     r0, =rt_interrupt_from_thread
     LDR     r1, [r0]
-    CBZ     r1, swtich_to_thread    ; skip register save at the first time
+    CBZ     r1, switch_to_thread    ; skip register save at the first time
 
     MRS     r1, psp                 ; get from thread stack pointer
 
@@ -129,7 +129,7 @@ PendSV_Handler   PROC
     LDR     r0, [r0]
     STR     r1, [r0]                ; update from thread stack pointer
 
-swtich_to_thread
+switch_to_thread
     LDR     r1, =rt_interrupt_to_thread
     LDR     r1, [r1]
     LDR     r1, [r1]                ; load thread stack pointer
diff --git a/libcpu/mips/loongson_1b/interrupt.c b/libcpu/mips/loongson_1b/interrupt.c
index c5b4bad038..be65da914c 100644
--- a/libcpu/mips/loongson_1b/interrupt.c
+++ b/libcpu/mips/loongson_1b/interrupt.c
@@ -30,7 +30,7 @@ void rt_interrupt_dispatch(void *ptreg);
 void rt_hw_timer_handler();
 
 static struct ls1b_intc_regs volatile *ls1b_hw0_icregs
-	= (struct ls1b_intc_regs volatile *)(LS1B_INTREG_BASE);
+= (struct ls1b_intc_regs volatile *)(LS1B_INTREG_BASE);
 
 /**
  * @addtogroup Loongson LS1B
@@ -40,7 +40,7 @@ static struct ls1b_intc_regs volatile *ls1b_hw0_icregs
 
 static void rt_hw_interrupt_handler(int vector, void *param)
 {
-	rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
+    rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
 }
 
 /**
@@ -48,26 +48,26 @@ static void rt_hw_interrupt_handler(int vector, void *param)
  */
 void rt_hw_interrupt_init(void)
 {
-	rt_int32_t idx;
+    rt_int32_t idx;
 
-	/* pci active low */ 
-	ls1b_hw0_icregs->int_pol = -1; 	   //must be done here 20110802 lgnq
-	/* make all interrupts level triggered */ 	
-	(ls1b_hw0_icregs+0)->int_edge = 0x0000e000;
-	/* mask all interrupts */
-	(ls1b_hw0_icregs+0)->int_clr = 0xffffffff;
+    /* pci active low */
+    ls1b_hw0_icregs->int_pol = -1;	   //must be done here 20110802 lgnq
+    /* make all interrupts level triggered */
+    (ls1b_hw0_icregs+0)->int_edge = 0x0000e000;
+    /* mask all interrupts */
+    (ls1b_hw0_icregs+0)->int_clr = 0xffffffff;
 
     rt_memset(irq_handle_table, 0x00, sizeof(irq_handle_table));
-	for (idx = 0; idx < MAX_INTR; idx ++)
-	{
-		irq_handle_table[idx].handler = rt_hw_interrupt_handler;
-	}
+    for (idx = 0; idx < MAX_INTR; idx ++)
+    {
+        irq_handle_table[idx].handler = rt_hw_interrupt_handler;
+    }
 
-	/* init interrupt nest, and context in thread sp */
-	rt_interrupt_nest = 0;
-	rt_interrupt_from_thread = 0;
-	rt_interrupt_to_thread = 0;
-	rt_thread_switch_interrupt_flag = 0;
+    /* init interrupt nest, and context in thread sp */
+    rt_interrupt_nest = 0;
+    rt_interrupt_from_thread = 0;
+    rt_interrupt_to_thread = 0;
+    rt_thread_switch_interrupt_flag = 0;
 }
 
 /**
@@ -76,8 +76,8 @@ void rt_hw_interrupt_init(void)
  */
 void rt_hw_interrupt_mask(int vector)
 {
-	/* mask interrupt */
-	(ls1b_hw0_icregs+(vector>>5))->int_en &= ~(1 << (vector&0x1f));
+    /* mask interrupt */
+    (ls1b_hw0_icregs+(vector>>5))->int_en &= ~(1 << (vector&0x1f));
 }
 
 /**
@@ -86,7 +86,7 @@ void rt_hw_interrupt_mask(int vector)
  */
 void rt_hw_interrupt_umask(int vector)
 {
-	(ls1b_hw0_icregs+(vector>>5))->int_en |= (1 << (vector&0x1f));
+    (ls1b_hw0_icregs+(vector>>5))->int_en |= (1 << (vector&0x1f));
 }
 
 /**
@@ -96,22 +96,19 @@ void rt_hw_interrupt_umask(int vector)
  * @param old_handler the old interrupt service routine
  */
 rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
-        void *param, char *name)
+                                         void *param, char *name)
 {
     rt_isr_handler_t old_handler = RT_NULL;
 
-	if (vector >= 0 && vector < MAX_INTR)
-	{
+    if (vector >= 0 && vector < MAX_INTR)
+    {
         old_handler = irq_handle_table[vector].handler;
 
-        if (handler != RT_NULL)
-        {
 #ifdef RT_USING_INTERRUPT_INFO
-		    rt_strncpy(irq_handle_table[vector].name, name, RT_NAME_MAX);
+        rt_strncpy(irq_handle_table[vector].name, name, RT_NAME_MAX);
 #endif /* RT_USING_INTERRUPT_INFO */
-		    irq_handle_table[vector].handler = handler;
-            irq_handle_table[vector].param = param;
-        }
+        irq_handle_table[vector].handler = handler;
+        irq_handle_table[vector].param = param;
     }
 
     return old_handler;
@@ -121,71 +118,71 @@ void rt_interrupt_dispatch(void *ptreg)
 {
     int irq;
     void *param;
-	rt_isr_handler_t irq_func;
-	static rt_uint32_t status = 0;
-	rt_uint32_t c0_status;
-	rt_uint32_t c0_cause;
-	volatile rt_uint32_t cause_im;
-	volatile rt_uint32_t status_im;
-	rt_uint32_t pending_im;
+    rt_isr_handler_t irq_func;
+    static rt_uint32_t status = 0;
+    rt_uint32_t c0_status;
+    rt_uint32_t c0_cause;
+    volatile rt_uint32_t cause_im;
+    volatile rt_uint32_t status_im;
+    rt_uint32_t pending_im;
 
-	/* check os timer */
-	c0_status = read_c0_status();
-	c0_cause = read_c0_cause();
+    /* check os timer */
+    c0_status = read_c0_status();
+    c0_cause = read_c0_cause();
 
-	cause_im = c0_cause & ST0_IM;
-	status_im = c0_status & ST0_IM;
-	pending_im = cause_im & status_im;
+    cause_im = c0_cause & ST0_IM;
+    status_im = c0_status & ST0_IM;
+    pending_im = cause_im & status_im;
 
-	if (pending_im & CAUSEF_IP7)
-	{
-		rt_hw_timer_handler();
-	}
+    if (pending_im & CAUSEF_IP7)
+    {
+        rt_hw_timer_handler();
+    }
 
-	if (pending_im & CAUSEF_IP2)
-	{
-		/* the hardware interrupt */
-		status = ls1b_hw0_icregs->int_isr;
-		if (!status) 
-			return;
+    if (pending_im & CAUSEF_IP2)
+    {
+        /* the hardware interrupt */
+        status = ls1b_hw0_icregs->int_isr;
+        if (!status)
+            return;
 
-		for (irq = MAX_INTR; irq > 0; --irq)
-		{
-			if ((status & (1 << irq)))
-			{
-				status &= ~(1 << irq);
+        for (irq = MAX_INTR; irq > 0; --irq)
+        {
+            if ((status & (1 << irq)))
+            {
+                status &= ~(1 << irq);
 
                 irq_func = irq_handle_table[irq].handler;
                 param = irq_handle_table[irq].param;
 
-				/* do interrupt */
-                (*irq_func)(irq, param);
+                /* do interrupt */
+                irq_func(irq, param);
 
 #ifdef RT_USING_INTERRUPT_INFO
                 irq_handle_table[irq].counter++;
 #endif /* RT_USING_INTERRUPT_INFO */
 
-				/* ack interrupt */
-				ls1b_hw0_icregs->int_clr |= (1 << irq);
-			}
-		}
-	}
-	else if (pending_im & CAUSEF_IP3)
-	{		
-		rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
-	}
-	else if (pending_im & CAUSEF_IP4)
-	{		
-		rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
-	}
-	else if (pending_im & CAUSEF_IP5)
-	{		
-		rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
-	}
-	else if (pending_im & CAUSEF_IP6)
-	{		
-		rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
-	}
+                /* ack interrupt */
+                ls1b_hw0_icregs->int_clr |= (1 << irq);
+            }
+        }
+    }
+    else if (pending_im & CAUSEF_IP3)
+    {
+        rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
+    }
+    else if (pending_im & CAUSEF_IP4)
+    {
+        rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
+    }
+    else if (pending_im & CAUSEF_IP5)
+    {
+        rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
+    }
+    else if (pending_im & CAUSEF_IP6)
+    {
+        rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
+    }
 }
 
 /*@}*/