summaryrefslogtreecommitdiff
path: root/libcpu
diff options
context:
space:
mode:
authorBernard Xiong <[email protected]>2020-02-26 17:32:21 +0800
committerGitHub <[email protected]>2020-02-26 17:32:21 +0800
commit93b006e7343f012ba7d369ed2347b0ebead2cabc (patch)
treee2847718761fd28b81f9ab394b21f35729fd5465 /libcpu
parent05bd0c07973915a29bc219b1a2c091fa44be2bc9 (diff)
parent53211b3c6eeb868d975d33a02a49b8babc21f65d (diff)
Merge pull request #3412 from bigmagic123/raspi_add_coretimer
Raspi add coretimer
Diffstat (limited to 'libcpu')
-rw-r--r--libcpu/aarch64/cortex-a53/context_gcc.S25
-rw-r--r--libcpu/aarch64/cortex-a53/trap.c69
2 files changed, 48 insertions, 46 deletions
diff --git a/libcpu/aarch64/cortex-a53/context_gcc.S b/libcpu/aarch64/cortex-a53/context_gcc.S
index f58ea1b15d..d5c241036e 100644
--- a/libcpu/aarch64/cortex-a53/context_gcc.S
+++ b/libcpu/aarch64/cortex-a53/context_gcc.S
@@ -8,6 +8,31 @@
* 2018-10-06 ZhaoXiaowei the first version
*/
+ /*
+ *enable gtimer
+ */
+.globl rt_hw_gtimer_enable
+rt_hw_gtimer_enable:
+ MOV X0,#1
+ MSR CNTP_CTL_EL0,X0
+ RET
+
+/*
+ *set gtimer CNTP_TVAL_EL0 value
+ */
+.globl rt_hw_set_gtimer_val
+rt_hw_set_gtimer_val:
+ MSR CNTP_TVAL_EL0,X0
+ RET
+
+/*
+ *get gtimer frq value
+ */
+.globl rt_hw_get_gtimer_frq
+rt_hw_get_gtimer_frq:
+ MRS X0,CNTFRQ_EL0
+ RET
+
.macro SAVE_CONTEXT
/* Switch to use the EL0 stack pointer. */
diff --git a/libcpu/aarch64/cortex-a53/trap.c b/libcpu/aarch64/cortex-a53/trap.c
index 13ae6d1b9e..41d4d620f6 100644
--- a/libcpu/aarch64/cortex-a53/trap.c
+++ b/libcpu/aarch64/cortex-a53/trap.c
@@ -26,16 +26,16 @@ extern long list_thread(void);
void rt_hw_show_register(struct rt_hw_exp_stack *regs)
{
rt_kprintf("Execption:\n");
- rt_kprintf("r00:0x%16.16llx r01:0x%16.16llx r02:0x%16.16llx r03:0x%16.16llx\n", regs->x0, regs->x1, regs->x2, regs->x3);
- rt_kprintf("r04:0x%16.16llx r05:0x%16.16llx r06:0x%16.16llx r07:0x%16.16llx\n", regs->x4, regs->x5, regs->x6, regs->x7);
- rt_kprintf("r08:0x%16.16llx r09:0x%16.16llx r10:0x%16.16llx r11:0x%16.16llx\n", regs->x8, regs->x9, regs->x10, regs->x11);
- rt_kprintf("r12:0x%16.16llx r13:0x%16.16llx r14:0x%16.16llx r15:0x%16.16llx\n", regs->x12, regs->x13, regs->x14, regs->x15);
- rt_kprintf("r16:0x%16.16llx r17:0x%16.16llx r18:0x%16.16llx r19:0x%16.16llx\n", regs->x16, regs->x17, regs->x18, regs->x19);
- rt_kprintf("r20:0x%16.16llx r21:0x%16.16llx r22:0x%16.16llx r23:0x%16.16llx\n", regs->x20, regs->x21, regs->x22, regs->x23);
- rt_kprintf("r24:0x%16.16llx r25:0x%16.16llx r26:0x%16.16llx r27:0x%16.16llx\n", regs->x24, regs->x25, regs->x26, regs->x27);
- rt_kprintf("r28:0x%16.16llx r29:0x%16.16llx r30:0x%16.16llx", regs->x28, regs->x29, regs->x30);
- rt_kprintf("spsr:0x%16.16llx", regs->spsr);
- rt_kprintf("return pc:0x%16.16llx", regs->pc);
+ rt_kprintf("r00:0x%16.16lx r01:0x%16.16lx r02:0x%16.16lx r03:0x%16.16lx\n", regs->x0, regs->x1, regs->x2, regs->x3);
+ rt_kprintf("r04:0x%16.16lx r05:0x%16.16lx r06:0x%16.16lx r07:0x%16.16lx\n", regs->x4, regs->x5, regs->x6, regs->x7);
+ rt_kprintf("r08:0x%16.16lx r09:0x%16.16lx r10:0x%16.16lx r11:0x%16.16lx\n", regs->x8, regs->x9, regs->x10, regs->x11);
+ rt_kprintf("r12:0x%16.16lx r13:0x%16.16lx r14:0x%16.16lx r15:0x%16.16lx\n", regs->x12, regs->x13, regs->x14, regs->x15);
+ rt_kprintf("r16:0x%16.16lx r17:0x%16.16lx r18:0x%16.16lx r19:0x%16.16lx\n", regs->x16, regs->x17, regs->x18, regs->x19);
+ rt_kprintf("r20:0x%16.16lx r21:0x%16.16lx r22:0x%16.16lx r23:0x%16.16lx\n", regs->x20, regs->x21, regs->x22, regs->x23);
+ rt_kprintf("r24:0x%16.16lx r25:0x%16.16lx r26:0x%16.16lx r27:0x%16.16lx\n", regs->x24, regs->x25, regs->x26, regs->x27);
+ rt_kprintf("r28:0x%16.16lx r29:0x%16.16lx r30:0x%16.16lx\n", regs->x28, regs->x29, regs->x30);
+ rt_kprintf("spsr:0x%16.16lx\n", regs->spsr);
+ rt_kprintf("return pc:0x%16.16lx\n", regs->pc);
}
/**
@@ -56,7 +56,8 @@ void rt_hw_trap_error(struct rt_hw_exp_stack *regs)
rt_hw_cpu_shutdown();
}
-#define GIC_ACK_INTID_MASK 0x000003ff
+#define GIC_ACK_INTID_MASK (0x000003ff)
+#define CORE0_IRQ_SOURCE (0x40000060)
void rt_hw_trap_irq(void)
{
@@ -66,43 +67,19 @@ void rt_hw_trap_irq(void)
extern struct rt_irq_desc isr_table[];
uint32_t value = 0;
value = IRQ_PEND_BASIC & 0x3ff;
-#ifdef RT_USING_SMP
- uint32_t mailbox_data;
- uint32_t cpu_id = rt_hw_cpu_id();
- uint32_t int_source = CORE_IRQSOURCE(cpu_id);
- mailbox_data = IPI_MAILBOX_CLEAR(cpu_id);
- if (int_source & 0x0f)
+#ifdef BSP_USING_CORETIMER
+ uint32_t int_source = HWREG32(CORE0_IRQ_SOURCE) & 0x3ff;
+ if (int_source & 0x02)
{
- if (int_source & 0x08){
- isr_func = isr_table[IRQ_ARM_TIMER].handler;
-#ifdef RT_USING_INTERRUPT_INFO
- isr_table[IRQ_ARM_TIMER].counter++;
-#endif
- if (isr_func)
- {
- param = isr_table[IRQ_ARM_TIMER].param;
- isr_func(IRQ_ARM_TIMER, param);
- }
- }
- }
- if (int_source & 0xf0)
- {
- /*it's a ipi interrupt*/
- if (mailbox_data & 0x1){
- /* clear mailbox */
- IPI_MAILBOX_CLEAR(cpu_id) = mailbox_data;
- isr_func = isr_table[IRQ_ARM_MAILBOX].handler;
-#ifdef RT_USING_INTERRUPT_INFO
- isr_table[IRQ_ARM_MAILBOX].counter++;
-#endif
- if (isr_func)
- {
- param = isr_table[IRQ_ARM_MAILBOX].param;
- isr_func(IRQ_ARM_MAILBOX, param);
- }
+ isr_func = isr_table[IRQ_ARM_TIMER].handler;
+ #ifdef RT_USING_INTERRUPT_INFO
+ isr_table[IRQ_ARM_TIMER].counter++;
+ #endif
+ if (isr_func)
+ {
+ param = isr_table[IRQ_ARM_TIMER].param;
+ isr_func(IRQ_ARM_TIMER, param);
}
- else
- CORE_MAILBOX3_CLEAR(cpu_id) = mailbox_data;
}
#endif
/* local interrupt*/