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authorChen Wang <[email protected]>2025-01-27 14:18:08 +0800
committerMeco Man <[email protected]>2025-01-29 20:28:38 -0500
commitc66374705a05d1f780c66aeefabe1c88c563e065 (patch)
tree6e1b9dab05a998da55d7af1a6dbfadcc8f78e2c4 /libcpu
parent2dfbae28532303526f6bf4b60a54794c845d444a (diff)
libcpu: riscv: rv64: fixed warnings
When building bsp/cvitek/c906_little, compiler reports: ``` .../rt-thread/libcpu/risc-v/rv64/trap.c: In function 'handle_trap': .../rt-thread/libcpu/risc-v/rv64/trap.c:106:13: warning: implicit declaration of function 'rt_hw_tick_isr'; did you mean 'rt_hw_stack_init'? [-Wimplicit-function-declaration] 106 | rt_hw_tick_isr(); | ^~~~~~~~~~~~~~ | rt_hw_stack_init .../rt-thread/libcpu/risc-v/rv64/trap.c:110:13: warning: implicit declaration of function 'rt_hw_irq_isr'; did you mean 'rt_hw_soft_irq_isr'? [-Wimplicit-function-declaration] 110 | rt_hw_irq_isr(); | ^~~~~~~~~~~~~ | rt_hw_soft_irq_isr ``` rt_hw_tick_isr()/rt_hw_irq_isr() are implemented by bsp, but libcpu/risc-v/rv64 doesn't declare them, so compiler warns. There are three BSPs using 'rv64' (libcpu/risc-v/rv64): - `bsp/cvitek/c906_little/rtconfig.py` - `bsp/juicevm/rtconfig.py` - `bsp/k210/rtconfig.py` `handle_trap` in `libcpu/risc-v/rv64` is defined as weak. BSP can use this function directly or define and overload it by itself. If bsp use this function directly, bsp need to pay attention to the fact that three functions will be called in this function: - `rt_hw_soft_irq_isr` - `rt_hw_tick_isr` - `rt_hw_irq_isr` In `libcpu/risc-v/rv64`, `rt_hw_soft_irq_isr` has a weak definition, while the other two do not. This means that if the bsp does not overload `handle_trap`, bsp must define `rt_hw_tick_isr` and `rt_hw_irq_isr` itself. This is also the practice of `bsp/cvitek/c906_little`. There is also a similar bsp `bsp/k210`, and the form of `bsp/juicevm` implements `handle_trap` by itself. It seems that `rt_hw_tick_isr` and `rt_hw_irq_isr` are not required to be implemented by all BSPs using `libcpu/risc-v/rv64`. The premise for BSP to implement them is that it does not overload `handle_trap`. So declaring `rt_hw_tick_isr` and `rt_hw_irq_isr` with extern in `libcpu/risc-v/rv64` is not proper. In addition, the `rt_hw_tick_isr/rt_hw_irq_isr` are only used by `libcpu/risc-v/rv64`, so it is not worth putting the declaration in `./include/rthw.h`. Sum up, the best solution is to add weak definition to `rt_hw_tick_isr/rt_hw_irq_isr` as existing `rt_hw_soft_irq_isr`. Signed-off-by: Chen Wang <[email protected]>
Diffstat (limited to 'libcpu')
-rwxr-xr-xlibcpu/risc-v/rv64/trap.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/libcpu/risc-v/rv64/trap.c b/libcpu/risc-v/rv64/trap.c
index 781fbed72a..f0144157db 100755
--- a/libcpu/risc-v/rv64/trap.c
+++ b/libcpu/risc-v/rv64/trap.c
@@ -92,6 +92,15 @@ rt_weak void rt_hw_soft_irq_isr(void)
}
+rt_weak int rt_hw_tick_isr(void)
+{
+ return 0;
+}
+
+rt_weak void rt_hw_irq_isr(void)
+{
+
+}
rt_weak rt_size_t handle_trap(rt_size_t cause, rt_size_t epc, rt_size_t *sp)
{