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authorardafu <[email protected]>2015-04-16 10:35:12 +0800
committerardafu <[email protected]>2015-04-16 10:35:12 +0800
commitcf3d639fcb80d61e098b20ae3f24c9783a096217 (patch)
tree67af07960cdd0b0991ec67e69ee4dd82fcd86e04 /libcpu
parenta478e0b41a3f8eb6dd550fd2bc9eef68b6d47253 (diff)
[libcpu][arm926] Define vector table start at BSP/{board}/platform/ assemble INC files.
Diffstat (limited to 'libcpu')
-rw-r--r--libcpu/arm/arm926/start_gcc.S2
-rw-r--r--libcpu/arm/arm926/start_iar.S2
-rw-r--r--libcpu/arm/arm926/start_rvds.S2
3 files changed, 3 insertions, 3 deletions
diff --git a/libcpu/arm/arm926/start_gcc.S b/libcpu/arm/arm926/start_gcc.S
index ee26f96fc6..05b39debc5 100644
--- a/libcpu/arm/arm926/start_gcc.S
+++ b/libcpu/arm/arm926/start_gcc.S
@@ -142,7 +142,7 @@ Reset_Handler:
@; Copy Exception Vectors to Internal RAM
LDR R8, =entry @; Source
- LDR R9, =0x00000000 @; Destination
+ LDR R9, =VECTOR_TABLE_START @; Destination
CMP R8, R9
BEQ Setup_Stack
LDMIA R8!, {R0-R7} @; Load Vectors
diff --git a/libcpu/arm/arm926/start_iar.S b/libcpu/arm/arm926/start_iar.S
index db3a253414..b7cc9e170e 100644
--- a/libcpu/arm/arm926/start_iar.S
+++ b/libcpu/arm/arm926/start_iar.S
@@ -143,7 +143,7 @@ Reset_Handler:
; Copy Exception Vectors to Internal RAM
LDR R8, =Entry_Point ; Source
- LDR R9, =0x00000000 ; Destination
+ LDR R9, =VECTOR_TABLE_START ; Destination
CMP R8, R9
BEQ Setup_Stack
LDMIA R8!, {R0-R7} ; Load Vectors
diff --git a/libcpu/arm/arm926/start_rvds.S b/libcpu/arm/arm926/start_rvds.S
index 00e0c6136a..cabcd6590b 100644
--- a/libcpu/arm/arm926/start_rvds.S
+++ b/libcpu/arm/arm926/start_rvds.S
@@ -150,7 +150,7 @@ Reset_Handler
; Copy Exception Vectors to Internal RAM
LDR R8, =Entry_Point ; Source
- LDR R9, =0x00000000 ; Destination
+ LDR R9, =VECTOR_TABLE_START ; Destination
CMP R8, R9
BEQ Setup_Stack
LDMIA R8!, {R0-R7} ; Load Vectors