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authordzzxzz <[email protected]>2011-12-22 00:46:34 +0000
committerdzzxzz <[email protected]>2011-12-22 00:46:34 +0000
commitd6892fb4416d96c489c97617b3d64659d2405d54 (patch)
tree5b6a272549af963e5fd75bda3c80677c22b67805 /libcpu
parent70a7964f2c1e47280a853cc311f9f18d7524e9e1 (diff)
all FM3 cortex-m3 branches using /libcpu/arm/cortex-m3 instead of /libcpu/arm/fm3
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1861 bbd45198-f89e-11dd-88c7-29a3b14d5316
Diffstat (limited to 'libcpu')
-rw-r--r--libcpu/arm/fm3/context_gcc.S166
-rw-r--r--libcpu/arm/fm3/context_iar.S163
-rw-r--r--libcpu/arm/fm3/context_rvds.S162
-rw-r--r--libcpu/arm/fm3/cpuport.c122
-rw-r--r--libcpu/arm/fm3/fault_gcc.S31
-rw-r--r--libcpu/arm/fm3/fault_iar.S34
-rw-r--r--libcpu/arm/fm3/fault_rvds.S35
-rw-r--r--libcpu/arm/fm3/start_gcc.S351
-rw-r--r--libcpu/arm/fm3/start_iar.S354
-rw-r--r--libcpu/arm/fm3/start_rvds.S287
10 files changed, 0 insertions, 1705 deletions
diff --git a/libcpu/arm/fm3/context_gcc.S b/libcpu/arm/fm3/context_gcc.S
deleted file mode 100644
index 6c80c0e27d..0000000000
--- a/libcpu/arm/fm3/context_gcc.S
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
- * File : context_gcc.S
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- * 2009-10-11 Bernard first version
- */
-
-/**
- * @addtogroup FM3
- */
-/*@{*/
-
-.cpu cortex-m3
-.fpu softvfp
-.syntax unified
-.thumb
-.text
-
-.equ NVIC_INT_CTRL, 0xE000ED04 /* interrupt control state register */
-.equ NVIC_SYSPRI2, 0xE000ED20 /* system priority register (2) */
-.equ NVIC_PENDSV_PRI, 0x00FF0000 /* PendSV priority value (lowest) */
-.equ NVIC_PENDSVSET, 0x10000000 /* value to trigger PendSV exception */
-
-/*
- * rt_base_t rt_hw_interrupt_disable();
- */
-.global rt_hw_interrupt_disable
-.type rt_hw_interrupt_disable, %function
-rt_hw_interrupt_disable:
- MRS r0, PRIMASK
- CPSID I
- BX LR
-
-/*
- * void rt_hw_interrupt_enable(rt_base_t level);
- */
-.global rt_hw_interrupt_enable
-.type rt_hw_interrupt_enable, %function
-rt_hw_interrupt_enable:
- MSR PRIMASK, r0
- BX LR
-
-/*
- * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
- * r0 --> from
- * r1 --> to
- */
-.global rt_hw_context_switch_interrupt
-.type rt_hw_context_switch_interrupt, %function
-.global rt_hw_context_switch
-.type rt_hw_context_switch, %function
-
-rt_hw_context_switch_interrupt:
-rt_hw_context_switch:
- /* set rt_thread_switch_interrupt_flag to 1 */
- LDR r2, =rt_thread_switch_interrupt_flag
- LDR r3, [r2]
- CMP r3, #1
- BEQ _reswitch
- MOV r3, #1
- STR r3, [r2]
-
- LDR r2, =rt_interrupt_from_thread /* set rt_interrupt_from_thread */
- STR r0, [r2]
-
-_reswitch:
- LDR r2, =rt_interrupt_to_thread /* set rt_interrupt_to_thread */
- STR r1, [r2]
-
- LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
- LDR r1, =NVIC_PENDSVSET
- STR r1, [r0]
- BX LR
-
-/* r0 --> swith from thread stack
- * r1 --> swith to thread stack
- * psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
- */
-.global rt_hw_pend_sv
-.type rt_hw_pend_sv, %function
-rt_hw_pend_sv:
- /* disable interrupt to protect context switch */
- MRS r2, PRIMASK
- CPSID I
-
- /* get rt_thread_switch_interrupt_flag */
- LDR r0, =rt_thread_switch_interrupt_flag
- LDR r1, [r0]
- CBZ r1, pendsv_exit /* pendsv already handled */
-
- /* clear rt_thread_switch_interrupt_flag to 0 */
- MOV r1, #0x00
- STR r1, [r0]
-
- LDR r0, =rt_interrupt_from_thread
- LDR r1, [r0]
- CBZ r1, swtich_to_thread /* skip register save at the first time */
-
- MRS r1, psp /* get from thread stack pointer */
- STMFD r1!, {r4 - r11} /* push r4 - r11 register */
- LDR r0, [r0]
- STR r1, [r0] /* update from thread stack pointer */
-
-swtich_to_thread:
- LDR r1, =rt_interrupt_to_thread
- LDR r1, [r1]
- LDR r1, [r1] /* load thread stack pointer */
-
- LDMFD r1!, {r4 - r11} /* pop r4 - r11 register */
- MSR psp, r1 /* update stack pointer */
-
-pendsv_exit:
- /* restore interrupt */
- MSR PRIMASK, r2
-
- ORR lr, lr, #0x04
- BX lr
-
-/*
- * void rt_hw_context_switch_to(rt_uint32 to);
- * r0 --> to
- */
-.global rt_hw_context_switch_to
-.type rt_hw_context_switch_to, %function
-rt_hw_context_switch_to:
- LDR r1, =rt_interrupt_to_thread
- STR r0, [r1]
-
- /* set from thread to 0 */
- LDR r1, =rt_interrupt_from_thread
- MOV r0, #0x0
- STR r0, [r1]
-
- /* set interrupt flag to 1 */
- LDR r1, =rt_thread_switch_interrupt_flag
- MOV r0, #1
- STR r0, [r1]
-
- /* set the PendSV exception priority */
- LDR r0, =NVIC_SYSPRI2
- LDR r1, =NVIC_PENDSV_PRI
- LDR.W r2, [r0,#0x00] /* read */
- ORR r1,r1,r2 /* modify */
- STR r1, [r0] /* write-back */
-
- LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
- LDR r1, =NVIC_PENDSVSET
- STR r1, [r0]
-
- CPSIE I /* enable interrupts at processor level */
-
- /* never reach here! */
-
-/* compatible with old version */
-.global rt_hw_interrupt_thread_switch
-.type rt_hw_interrupt_thread_switch, %function
-rt_hw_interrupt_thread_switch:
- BX lr
- NOP
diff --git a/libcpu/arm/fm3/context_iar.S b/libcpu/arm/fm3/context_iar.S
deleted file mode 100644
index b236a60846..0000000000
--- a/libcpu/arm/fm3/context_iar.S
+++ /dev/null
@@ -1,163 +0,0 @@
-;/*
-; * File : context_iar.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
-; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
-; *
-; * Change Logs:
-; * Date Author Notes
-; * 2009-01-17 Bernard first version
-; * 2009-09-27 Bernard add protect when contex switch occurs
-; */
-
-;/**
-; * @addtogroup FM3
-; */
-;/*@{*/
-
-NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
-NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
-NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
-NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
-
- SECTION .text:CODE(2)
- THUMB
- REQUIRE8
- PRESERVE8
-
- IMPORT rt_thread_switch_interrupt_flag
- IMPORT rt_interrupt_from_thread
- IMPORT rt_interrupt_to_thread
-
-;/*
-; * rt_base_t rt_hw_interrupt_disable();
-; */
- EXPORT rt_hw_interrupt_disable
-rt_hw_interrupt_disable:
- MRS r0, PRIMASK
- CPSID I
- BX LR
-
-;/*
-; * void rt_hw_interrupt_enable(rt_base_t level);
-; */
- EXPORT rt_hw_interrupt_enable
-rt_hw_interrupt_enable:
- MSR PRIMASK, r0
- BX LR
-
-;/*
-; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
-; * r0 --> from
-; * r1 --> to
-; */
- EXPORT rt_hw_context_switch_interrupt
- EXPORT rt_hw_context_switch
-rt_hw_context_switch_interrupt:
-rt_hw_context_switch:
- ; set rt_thread_switch_interrupt_flag to 1
- LDR r2, =rt_thread_switch_interrupt_flag
- LDR r3, [r2]
- CMP r3, #1
- BEQ _reswitch
- MOV r3, #1
- STR r3, [r2]
-
- LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
- STR r0, [r2]
-
-_reswitch
- LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
- STR r1, [r2]
-
- LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
- LDR r1, =NVIC_PENDSVSET
- STR r1, [r0]
- BX LR
-
-; r0 --> swith from thread stack
-; r1 --> swith to thread stack
-; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
- EXPORT rt_hw_pend_sv
-rt_hw_pend_sv:
-
- ; disable interrupt to protect context switch
- MRS r2, PRIMASK
- CPSID I
-
- ; get rt_thread_switch_interrupt_flag
- LDR r0, =rt_thread_switch_interrupt_flag
- LDR r1, [r0]
- CBZ r1, pendsv_exit ; pendsv already handled
-
- ; clear rt_thread_switch_interrupt_flag to 0
- MOV r1, #0x00
- STR r1, [r0]
-
- LDR r0, =rt_interrupt_from_thread
- LDR r1, [r0]
- CBZ r1, swtich_to_thread ; skip register save at the first time
-
- MRS r1, psp ; get from thread stack pointer
- STMFD r1!, {r4 - r11} ; push r4 - r11 register
- LDR r0, [r0]
- STR r1, [r0] ; update from thread stack pointer
-
-swtich_to_thread
- LDR r1, =rt_interrupt_to_thread
- LDR r1, [r1]
- LDR r1, [r1] ; load thread stack pointer
-
- LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
- MSR psp, r1 ; update stack pointer
-
-pendsv_exit
- ; restore interrupt
- MSR PRIMASK, r2
-
- ORR lr, lr, #0x04
- BX lr
-
-;/*
-; * void rt_hw_context_switch_to(rt_uint32 to);
-; * r0 --> to
-; */
- EXPORT rt_hw_context_switch_to
-rt_hw_context_switch_to:
- LDR r1, =rt_interrupt_to_thread
- STR r0, [r1]
-
- ; set from thread to 0
- LDR r1, =rt_interrupt_from_thread
- MOV r0, #0x0
- STR r0, [r1]
-
- ; set interrupt flag to 1
- LDR r1, =rt_thread_switch_interrupt_flag
- MOV r0, #1
- STR r0, [r1]
-
- ; set the PendSV exception priority
- LDR r0, =NVIC_SYSPRI2
- LDR r1, =NVIC_PENDSV_PRI
- LDR.W r2, [r0,#0x00] ; read
- ORR r1,r1,r2 ; modify
- STR r1, [r0] ; write-back
-
- LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
- LDR r1, =NVIC_PENDSVSET
- STR r1, [r0]
-
- CPSIE I ; enable interrupts at processor level
-
- ; never reach here!
-
-; compatible with old version
- EXPORT rt_hw_interrupt_thread_switch
-rt_hw_interrupt_thread_switch:
- BX lr
-
- END
diff --git a/libcpu/arm/fm3/context_rvds.S b/libcpu/arm/fm3/context_rvds.S
deleted file mode 100644
index b3d09a4f43..0000000000
--- a/libcpu/arm/fm3/context_rvds.S
+++ /dev/null
@@ -1,162 +0,0 @@
-;/*
-; * File : context_rvds.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
-; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
-; *
-; * Change Logs:
-; * Date Author Notes
-; * 2011-02-23 Bernard first version
-; */
-
-NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
-NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
-NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
-NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
-
- AREA |.text|, CODE, READONLY, ALIGN=2
- THUMB
- REQUIRE8
- PRESERVE8
-
- IMPORT rt_thread_switch_interrupt_flag
- IMPORT rt_interrupt_from_thread
- IMPORT rt_interrupt_to_thread
-
-;/*
-; * rt_base_t rt_hw_interrupt_disable();
-; */
-rt_hw_interrupt_disable PROC
- EXPORT rt_hw_interrupt_disable
- MRS r0, PRIMASK
- CPSID I
- BX LR
- ENDP
-
-;/*
-; * void rt_hw_interrupt_enable(rt_base_t level);
-; */
-rt_hw_interrupt_enable PROC
- EXPORT rt_hw_interrupt_enable
- MSR PRIMASK, r0
- BX LR
- ENDP
-
-;/*
-; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
-; * r0 --> from
-; * r1 --> to
-; */
-rt_hw_context_switch_interrupt
- EXPORT rt_hw_context_switch_interrupt
-rt_hw_context_switch PROC
- EXPORT rt_hw_context_switch
-
- ; set rt_thread_switch_interrupt_flag to 1
- LDR r2, =rt_thread_switch_interrupt_flag
- LDR r3, [r2]
- CMP r3, #1
- BEQ _reswitch
- MOV r3, #1
- STR r3, [r2]
-
- LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
- STR r0, [r2]
-
-_reswitch
- LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
- STR r1, [r2]
-
- LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
- LDR r1, =NVIC_PENDSVSET
- STR r1, [r0]
- BX LR
- ENDP
-
-; r0 --> swith from thread stack
-; r1 --> swith to thread stack
-; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
-rt_hw_pend_sv PROC
- EXPORT rt_hw_pend_sv
-
- ; disable interrupt to protect context switch
- MRS r2, PRIMASK
- CPSID I
-
- ; get rt_thread_switch_interrupt_flag
- LDR r0, =rt_thread_switch_interrupt_flag
- LDR r1, [r0]
- CBZ r1, pendsv_exit ; pendsv already handled
-
- ; clear rt_thread_switch_interrupt_flag to 0
- MOV r1, #0x00
- STR r1, [r0]
-
- LDR r0, =rt_interrupt_from_thread
- LDR r1, [r0]
- CBZ r1, swtich_to_thread ; skip register save at the first time
-
- MRS r1, psp ; get from thread stack pointer
- STMFD r1!, {r4 - r11} ; push r4 - r11 register
- LDR r0, [r0]
- STR r1, [r0] ; update from thread stack pointer
-
-swtich_to_thread
- LDR r1, =rt_interrupt_to_thread
- LDR r1, [r1]
- LDR r1, [r1] ; load thread stack pointer
-
- LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
- MSR psp, r1 ; update stack pointer
-
-pendsv_exit
- ; restore interrupt
- MSR PRIMASK, r2
-
- ORR lr, lr, #0x04
- BX lr
- ENDP
-
-;/*
-; * void rt_hw_context_switch_to(rt_uint32 to);
-; * r0 --> to
-; * this fucntion is used to perform the first thread switch
-; */
-rt_hw_context_switch_to PROC
- EXPORT rt_hw_context_switch_to
- ; set to thread
- LDR r1, =rt_interrupt_to_thread
- STR r0, [r1]
-
- ; set from thread to 0
- LDR r1, =rt_interrupt_from_thread
- MOV r0, #0x0
- STR r0, [r1]
-
- ; set interrupt flag to 1
- LDR r1, =rt_thread_switch_interrupt_flag
- MOV r0, #1
- STR r0, [r1]
-
- ; set the PendSV exception priority
- LDR r0, =NVIC_SYSPRI2
- LDR r1, =NVIC_PENDSV_PRI
- LDR.W r2, [r0,#0x00] ; read
- ORR r1,r1,r2 ; modify
- STR r1, [r0] ; write-back
-
- ; trigger the PendSV exception (causes context switch)
- LDR r0, =NVIC_INT_CTRL
- LDR r1, =NVIC_PENDSVSET
- STR r1, [r0]
-
- ; enable interrupts at processor level
- CPSIE I
-
- ; never reach here!
- ENDP
-
- END
diff --git a/libcpu/arm/fm3/cpuport.c b/libcpu/arm/fm3/cpuport.c
deleted file mode 100644
index e25cb30746..0000000000
--- a/libcpu/arm/fm3/cpuport.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * File : cpuport.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- * 2011-02-23 Bernard the first version
- */
-
-#include <rthw.h>
-#include <rtthread.h>
-
-#include "mb9bf506r.h"
-#include "core_cm3.h"
-
-/* switch flag on interrupt and thread pointer to save switch record */
-rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
-rt_uint32_t rt_thread_switch_interrupt_flag;
-
-/* stack context in ARM Cortex-M3 */
-struct stack_context
-{
- rt_uint32_t r0;
- rt_uint32_t r1;
- rt_uint32_t r2;
- rt_uint32_t r3;
- rt_uint32_t r12;
- rt_uint32_t lr;
- rt_uint32_t pc;
- rt_uint32_t psr;
-};
-
-extern void rt_hw_interrupt_thread_switch(void);
-extern void list_thread(void);
-extern rt_thread_t rt_current_thread;
-void rt_hw_hard_fault_exception(struct stack_context* contex)
-{
- rt_kprintf("psr: 0x%08x\n", contex->psr);
- rt_kprintf(" pc: 0x%08x\n", contex->pc);
- rt_kprintf(" lr: 0x%08x\n", contex->lr);
- rt_kprintf("r12: 0x%08x\n", contex->r12);
- rt_kprintf("r03: 0x%08x\n", contex->r3);
- rt_kprintf("r02: 0x%08x\n", contex->r2);
- rt_kprintf("r01: 0x%08x\n", contex->r1);
- rt_kprintf("r00: 0x%08x\n", contex->r0);
-
- if (rt_current_thread != RT_NULL)
- {
- rt_kprintf("hard fault on thread: %s\n", rt_current_thread->name);
-#ifdef RT_USING_FINSH
- list_thread();
-#endif
- while (1);
- }
- else
- {
- rt_kprintf("hard fault on initialization\n");
- }
-}
-
-/**
- * reset MCU
- *
- */
-void rt_hw_cpu_reset()
-{
- NVIC_SystemReset();
-}
-
-/**
- * shutdown CPU
- *
- */
-void rt_hw_cpu_shutdown()
-{
- rt_kprintf("shutdown...\n");
-
- RT_ASSERT(0);
-}
-
-/**
- * This function will initialize thread stack
- *
- * @param tentry the entry of thread
- * @param parameter the parameter of entry
- * @param stack_addr the beginning stack address
- * @param texit the function will be called when thread exit
- *
- * @return stack address
- */
-rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
- rt_uint8_t *stack_addr, void *texit)
-{
- unsigned long *stk;
-
- stk = (unsigned long *)stack_addr;
- *(stk) = 0x01000000L; /* PSR */
- *(--stk) = (unsigned long)tentry; /* entry point, pc */
- *(--stk) = (unsigned long)texit; /* lr */
- *(--stk) = 0; /* r12 */
- *(--stk) = 0; /* r3 */
- *(--stk) = 0; /* r2 */
- *(--stk) = 0; /* r1 */
- *(--stk) = (unsigned long)parameter; /* r0 : argument */
-
- *(--stk) = 0; /* r11 */
- *(--stk) = 0; /* r10 */
- *(--stk) = 0; /* r9 */
- *(--stk) = 0; /* r8 */
- *(--stk) = 0; /* r7 */
- *(--stk) = 0; /* r6 */
- *(--stk) = 0; /* r5 */
- *(--stk) = 0; /* r4 */
-
- /* return task's current stack address */
- return (rt_uint8_t *)stk;
-}
diff --git a/libcpu/arm/fm3/fault_gcc.S b/libcpu/arm/fm3/fault_gcc.S
deleted file mode 100644
index 5e207905cf..0000000000
--- a/libcpu/arm/fm3/fault_gcc.S
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * File : fault_gcc.S
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- * 2009-10-11 Bernard first version
- */
-
-.cpu cortex-m3
-.fpu softvfp
-.syntax unified
-.thumb
-.text
-
-.global rt_hw_hard_fault
-.type rt_hw_hard_fault, %function
-rt_hw_hard_fault:
- /* get current context */
- MRS r0, psp /* get fault thread stack pointer */
- PUSH {lr}
- BL rt_hw_hard_fault_exception
- POP {lr}
-
- ORR lr, lr, #0x04
- BX lr
diff --git a/libcpu/arm/fm3/fault_iar.S b/libcpu/arm/fm3/fault_iar.S
deleted file mode 100644
index 44dec38b15..0000000000
--- a/libcpu/arm/fm3/fault_iar.S
+++ /dev/null
@@ -1,34 +0,0 @@
-;/*
-; * File : fault_iar.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
-; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
-; *
-; * Change Logs:
-; * Date Author Notes
-; * 2009-01-17 Bernard first version
-; */
-
- SECTION .text:CODE(2)
- THUMB
- REQUIRE8
- PRESERVE8
-
- IMPORT rt_hw_hard_fault_exception
-
- EXPORT rt_hw_hard_fault
-rt_hw_hard_fault:
-
- ; get current context
- MRS r0, psp ; get fault thread stack pointer
- PUSH {lr}
- BL rt_hw_hard_fault_exception
- POP {lr}
-
- ORR lr, lr, #0x04
- BX lr
-
- END
diff --git a/libcpu/arm/fm3/fault_rvds.S b/libcpu/arm/fm3/fault_rvds.S
deleted file mode 100644
index 4c3a151a4c..0000000000
--- a/libcpu/arm/fm3/fault_rvds.S
+++ /dev/null
@@ -1,35 +0,0 @@
-;/*
-; * File : fault_rvds.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
-; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
-; *
-; * Change Logs:
-; * Date Author Notes
-; * 2011-02-23 Bernard first version
-; */
-
- AREA |.text|, CODE, READONLY, ALIGN=2
- THUMB
- REQUIRE8
- PRESERVE8
-
- IMPORT rt_hw_hard_fault_exception
-
-rt_hw_hard_fault PROC
- EXPORT rt_hw_hard_fault
-
- ; get current context
- MRS r0, psp ; get fault thread stack pointer
- PUSH {lr}
- BL rt_hw_hard_fault_exception
- POP {lr}
-
- ORR lr, lr, #0x04
- BX lr
- ENDP
-
- END
diff --git a/libcpu/arm/fm3/start_gcc.S b/libcpu/arm/fm3/start_gcc.S
deleted file mode 100644
index 59993aea2a..0000000000
--- a/libcpu/arm/fm3/start_gcc.S
+++ /dev/null
@@ -1,351 +0,0 @@
-/*
- * File : start_gcc.S
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2011, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- * 2011-07-01 lgnq first version
- */
-
-.section .bss.init
-.equ Stack_Size, 0x00000200
-.space Stack_Size
-Initial_spTop:
-
- .syntax unified
- .cpu cortex-m3
- .fpu softvfp
- .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-// .equ Initial_spTop, 0x20000200
-.equ BootRAM, 0xF1E0F85F
-/**
- * @brief This is the code that gets called when the processor first
- * starts execution following a reset event. Only the absolutely
- * necessary set is performed, after which the application
- * supplied main() routine is called.
- * @param None
- * @retval : None
-*/
-
- .section .text.Reset_Handler
- .weak Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
-/* restore original stack pointer */
- LDR r0, =Initial_spTop
- MSR msp, r0
-/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
-
-CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
-LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
-LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
-/* Call the application's entry point.*/
- bl main
- bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief This is the code that gets called when the processor receives an
- * unexpected interrupt. This simply enters an infinite loop, preserving
- * the system state for examination by a debugger.
- *
- * @param None
- * @retval : None
-*/
- .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
- b Infinite_Loop
- .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3. Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
- .section .isr_vector,"a",%progbits
- .type g_pfnVectors, %object
- .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
- .word Initial_spTop
- .word Reset_Handler
- .word NMI_Handler
- .word rt_hw_hard_fault
- .word MemManage_Handler
- .word BusFault_Handler
- .word UsageFault_Handler
- .word 0
- .word 0
- .word 0
- .word 0
- .word SVC_Handler
- .word DebugMon_Handler
- .word 0
- .word rt_hw_pend_sv
- .word rt_hw_timer_handler
-
- .word CSV_IRQHandler
- .word SWDT_IRQHandler
- .word LVD_IRQHandler
- .word WFG_IRQHandler
- .word EXINT0_7_IRQHandler
- .word EXINT8_15_IRQHandler
- .word DTIM_QDU_IRQHandler
- .word MFS0RX_IRQHandler
- .word MFS0TX_IRQHandler
- .word MFS1RX_IRQHandler
- .word MFS1TX_IRQHandler
- .word MFS2RX_IRQHandler
- .word MFS2TX_IRQHandler
- .word MFS3RX_IRQHandler
- .word MFS3TX_IRQHandler
- .word MFS4RX_IRQHandler
- .word MFS4TX_IRQHandler
- .word MFS5RX_IRQHandler
- .word MFS5TX_IRQHandler
- .word MFS6RX_IRQHandler
- .word MFS6TX_IRQHandler
- .word MFS7RX_IRQHandler
- .word MFS7TX_IRQHandler
- .word PPG_IRQHandler
- .word OSC_PLL_WC_IRQHandler
- .word ADC0_IRQHandler
- .word ADC1_IRQHandler
- .word ADC2_IRQHandler
- .word FRTIM_IRQHandler
- .word INCAP_IRQHandler
- .word OUTCOMP_IRQHandler
- .word BTIM_IRQHandler
- .word CAN0_IRQHandler
- .word CAN1_IRQHandler
- .word USBF_IRQHandler
- .word USBF_USBH_IRQHandler
- .word RESERVED_1_IRQHandler
- .word RESERVED_2_IRQHandler
- .word DMAC0_IRQHandler
- .word DMAC1_IRQHandler
- .word DMAC2_IRQHandler
- .word DMAC3_IRQHandler
- .word DMAC4_IRQHandler
- .word DMAC5_IRQHandler
- .word DMAC6_IRQHandler
- .word DMAC7_IRQHandler
- .word RESERVED_3_IRQHandler
- .word RESERVED_4_IRQHandler
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
- .weak NMI_Handler
- .thumb_set NMI_Handler,Default_Handler
-
- .weak MemManage_Handler
- .thumb_set MemManage_Handler,Default_Handler
-
- .weak BusFault_Handler
- .thumb_set BusFault_Handler,Default_Handler
-
- .weak UsageFault_Handler
- .thumb_set UsageFault_Handler,Default_Handler
-
- .weak SVC_Handler
- .thumb_set SVC_Handler,Default_Handler
-
- .weak DebugMon_Handler
- .thumb_set DebugMon_Handler,Default_Handler
-
- .weak CSV_IRQHandler
- .thumb_set CSV_IRQHandler,Default_Handler
-
- .weak SWDT_IRQHandler
- .thumb_set SWDT_IRQHandler,Default_Handler
-
- .weak LVD_IRQHandler
- .thumb_set LVD_IRQHandler,Default_Handler
-
- .weak WFG_IRQHandler
- .thumb_set WFG_IRQHandler,Default_Handler
-
- .weak EXINT0_7_IRQHandler
- .thumb_set EXINT0_7_IRQHandler,Default_Handler
-
- .weak EXINT8_15_IRQHandler
- .thumb_set EXINT8_15_IRQHandler,Default_Handler
-
- .weak DTIM_QDU_IRQHandler
- .thumb_set DTIM_QDU_IRQHandler,Default_Handler
-
- .weak MFS0RX_IRQHandler
- .thumb_set MFS0RX_IRQHandler,Default_Handler
-
- .weak MFS0TX_IRQHandler
- .thumb_set MFS0TX_IRQHandler,Default_Handler
-
- .weak MFS1RX_IRQHandler
- .thumb_set MFS1RX_IRQHandler,Default_Handler
-
- .weak MFS1TX_IRQHandler
- .thumb_set MFS1TX_IRQHandler,Default_Handler
-
- .weak MFS2RX_IRQHandler
- .thumb_set MFS2RX_IRQHandler,Default_Handler
-
- .weak MFS2TX_IRQHandler
- .thumb_set MFS2TX_IRQHandler,Default_Handler
-
- .weak MFS3RX_IRQHandler
- .thumb_set MFS3RX_IRQHandler,Default_Handler
-
- .weak MFS3TX_IRQHandler
- .thumb_set MFS3TX_IRQHandler,Default_Handler
-
- .weak MFS4RX_IRQHandler
- .thumb_set MFS4RX_IRQHandler,Default_Handler
-
- .weak MFS4TX_IRQHandler
- .thumb_set MFS4TX_IRQHandler,Default_Handler
-
- .weak MFS5RX_IRQHandler
- .thumb_set MFS5RX_IRQHandler,Default_Handler
-
- .weak MFS5TX_IRQHandler
- .thumb_set MFS5TX_IRQHandler,Default_Handler
-
- .weak MFS6RX_IRQHandler
- .thumb_set MFS6RX_IRQHandler,Default_Handler
-
- .weak MFS6TX_IRQHandler
- .thumb_set MFS6TX_IRQHandler,Default_Handler
-
- .weak MFS7RX_IRQHandler
- .thumb_set MFS7RX_IRQHandler,Default_Handler
-
- .weak MFS7TX_IRQHandler
- .thumb_set MFS7TX_IRQHandler,Default_Handler
-
- .weak PPG_IRQHandler
- .thumb_set PPG_IRQHandler,Default_Handler
-
- .weak OSC_PLL_WC_IRQHandler
- .thumb_set OSC_PLL_WC_IRQHandler,Default_Handler
-
- .weak ADC0_IRQHandler
- .thumb_set ADC0_IRQHandler,Default_Handler
-
- .weak ADC1_IRQHandler
- .thumb_set ADC1_IRQHandler,Default_Handler
-
- .weak ADC2_IRQHandler
- .thumb_set ADC2_IRQHandler,Default_Handler
-
- .weak FRTIM_IRQHandler
- .thumb_set FRTIM_IRQHandler,Default_Handler
-
- .weak INCAP_IRQHandler
- .thumb_set INCAP_IRQHandler,Default_Handler
-
- .weak OUTCOMP_IRQHandler
- .thumb_set OUTCOMP_IRQHandler,Default_Handler
-
- .weak BTIM_IRQHandler
- .thumb_set BTIM_IRQHandler,Default_Handler
-
- .weak CAN0_IRQHandler
- .thumb_set CAN0_IRQHandler,Default_Handler
-
- .weak CAN1_IRQHandler
- .thumb_set CAN1_IRQHandler,Default_Handler
-
- .weak USBF_IRQHandler
- .thumb_set USBF_IRQHandler,Default_Handler
-
- .weak USBF_USBH_IRQHandler
- .thumb_set USBF_USBH_IRQHandler,Default_Handler
-
- .weak RESERVED_1_IRQHandler
- .thumb_set RESERVED_1_IRQHandler,Default_Handler
-
- .weak RESERVED_2_IRQHandler
- .thumb_set RESERVED_2_IRQHandler,Default_Handler
-
- .weak DMAC0_IRQHandler
- .thumb_set DMAC0_IRQHandler,Default_Handler
-
- .weak DMAC1_IRQHandler
- .thumb_set DMAC1_IRQHandler,Default_Handler
-
- .weak DMAC2_IRQHandler
- .thumb_set DMAC2_IRQHandler,Default_Handler
-
- .weak DMAC3_IRQHandler
- .thumb_set DMAC3_IRQHandler,Default_Handler
-
- .weak DMAC4_IRQHandler
- .thumb_set DMAC4_IRQHandler,Default_Handler
-
- .weak DMAC5_IRQHandler
- .thumb_set DMAC5_IRQHandler,Default_Handler
-
- .weak DMAC6_IRQHandler
- .thumb_set DMAC6_IRQHandler,Default_Handler
-
- .weak DMAC7_IRQHandler
- .thumb_set DMAC7_IRQHandler,Default_Handler
-
- .weak RESERVED_3_IRQHandler
- .thumb_set RESERVED_3_IRQHandler,Default_Handler
-
- .weak RESERVED_4_IRQHandler
- .thumb_set RESERVED_4_IRQHandler,Default_Handler
-
diff --git a/libcpu/arm/fm3/start_iar.S b/libcpu/arm/fm3/start_iar.S
deleted file mode 100644
index b5c9c36170..0000000000
--- a/libcpu/arm/fm3/start_iar.S
+++ /dev/null
@@ -1,354 +0,0 @@
-;/*
-; * File : context_iar.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
-; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
-; *
-; * Change Logs:
-; * Date Author Notes
-; * 2009-01-17 Bernard first version
-; * 2009-09-27 Bernard add protect when contex switch occurs
-; */
-
-#include "rtconfig.h"
-
- MODULE ?cstartup
-
-;; ICODE is the same segment as cstartup. By placing __low_level_init
-;; in the same segment, we make sure it can be reached with BL. */
-
- SECTION CSTACK:DATA:NOROOT(3)
- SECTION .icode:CODE:NOROOT(2)
-
- IMPORT rt_hw_hard_fault
- IMPORT rt_hw_pend_sv
- IMPORT rt_hw_timer_handler
-#ifdef RT_USING_UART2
- IMPORT MFS2RX_IRQHandler
-#endif
- PUBLIC __low_level_init
-
- PUBWEAK SystemInit_ExtMemCtl
- SECTION .text:CODE:REORDER(2)
- THUMB
-SystemInit_ExtMemCtl
- BX LR
-
-__low_level_init:
- ;; Initialize hardware.
- LDR R0, = SystemInit_ExtMemCtl ; initialize external memory controller
- MOV R11, LR
- BLX R0
- LDR R1, =sfe(CSTACK) ; restore original stack pointer
- MSR MSP, R1
- MOV R0,#1
- ;; Return with BX to be independent of mode of caller
- BX R11
-
- ;; Forward declaration of sections.
- SECTION .intvec:CODE:NOROOT(2)
-
- EXTERN __iar_program_start
- PUBLIC __vector_table
-
- DATA
-__vector_table
- DCD sfe(CSTACK)
- DCD __iar_program_start
-
- DCD NMI_Handler ; NMI Handler
- DCD rt_hw_hard_fault ; Hard Fault Handler
- DCD MemManage_Handler ; MPU Fault Handler
- DCD BusFault_Handler ; Bus Fault Handler
- DCD UsageFault_Handler ; Usage Fault Handler
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SVC_Handler ; SVCall Handler
- DCD DebugMon_Handler ; Debug Monitor Handler
- DCD 0 ; Reserved
- DCD rt_hw_pend_sv ; PendSV Handler
- DCD rt_hw_timer_handler ; SysTick Handler
-
- ; External Interrupts
- DCD CSV_IRQHandler ; Clock Super Visor
- DCD SWDT_IRQHandler ; Software Watchdog Timer
- DCD LVD_IRQHandler ; Low Voltage Detector
- DCD WFG_IRQHandler ; Wave Form Generator
- DCD EXINT0_7_IRQHandler ; External Interrupt Request ch.0 to ch.7
- DCD EXINT8_15_IRQHandler ; External Interrupt Request ch.8 to ch.15
- DCD DTIM_QDU_IRQHandler ; Dual Timer / Quad Decoder
- DCD MFS0RX_IRQHandler ; MultiFunction Serial ch.0
- DCD MFS0TX_IRQHandler ; MultiFunction Serial ch.0
- DCD MFS1RX_IRQHandler ; MultiFunction Serial ch.1
- DCD MFS1TX_IRQHandler ; MultiFunction Serial ch.1
-#ifdef RT_USING_UART2
- DCD MFS2RX_IRQHandler ; MultiFunction Serial ch.2
-#else
- DCD NULL_IRQHandler ; MultiFunction Serial ch.2
-#endif
- DCD MFS2TX_IRQHandler ; MultiFunction Serial ch.2
- DCD MFS3RX_IRQHandler ; MultiFunction Serial ch.3
- DCD MFS3TX_IRQHandler ; MultiFunction Serial ch.3
- DCD MFS4RX_IRQHandler ; MultiFunction Serial ch.4
- DCD MFS4TX_IRQHandler ; MultiFunction Serial ch.4
- DCD MFS5RX_IRQHandler ; MultiFunction Serial ch.5
- DCD MFS5TX_IRQHandler ; MultiFunction Serial ch.5
- DCD MFS6RX_IRQHandler ; MultiFunction Serial ch.6
- DCD MFS6TX_IRQHandler ; MultiFunction Serial ch.6
- DCD MFS7RX_IRQHandler ; MultiFunction Serial ch.7
- DCD MFS7TX_IRQHandler ; MultiFunction Serial ch.7
- DCD PPG_IRQHandler ; PPG
- DCD OSC_PLL_WC_IRQHandler ; OSC / PLL / Watch Counter
- DCD ADC0_IRQHandler ; ADC0
- DCD ADC1_IRQHandler ; ADC1
- DCD ADC2_IRQHandler ; ADC2
- DCD FRTIM_IRQHandler ; Free-run Timer
- DCD INCAP_IRQHandler ; Input Capture
- DCD OUTCOMP_IRQHandler ; Output Compare
- DCD BTIM_IRQHandler ; Base Timer ch.0 to ch.7
- DCD CAN0_IRQHandler ; CAN ch.0
- DCD CAN1_IRQHandler ; CAN ch.1
- DCD USBF_IRQHandler ; USB Function
- DCD USBF_USBH_IRQHandler ; USB Function / USB HOST
- DCD RESERVED_1_IRQHandler ; Reserved_1
- DCD RESERVED_2_IRQHandler ; Reserved_2
- DCD DMAC0_IRQHandler ; DMAC ch.0
- DCD DMAC1_IRQHandler ; DMAC ch.1
- DCD DMAC2_IRQHandler ; DMAC ch.2
- DCD DMAC3_IRQHandler ; DMAC ch.3
- DCD DMAC4_IRQHandler ; DMAC ch.4
- DCD DMAC5_IRQHandler ; DMAC ch.5
- DCD DMAC6_IRQHandler ; DMAC ch.6
- DCD DMAC7_IRQHandler ; DMAC ch.7
- DCD RESERVED_3_IRQHandler ; Reserved_3
- DCD RESERVED_4_IRQHandler ; Reserved_4
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
- THUMB
-
- PUBWEAK NMI_Handler
- SECTION .text:CODE:REORDER(1)
-NMI_Handler
- B NMI_Handler
- PUBWEAK MemManage_Handler
- SECTION .text:CODE:REORDER(1)
-MemManage_Handler
- B MemManage_Handler
- PUBWEAK BusFault_Handler
- SECTION .text:CODE:REORDER(1)
-BusFault_Handler
- B BusFault_Handler
- PUBWEAK UsageFault_Handler
- SECTION .text:CODE:REORDER(1)
-UsageFault_Handler
- B UsageFault_Handler
- PUBWEAK SVC_Handler
- SECTION .text:CODE:REORDER(1)
-SVC_Handler
- B SVC_Handler
- PUBWEAK DebugMon_Handler
- SECTION .text:CODE:REORDER(1)
-DebugMon_Handler
- B DebugMon_Handler
- PUBWEAK CSV_IRQHandler
- SECTION .text:CODE:REORDER(1)
-CSV_IRQHandler
- B CSV_IRQHandler
- PUBWEAK SWDT_IRQHandler
- SECTION .text:CODE:REORDER(1)
-SWDT_IRQHandler
- B SWDT_IRQHandler
- PUBWEAK LVD_IRQHandler
- SECTION .text:CODE:REORDER(1)
-LVD_IRQHandler
- B LVD_IRQHandler
- PUBWEAK WFG_IRQHandler
- SECTION .text:CODE:REORDER(1)
-WFG_IRQHandler
- B WFG_IRQHandler
- PUBWEAK EXINT0_7_IRQHandler
- SECTION .text:CODE:REORDER(1)
-EXINT0_7_IRQHandler
- B EXINT0_7_IRQHandler
- PUBWEAK EXINT8_15_IRQHandler
- SECTION .text:CODE:REORDER(1)
-EXINT8_15_IRQHandler
- B EXINT8_15_IRQHandler
- PUBWEAK DTIM_QDU_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DTIM_QDU_IRQHandler
- B DTIM_QDU_IRQHandler
- PUBWEAK MFS0RX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-MFS0RX_IRQHandler
- B MFS0RX_IRQHandler
- PUBWEAK MFS0TX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-MFS0TX_IRQHandler
- B MFS0TX_IRQHandler
- PUBWEAK MFS1RX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-MFS1RX_IRQHandler
- B MFS1RX_IRQHandler
- PUBWEAK MFS1TX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-MFS1TX_IRQHandler
- B MFS1TX_IRQHandler
- PUBWEAK NULL_IRQHandler
- SECTION .text:CODE:REORDER(1)
-NULL_IRQHandler
- B NULL_IRQHandler
- PUBWEAK MFS2TX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-MFS2TX_IRQHandler
- B MFS2TX_IRQHandler
- PUBWEAK MFS3RX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-MFS3RX_IRQHandler
- B MFS3RX_IRQHandler
- PUBWEAK MFS3TX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-MFS3TX_IRQHandler
- B MFS3TX_IRQHandler
- PUBWEAK MFS4RX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-MFS4RX_IRQHandler
- B MFS4RX_IRQHandler
- PUBWEAK MFS4TX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-MFS4TX_IRQHandler
- B MFS4TX_IRQHandler
- PUBWEAK MFS5RX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-MFS5RX_IRQHandler
- B MFS5RX_IRQHandler
- PUBWEAK MFS5TX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-MFS5TX_IRQHandler
- B MFS5TX_IRQHandler
- PUBWEAK MFS6RX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-MFS6RX_IRQHandler
- B MFS6RX_IRQHandler
- PUBWEAK MFS6TX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-MFS6TX_IRQHandler
- B MFS6TX_IRQHandler
- PUBWEAK MFS7RX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-MFS7RX_IRQHandler
- B MFS7RX_IRQHandler
- PUBWEAK MFS7TX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-MFS7TX_IRQHandler
- B MFS7TX_IRQHandler
- PUBWEAK PPG_IRQHandler
- SECTION .text:CODE:REORDER(1)
-PPG_IRQHandler
- B PPG_IRQHandler
- PUBWEAK OSC_PLL_WC_IRQHandler
- SECTION .text:CODE:REORDER(1)
-OSC_PLL_WC_IRQHandler
- B OSC_PLL_WC_IRQHandler
- PUBWEAK ADC0_IRQHandler
- SECTION .text:CODE:REORDER(1)
-ADC0_IRQHandler
- B ADC0_IRQHandler
- PUBWEAK ADC1_IRQHandler
- SECTION .text:CODE:REORDER(1)
-ADC1_IRQHandler
- B ADC1_IRQHandler
- PUBWEAK ADC2_IRQHandler
- SECTION .text:CODE:REORDER(1)
-ADC2_IRQHandler
- B ADC2_IRQHandler
- PUBWEAK FRTIM_IRQHandler
- SECTION .text:CODE:REORDER(1)
-FRTIM_IRQHandler
- B FRTIM_IRQHandler
- PUBWEAK INCAP_IRQHandler
- SECTION .text:CODE:REORDER(1)
-INCAP_IRQHandler
- B INCAP_IRQHandler
- PUBWEAK OUTCOMP_IRQHandler
- SECTION .text:CODE:REORDER(1)
-OUTCOMP_IRQHandler
- B OUTCOMP_IRQHandler
- PUBWEAK BTIM_IRQHandler
- SECTION .text:CODE:REORDER(1)
-BTIM_IRQHandler
- B BTIM_IRQHandler
- PUBWEAK CAN0_IRQHandler
- SECTION .text:CODE:REORDER(1)
-CAN0_IRQHandler
- B CAN0_IRQHandler
- PUBWEAK CAN1_IRQHandler
- SECTION .text:CODE:REORDER(1)
-CAN1_IRQHandler
- B CAN1_IRQHandler
- PUBWEAK USBF_IRQHandler
- SECTION .text:CODE:REORDER(1)
-USBF_IRQHandler
- B USBF_IRQHandler
- PUBWEAK USBF_USBH_IRQHandler
- SECTION .text:CODE:REORDER(1)
-USBF_USBH_IRQHandler
- B USBF_USBH_IRQHandler
- PUBWEAK RESERVED_1_IRQHandler
- SECTION .text:CODE:REORDER(1)
-RESERVED_1_IRQHandler
- B RESERVED_1_IRQHandler
- PUBWEAK RESERVED_2_IRQHandler
- SECTION .text:CODE:REORDER(1)
-RESERVED_2_IRQHandler
- B RESERVED_2_IRQHandler
- PUBWEAK DMAC0_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMAC0_IRQHandler
- B DMAC0_IRQHandler
- PUBWEAK DMAC1_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMAC1_IRQHandler
- B DMAC1_IRQHandler
- PUBWEAK DMAC2_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMAC2_IRQHandler
- B DMAC2_IRQHandler
- PUBWEAK DMAC3_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMAC3_IRQHandler
- B DMAC3_IRQHandler
- PUBWEAK DMAC4_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMAC4_IRQHandler
- B DMAC4_IRQHandler
- PUBWEAK DMAC5_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMAC5_IRQHandler
- B DMAC5_IRQHandler
- PUBWEAK DMAC6_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMAC6_IRQHandler
- B DMAC6_IRQHandler
- PUBWEAK DMAC7_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMAC7_IRQHandler
- B DMAC7_IRQHandler
- PUBWEAK RESERVED_3_IRQHandler
- SECTION .text:CODE:REORDER(1)
-RESERVED_3_IRQHandler
- B RESERVED_3_IRQHandler
- PUBWEAK RESERVED_4_IRQHandler
- SECTION .text:CODE:REORDER(1)
-RESERVED_4_IRQHandler
- B RESERVED_4_IRQHandler
-
- END
diff --git a/libcpu/arm/fm3/start_rvds.S b/libcpu/arm/fm3/start_rvds.S
deleted file mode 100644
index 90f49ecd9f..0000000000
--- a/libcpu/arm/fm3/start_rvds.S
+++ /dev/null
@@ -1,287 +0,0 @@
-; /*
-; * File : start_rvds.s
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
-; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
-; *
-; * Change Logs:
-; * Date Author Notes
-; * 2011-02-23 Bernard first implementation
-; */
-
-;* <<< Use Configuration Wizard in Context Menu >>>
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; <h> Stack Configuration
-; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size EQU 0x00000200
-
- AREA STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem SPACE Stack_Size
-__initial_sp
-
-; Note: RT-Thread not use malloc/free in Keil MDK, therefore the heap size is 0.
-Heap_Size EQU 0x00000000
-
- AREA HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem SPACE Heap_Size
-__heap_limit
-
- PRESERVE8
- THUMB
-
- IMPORT rt_hw_hard_fault
- IMPORT rt_hw_pend_sv
- IMPORT rt_hw_timer_handler
-
-; Vector Table Mapped to Address 0 at Reset
- AREA RESET, DATA, READONLY
- EXPORT __Vectors
- EXPORT __Vectors_End
- EXPORT __Vectors_Size
-
-__Vectors DCD __initial_sp ; Top of Stack
- DCD Reset_Handler ; Reset Handler
- DCD NMI_Handler ; NMI Handler
- DCD rt_hw_hard_fault ; Hard Fault Handler
- DCD MemManage_Handler ; MPU Fault Handler
- DCD BusFault_Handler ; Bus Fault Handler
- DCD UsageFault_Handler ; Usage Fault Handler
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SVC_Handler ; SVCall Handler
- DCD DebugMon_Handler ; Debug Monitor Handler
- DCD 0 ; Reserved
- DCD rt_hw_pend_sv ; PendSV Handler
- DCD rt_hw_timer_handler ; SysTick Handler
-
- DCD CSV_Handler ; 0: Clock Super Visor
- DCD SWDT_Handler ; 1: Software Watchdog Timer
- DCD LVD_Handler ; 2: Low Voltage Detector
- DCD MFT_WG_IRQHandler ; 3: Wave Form Generator / DTIF
- DCD INT0_7_Handler ; 4: External Interrupt Request ch.0 to ch.7
- DCD INT8_15_Handler ; 5: External Interrupt Request ch.8 to ch.15
- DCD DT_Handler ; 6: Dual Timer / Quad Decoder
- DCD MFS0RX_IRQHandler ; 7: MultiFunction Serial ch.0
- DCD MFS0TX_IRQHandler ; 8: MultiFunction Serial ch.0
- DCD MFS1RX_IRQHandler ; 9: MultiFunction Serial ch.1
- DCD MFS1TX_IRQHandler ; 10: MultiFunction Serial ch.1
- DCD MFS2RX_IRQHandler ; 11: MultiFunction Serial ch.2
- DCD MFS2TX_IRQHandler ; 12: MultiFunction Serial ch.2
- DCD MFS3RX_IRQHandler ; 13: MultiFunction Serial ch.3
- DCD MFS3TX_IRQHandler ; 14: MultiFunction Serial ch.3
- DCD MFS4RX_IRQHandler ; 15: MultiFunction Serial ch.4
- DCD MFS4TX_IRQHandler ; 16: MultiFunction Serial ch.4
- DCD MFS5RX_IRQHandler ; 17: MultiFunction Serial ch.5
- DCD MFS5TX_IRQHandler ; 18: MultiFunction Serial ch.5
- DCD MFS6RX_IRQHandler ; 19: MultiFunction Serial ch.6
- DCD MFS6TX_IRQHandler ; 20: MultiFunction Serial ch.6
- DCD MFS7RX_IRQHandler ; 21: MultiFunction Serial ch.7
- DCD MFS7TX_IRQHandler ; 22: MultiFunction Serial ch.7
- DCD PPG_Handler ; 23: PPG
- DCD TIM_IRQHandler ; 24: OSC / PLL / Watch Counter
- DCD ADC0_IRQHandler ; 25: ADC0
- DCD ADC1_IRQHandler ; 26: ADC1
- DCD ADC2_IRQHandler ; 27: ADC2
- DCD MFT_FRT_IRQHandler ; 28: Free-run Timer
- DCD MFT_IPC_IRQHandler ; 29: Input Capture
- DCD MFT_OPC_IRQHandler ; 30: Output Compare
- DCD BT_IRQHandler ; 31: Base Timer ch.0 to ch.7
- DCD CAN0_IRQHandler ; 32: CAN ch.0
- DCD CAN1_IRQHandler ; 33: CAN ch.1
- DCD USBF_Handler ; 34: USB Function
- DCD USB_Handler ; 35: USB Function / USB HOST
- DCD DummyHandler ; 36: Reserved
- DCD DummyHandler ; 37: Reserved
- DCD DMAC0_Handler ; 38: DMAC ch.0
- DCD DMAC1_Handler ; 39: DMAC ch.1
- DCD DMAC2_Handler ; 40: DMAC ch.2
- DCD DMAC3_Handler ; 41: DMAC ch.3
- DCD DMAC4_Handler ; 42: DMAC ch.4
- DCD DMAC5_Handler ; 43: DMAC ch.5
- DCD DMAC6_Handler ; 44: DMAC ch.6
- DCD DMAC7_Handler ; 45: DMAC ch.7
- DCD DummyHandler ; 46: Reserved
- DCD DummyHandler ; 47: Reserved
-__Vectors_End
-
-__Vectors_Size EQU __Vectors_End - __Vectors
-
- AREA |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler PROC
- EXPORT Reset_Handler [WEAK]
- IMPORT __main
- IMPORT SystemInit
- LDR R1, = __initial_sp ; restore original stack pointer
- MSR MSP, R1
- LDR R0, =SystemInit
- BLX R0
- LDR R0, =__main
- BX R0
- ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler PROC
- EXPORT NMI_Handler [WEAK]
- B .
- ENDP
-HardFault_Handler\
- PROC
- EXPORT HardFault_Handler [WEAK]
- B .
- ENDP
-MemManage_Handler\
- PROC
- EXPORT MemManage_Handler [WEAK]
- B .
- ENDP
-BusFault_Handler\
- PROC
- EXPORT BusFault_Handler [WEAK]
- B .
- ENDP
-UsageFault_Handler\
- PROC
- EXPORT UsageFault_Handler [WEAK]
- B .
- ENDP
-SVC_Handler PROC
- EXPORT SVC_Handler [WEAK]
- B .
- ENDP
-DebugMon_Handler\
- PROC
- EXPORT DebugMon_Handler [WEAK]
- B .
- ENDP
-
-Default_Handler PROC
-
- EXPORT CSV_Handler [WEAK]
- EXPORT SWDT_Handler [WEAK]
- EXPORT LVD_Handler [WEAK]
- EXPORT MFT_WG_IRQHandler [WEAK]
- EXPORT INT0_7_Handler [WEAK]
- EXPORT INT8_15_Handler [WEAK]
- EXPORT DT_Handler [WEAK]
- EXPORT MFS0RX_IRQHandler [WEAK]
- EXPORT MFS0TX_IRQHandler [WEAK]
- EXPORT MFS1RX_IRQHandler [WEAK]
- EXPORT MFS1TX_IRQHandler [WEAK]
- EXPORT MFS2RX_IRQHandler [WEAK]
- EXPORT MFS2TX_IRQHandler [WEAK]
- EXPORT MFS3RX_IRQHandler [WEAK]
- EXPORT MFS3TX_IRQHandler [WEAK]
- EXPORT MFS4RX_IRQHandler [WEAK]
- EXPORT MFS4TX_IRQHandler [WEAK]
- EXPORT MFS5RX_IRQHandler [WEAK]
- EXPORT MFS5TX_IRQHandler [WEAK]
- EXPORT MFS6RX_IRQHandler [WEAK]
- EXPORT MFS6TX_IRQHandler [WEAK]
- EXPORT MFS7RX_IRQHandler [WEAK]
- EXPORT MFS7TX_IRQHandler [WEAK]
- EXPORT PPG_Handler [WEAK]
- EXPORT TIM_IRQHandler [WEAK]
- EXPORT ADC0_IRQHandler [WEAK]
- EXPORT ADC1_IRQHandler [WEAK]
- EXPORT ADC2_IRQHandler [WEAK]
- EXPORT MFT_FRT_IRQHandler [WEAK]
- EXPORT MFT_IPC_IRQHandler [WEAK]
- EXPORT MFT_OPC_IRQHandler [WEAK]
- EXPORT BT_IRQHandler [WEAK]
- EXPORT CAN0_IRQHandler [WEAK]
- EXPORT CAN1_IRQHandler [WEAK]
- EXPORT USBF_Handler [WEAK]
- EXPORT USB_Handler [WEAK]
- EXPORT DMAC0_Handler [WEAK]
- EXPORT DMAC1_Handler [WEAK]
- EXPORT DMAC2_Handler [WEAK]
- EXPORT DMAC3_Handler [WEAK]
- EXPORT DMAC4_Handler [WEAK]
- EXPORT DMAC5_Handler [WEAK]
- EXPORT DMAC6_Handler [WEAK]
- EXPORT DMAC7_Handler [WEAK]
- EXPORT DummyHandler [WEAK]
-
-CSV_Handler
-SWDT_Handler
-LVD_Handler
-MFT_WG_IRQHandler
-INT0_7_Handler
-INT8_15_Handler
-DT_Handler
-MFS0RX_IRQHandler
-MFS0TX_IRQHandler
-MFS1RX_IRQHandler
-MFS1TX_IRQHandler
-MFS2RX_IRQHandler
-MFS2TX_IRQHandler
-MFS3RX_IRQHandler
-MFS3TX_IRQHandler
-MFS4RX_IRQHandler
-MFS4TX_IRQHandler
-MFS5RX_IRQHandler
-MFS5TX_IRQHandler
-MFS6RX_IRQHandler
-MFS6TX_IRQHandler
-MFS7RX_IRQHandler
-MFS7TX_IRQHandler
-PPG_Handler
-TIM_IRQHandler
-ADC0_IRQHandler
-ADC1_IRQHandler
-ADC2_IRQHandler
-MFT_FRT_IRQHandler
-MFT_IPC_IRQHandler
-MFT_OPC_IRQHandler
-BT_IRQHandler
-CAN0_IRQHandler
-CAN1_IRQHandler
-USBF_Handler
-USB_Handler
-DMAC0_Handler
-DMAC1_Handler
-DMAC2_Handler
-DMAC3_Handler
-DMAC4_Handler
-DMAC5_Handler
-DMAC6_Handler
-DMAC7_Handler
-DummyHandler
- B .
- ENDP
- ALIGN
-
-; User Initial Stack & Heap
-
- IF :DEF:__MICROLIB
- EXPORT __initial_sp
- EXPORT __heap_base
- EXPORT __heap_limit
- ELSE
- IMPORT __use_two_region_memory
- EXPORT __user_initial_stackheap
-__user_initial_stackheap
-
- LDR R0, = Heap_Mem
- LDR R1, =(Stack_Mem + Stack_Size)
- LDR R2, = (Heap_Mem + Heap_Size)
- LDR R3, = Stack_Mem
- BX LR
-
- ALIGN
- ENDIF
-
- END
generated by cgit v1.3.1 (git 2.54.0) at 2026-10-30 14:28:16 +0000