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authorqiuyiuestc <[email protected]>2010-07-18 00:47:42 +0000
committerqiuyiuestc <[email protected]>2010-07-18 00:47:42 +0000
commitd9f797aac300413b17736be54d87c4b6ee1991dd (patch)
tree0e6bebcab7ba1eddfac78880f9bba152024355b2 /libcpu
parent1e9996c0e5508ad4d5b75f1ec7ed3008ec64dd15 (diff)
fix mmu issue
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@799 bbd45198-f89e-11dd-88c7-29a3b14d5316
Diffstat (limited to 'libcpu')
-rw-r--r--libcpu/arm/s3c24x0/mmu.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/libcpu/arm/s3c24x0/mmu.c b/libcpu/arm/s3c24x0/mmu.c
index 6ba6e7dce9..0cbac7f934 100644
--- a/libcpu/arm/s3c24x0/mmu.c
+++ b/libcpu/arm/s3c24x0/mmu.c
@@ -44,7 +44,7 @@
#ifdef __GNUC__
void mmu_setttbase(register rt_uint32_t i)
{
- asm ("mcr p15, 0, %0, c2, c2, 0": :"r" (i));
+ asm ("mcr p15, 0, %0, c2, c0, 0": :"r" (i));
}
void mmu_set_domain(register rt_uint32_t i)
@@ -177,7 +177,7 @@ void mmu_setttbase(rt_uint32_t i)
{
__asm
{
- mcr p15, 0, i, c2, c2, 0
+ mcr p15, 0, i, c2, c0, 0
}
}