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authorKai <[email protected]>2025-03-03 23:13:11 +0800
committerGitHub <[email protected]>2025-03-03 23:13:11 +0800
commitf7d542155fa79fe63655e7858be536b3170fbd8e (patch)
tree4aeb48fddf26a903a72829ff78c4c7d1bc3814bf /libcpu
parente0c8380fb731c2e5667426e3f355532e949f479a (diff)
[libcpu][riscv] add a doc for wch saving the irq stack as stack-512 (#10063)
Diffstat (limited to 'libcpu')
-rw-r--r--libcpu/risc-v/common/context_gcc.S9
1 files changed, 9 insertions, 0 deletions
diff --git a/libcpu/risc-v/common/context_gcc.S b/libcpu/risc-v/common/context_gcc.S
index b0dc0aa16a..792ac8bd67 100644
--- a/libcpu/risc-v/common/context_gcc.S
+++ b/libcpu/risc-v/common/context_gcc.S
@@ -49,6 +49,15 @@ rt_hw_interrupt_enable:
rt_hw_context_switch_to:
la t0, __rt_rvstack
#ifdef SOC_RISCV_FAMILY_CH32
+/*
+ * if it is an assembly entry code, the SP offset value is determined by the assembly code,
+ * but the C code is determined by the compiler, so we subtract 512 here as a reservation.
+ * When entering the interrupt function of C code, the compiler automatically presses the stack
+ * into the task stack. We can only change the SP value used by the calling function after switching
+ * the interrupt stack.This problem can be solved by modifying the interrupt to the assembly entry,
+ * and there is no need to reserve 512 bytes. You only need to switch the interrupt stack at the
+ * beginning of the interrupt function
+*/
addi t0, t0, -512 // for ch32
#endif /* SOC_RISCV_FAMILY_CH32 */
csrw mscratch,t0