diff options
| author | Bernard Xiong <[email protected]> | 2014-02-25 09:20:56 +0800 |
|---|---|---|
| committer | Bernard Xiong <[email protected]> | 2014-02-25 09:20:56 +0800 |
| commit | ff302f286380886071c584a373d9ebe905a7a89b (patch) | |
| tree | bb12b34ebbf54090ba0b531e1d9057531ddde966 /libcpu | |
| parent | 7255137b0a8cc1bda57d24d3cf1942550252f7ea (diff) | |
| parent | d71b86c750d99ea2cb98b3e657f4f3baf104d3ea (diff) | |
Merge pull request #227 from RTsien/master
Add supports for UART0 to UART5 of beaglebone(black)
Diffstat (limited to 'libcpu')
| -rw-r--r-- | libcpu/arm/am335x/am33xx.h | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/libcpu/arm/am335x/am33xx.h b/libcpu/arm/am335x/am33xx.h index 86ed82750a..68ea4478d3 100644 --- a/libcpu/arm/am335x/am33xx.h +++ b/libcpu/arm/am335x/am33xx.h @@ -84,7 +84,11 @@ #define CM_PER(base) ((base) + 0) #define CM_PER_L4LS_CLKSTCTRL(base) (CM_PER(base) + 0) -#define CM_PER_UART1_CLKCTRL(base) (CM_PER(base) + 0x06C) +#define CM_PER_UART1_CLKCTRL(base) (CM_PER(base) + 0x6C) +#define CM_PER_UART2_CLKCTRL(base) (CM_PER(base) + 0x70) +#define CM_PER_UART3_CLKCTRL(base) (CM_PER(base) + 0x74) +#define CM_PER_UART4_CLKCTRL(base) (CM_PER(base) + 0x78) +#define CM_PER_UART5_CLKCTRL(base) (CM_PER(base) + 0x38) #define CM_WKUP(base) ((base) + 0x400) #define CM_DPLL(base) ((base) + 0x500) #define CM_MPU(base) ((base) + 0x600) @@ -171,6 +175,10 @@ /* PRCM registers */ #define CM_PER_L4LS_CLKSTCTRL_REG(base) REG32((base) + 0x0) #define CM_PER_UART1_CLKCTRL_REG(base) REG32(CM_PER_UART1_CLKCTRL(base)) +#define CM_PER_UART2_CLKCTRL_REG(base) REG32(CM_PER_UART2_CLKCTRL(base)) +#define CM_PER_UART3_CLKCTRL_REG(base) REG32(CM_PER_UART3_CLKCTRL(base)) +#define CM_PER_UART4_CLKCTRL_REG(base) REG32(CM_PER_UART4_CLKCTRL(base)) +#define CM_PER_UART5_CLKCTRL_REG(base) REG32(CM_PER_UART5_CLKCTRL(base)) #define CM_PER_TIMER7_CLKCTRL(base) REG32((base) + 0x7C) #define CM_PER_TIMER2_CLKCTRL(base) REG32((base) + 0x80) |