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authorhanzhijian <[email protected]>2026-08-25 09:19:51 +0800
committerRbb666 <[email protected]>2026-08-26 10:37:02 +0800
commite2e6245aace07b545b8dbcef8fbcdb4469f55d9f (patch)
treeb17de7aed93f98eeded0d760553e212d40df5ca6 /src
parent45679c79de6d60f2e8345928c49671936f6ff008 (diff)
[arm][cortex-m4] Add hardware stack guard support
Enable RT_USING_HW_STACK_GUARD on Cortex-M4, which was previously only available on Cortex-M7 and Cortex-M33. Core porting (libcpu/arm/cortex-m4/): - Add mpu.c/mpu.h/mputype.h aligned with the Cortex-M7 MPU layer. The only difference is the default memory type attribute: Cortex-M4 has no L1 cache, so the cacheability bits are reduced to three cases. - Add rt_hw_stack_guard_init() to cpuport.c. - Add missing #include <rtconfig.h> to context_gcc.S and invoke rt_hw_mpu_table_switch() in the PendSV context switch path. - Update SConscript to exclude mpu.c when memory protection is disabled. BSP reference (bsp/stm32/stm32f407-fk407m2-zgt6/): - board.h: include rtthread.h and define NUM_STATIC_REGIONS. - board.c: define static_regions[] marking the Flash region read-only, guarded by RT_USING_MEM_PROTECTION so it is not enabled by default.
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