diff options
68 files changed, 4222 insertions, 3283 deletions
diff --git a/bsp/phytium/.gitignore b/bsp/phytium/.gitignore index a9f1f9b754..7fb7c4f0e3 100644 --- a/bsp/phytium/.gitignore +++ b/bsp/phytium/.gitignore @@ -5,3 +5,5 @@ **/**/makefile /libraries/tests/* /libraries/phytium_standalone_sdk/ +/aarch64/link_preprocessed.lds +*.origin diff --git a/bsp/phytium/README.md b/bsp/phytium/README.md index b30764121f..aaabaa3c97 100644 --- a/bsp/phytium/README.md +++ b/bsp/phytium/README.md @@ -40,7 +40,7 @@ | **芯片** | **支持情况** | **备注** | | :----------------- | :----------: | :------------------------------------- | -| Phytium PI | 支持 | 支持SMP | +| Phytium PI | 支持 | 支持SMP 与 AMP| | E2000D | 支持 | 支持SMP | | E2000Q | 支持 | 支持SMP | | PD2408 | 支持 | 支持SMP | diff --git a/bsp/phytium/aarch32/.ci/attachconfig/ci.attachconfig.yml b/bsp/phytium/aarch32/.ci/attachconfig/ci.attachconfig.yml index ed427c8cf1..c706d4b57e 100644 --- a/bsp/phytium/aarch32/.ci/attachconfig/ci.attachconfig.yml +++ b/bsp/phytium/aarch32/.ci/attachconfig/ci.attachconfig.yml @@ -5,12 +5,12 @@ board.e2000d_demo_rtthread: - devices.can - devices.gpio - devices.i2s + - devices.es8336 - devices.pwm - devices.spi - devices.qspi - devices.xmac - devices.sdif - - devices.dc - devices.devices_auto_test kconfig: - CONFIG_TARGET_PE2202=y @@ -33,8 +33,6 @@ board.e2000d_demo_rtthread: - CONFIG_USE_SDIF0_EMMC=y - CONFIG_RT_SDIO_STACK_SIZE=4096 - CONFIG_RT_MMCSD_STACK_SIZE=4096 - - CONFIG_RT_USING_DC_CHANNEL0=y - - CONFIG_RT_USING_DC_CHANNEL1=y - CONFIG_BSP_USING_ES8336=y - CONFIG_I2C_USE_MIO=y @@ -45,16 +43,16 @@ board.e2000q_demo_rtthread: - devices.can - devices.gpio - devices.i2s + - devices.es8336 - devices.pwm - devices.spi - devices.qspi - devices.xmac - devices.sdif - - devices.dc kconfig: - CONFIG_TARGET_PE2204=y - CONFIG_E2000Q_DEMO_BOARD=y - - CONFIG_RT_CPUS_NR=2 + - CONFIG_RT_CPUS_NR=4 - CONFIG_RT_USING_UART1=y - CONFIG_RT_USING_MIO15=y - CONFIG_RT_USING_CAN0=y @@ -72,8 +70,6 @@ board.e2000q_demo_rtthread: - CONFIG_USE_SDIF0_EMMC=y - CONFIG_RT_SDIO_STACK_SIZE=4096 - CONFIG_RT_MMCSD_STACK_SIZE=4096 - - CONFIG_RT_USING_DC_CHANNEL0=y - - CONFIG_RT_USING_DC_CHANNEL1=y - CONFIG_BSP_USING_ES8336=y - CONFIG_I2C_USE_MIO=y @@ -87,7 +83,6 @@ board.phytium_pi_rtthread: - devices.qspi - devices.xmac - devices.sdif - - devices.dc - devices.devices_auto_test kconfig: - CONFIG_TARGET_PE2204=y @@ -103,7 +98,6 @@ board.phytium_pi_rtthread: - CONFIG_USING_SDIF1=y - CONFIG_USE_SDIF1_TF=y - CONFIG_RT_SDIO_STACK_SIZE=4096 - - CONFIG_RT_USING_DC_CHANNEL0=y - CONFIG_I2C_USE_MIO=y board.e2000d_demo_rtthread_pusb2_dc: @@ -171,12 +165,18 @@ devices.gpio: - CONFIG_BSP_USING_GPIO=y devices.i2s: kconfig: + - CONFIG_BSP_USING_I2S_LAYER=y - CONFIG_BSP_USING_I2S=y +devices.es8336: + kconfig: + - CONFIG_BSP_USING_DEVICE=y + - CONFIG_BSP_USING_ES8336=y devices.pwm: kconfig: - CONFIG_BSP_USING_PWM=y devices.spi: - kconfig: + kconfig: + - CONFIG_BSP_USING_SPI_LAYER=y - CONFIG_BSP_USING_SPI=y devices.qspi: kconfig: @@ -186,7 +186,13 @@ devices.uart: - CONFIG_BSP_USING_UART=y devices.xmac: kconfig: + - CONFIG_BSP_USING_ETH_LAYER=y - CONFIG_BSP_USING_ETH=y + - CONFIG_RT_USING_SAL=y + - CONFIG_RT_USING_LWIP=y + - CONFIG_RT_USING_LWIP212=y + - CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=8192 + - CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=8192 devices.sdif: kconfig: - CONFIG_BSP_USING_SDIF=y diff --git a/bsp/phytium/aarch32/.config b/bsp/phytium/aarch32/.config index 029fc641e7..b1c20a72ff 100644 --- a/bsp/phytium/aarch32/.config +++ b/bsp/phytium/aarch32/.config @@ -111,8 +111,8 @@ CONFIG_RT_NAME_MAX=16 # CONFIG_RT_USING_NANO is not set # CONFIG_RT_USING_SMART is not set # CONFIG_RT_USING_AMP is not set -# CONFIG_RT_USING_SMP is not set -CONFIG_RT_CPUS_NR=1 +CONFIG_RT_USING_SMP=y +CONFIG_RT_CPUS_NR=2 CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set CONFIG_RT_THREAD_PRIORITY_32=y @@ -126,11 +126,13 @@ CONFIG_RT_HOOK_USING_FUNC_PTR=y CONFIG_RT_USING_IDLE_HOOK=y CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=4096 +CONFIG_SYSTEM_THREAD_STACK_SIZE=4096 CONFIG_RT_USING_TIMER_SOFT=y CONFIG_RT_TIMER_THREAD_PRIO=4 CONFIG_RT_TIMER_THREAD_STACK_SIZE=4096 # CONFIG_RT_USING_TIMER_ALL_SOFT is not set -# CONFIG_RT_USING_CPU_USAGE_TRACER is not set +CONFIG_RT_USING_CPU_USAGE_TRACER=y +CONFIG_RT_CPU_USAGE_CALC_INTERVAL_MS=200 # # kservice options @@ -143,6 +145,8 @@ CONFIG_RT_DEBUGING_ASSERT=y CONFIG_RT_DEBUGING_COLOR=y CONFIG_RT_DEBUGING_CONTEXT=y # CONFIG_RT_DEBUGING_AUTO_INIT is not set +# CONFIG_RT_DEBUGING_SPINLOCK is not set +CONFIG_RT_DEBUGING_CRITICAL=y # CONFIG_RT_USING_CI_ACTION is not set # @@ -177,7 +181,7 @@ CONFIG_RT_USING_HEAP=y # end of Memory Management CONFIG_RT_USING_DEVICE=y -# CONFIG_RT_USING_DEVICE_OPS is not set +CONFIG_RT_USING_DEVICE_OPS=y # CONFIG_RT_USING_INTERRUPT_INFO is not set # CONFIG_RT_USING_THREADSAFE_PRINTF is not set CONFIG_RT_USING_CONSOLE=y @@ -185,7 +189,7 @@ CONFIG_RT_CONSOLEBUF_SIZE=256 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" CONFIG_RT_USING_CONSOLE_OUTPUT_CTL=y CONFIG_RT_VER_NUM=0x50300 -# CONFIG_RT_USING_STDC_ATOMIC is not set +CONFIG_RT_USING_STDC_ATOMIC=y CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32 # end of RT-Thread Kernel @@ -295,7 +299,7 @@ CONFIG_RT_USING_SERIAL_V1=y # CONFIG_RT_USING_SERIAL_V2 is not set CONFIG_RT_SERIAL_USING_DMA=y CONFIG_RT_SERIAL_RB_BUFSZ=1024 -# CONFIG_RT_USING_SERIAL_BYPASS is not set +CONFIG_RT_USING_SERIAL_BYPASS=y CONFIG_RT_USING_CAN=y # CONFIG_RT_CAN_USING_HDR is not set CONFIG_RT_CAN_USING_CANFD=y @@ -353,6 +357,7 @@ CONFIG_RT_AUDIO_RECORD_PIPE_SIZE=2048 # CONFIG_RT_USING_LCD is not set # CONFIG_RT_USING_HWCRYPTO is not set # CONFIG_RT_USING_WIFI is not set +# CONFIG_RT_USING_RPMSG is not set CONFIG_RT_USING_BLK=y # @@ -596,7 +601,6 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # CONFIG_PKG_USING_FREEMODBUS is not set # CONFIG_PKG_USING_NANOPB is not set # CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set -# CONFIG_PKG_USING_ESP_HOSTED is not set # # Wi-Fi @@ -702,9 +706,6 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set # CONFIG_PKG_USING_LHC_MODBUS is not set # CONFIG_PKG_USING_QMODBUS is not set -# CONFIG_PKG_USING_PNET is not set -# CONFIG_PKG_USING_OPENER is not set -# CONFIG_PKG_USING_FREEMQTT is not set # end of IoT - internet of things # @@ -732,7 +733,6 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_AGILE_JSMN is not set # CONFIG_PKG_USING_PARSON is not set -# CONFIG_PKG_USING_RYAN_JSON is not set # end of JSON: JavaScript Object Notation, a lightweight data-interchange format # @@ -769,7 +769,6 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # CONFIG_PKG_USING_U8G2 is not set # end of u8g2: a monochrome graphic library -# CONFIG_PKG_USING_NES_SIMULATOR is not set # CONFIG_PKG_USING_OPENMV is not set # CONFIG_PKG_USING_MUPDF is not set # CONFIG_PKG_USING_STEMWIN is not set @@ -795,11 +794,7 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # # tools packages # -# CONFIG_PKG_USING_VECTOR is not set -# CONFIG_PKG_USING_SORCH is not set -# CONFIG_PKG_USING_DICT is not set # CONFIG_PKG_USING_CMBACKTRACE is not set -# CONFIG_PKG_USING_MCOREDUMP is not set # CONFIG_PKG_USING_EASYFLASH is not set # CONFIG_PKG_USING_EASYLOGGER is not set # CONFIG_PKG_USING_SYSTEMVIEW is not set @@ -843,12 +838,6 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set # CONFIG_PKG_USING_VOFA_PLUS is not set # CONFIG_PKG_USING_ZDEBUG is not set -# CONFIG_PKG_USING_RVBACKTRACE is not set -# CONFIG_PKG_USING_HPATCHLITE is not set -# CONFIG_PKG_USING_THREAD_METRIC is not set -# CONFIG_PKG_USING_UORB is not set -# CONFIG_PKG_USING_RT_TUNNEL is not set -# CONFIG_PKG_USING_VIRTUAL_TERMINAL is not set # end of tools packages # @@ -860,10 +849,9 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # # CONFIG_PKG_USING_RT_MEMCPY_CM is not set # CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set # end of enhanced kernel services -# CONFIG_PKG_USING_AUNITY is not set - # # acceleration: Assembly language or algorithmic acceleration packages # @@ -877,6 +865,7 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # # CONFIG_PKG_USING_CMSIS_5 is not set # CONFIG_PKG_USING_CMSIS_CORE is not set +# CONFIG_PKG_USING_CMSIS_DSP is not set # CONFIG_PKG_USING_CMSIS_NN is not set # CONFIG_PKG_USING_CMSIS_RTOS1 is not set # CONFIG_PKG_USING_CMSIS_RTOS2 is not set @@ -928,6 +917,7 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # CONFIG_PKG_USING_ARM_2D is not set # CONFIG_PKG_USING_MCUBOOT is not set # CONFIG_PKG_USING_TINYUSB is not set +# CONFIG_PKG_USING_CHERRYUSB is not set # CONFIG_PKG_USING_KMULTI_RTIMER is not set # CONFIG_PKG_USING_TFDB is not set # CONFIG_PKG_USING_QPC is not set @@ -935,17 +925,10 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # CONFIG_PKG_USING_FLASH_BLOB is not set # CONFIG_PKG_USING_MLIBC is not set # CONFIG_PKG_USING_TASK_MSG_BUS is not set -# CONFIG_PKG_USING_UART_FRAMEWORK is not set # CONFIG_PKG_USING_SFDB is not set # CONFIG_PKG_USING_RTP is not set # CONFIG_PKG_USING_REB is not set -# CONFIG_PKG_USING_RMP is not set # CONFIG_PKG_USING_R_RHEALSTONE is not set -# CONFIG_PKG_USING_HEARTBEAT is not set -# CONFIG_PKG_USING_MICRO_ROS_RTTHREAD_PACKAGE is not set -# CONFIG_PKG_USING_CHERRYECAT is not set -# CONFIG_PKG_USING_EVENT_LOOP is not set -# CONFIG_PKG_USING_THREAD_MANAGER is not set # end of system packages # @@ -959,61 +942,12 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # # STM32 HAL & SDK Drivers # -# CONFIG_PKG_USING_STM32F0_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32F0_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32F1_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32F1_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32F2_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32F2_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32F3_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32F3_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32F7_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32F7_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32G0_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32G0_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32G4_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32G4_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32H5_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32H5_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32H7_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32H7_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32H7RS_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32H7RS_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32L0_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32L0_CMSIS_DRIVER is not set # CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set # CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32L5_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32L5_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32U5_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32U5_CMSIS_DRIVER is not set # CONFIG_PKG_USING_STM32WB55_SDK is not set # CONFIG_PKG_USING_STM32_SDIO is not set -# CONFIG_PKG_USING_STM32WL_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32WL_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32WB_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32WB_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32MP1_M4_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32MP1_M4_CMSIS_DRIVER is not set # end of STM32 HAL & SDK Drivers -# -# Infineon HAL Packages -# -# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set -# CONFIG_PKG_USING_INFINEON_CMSIS is not set -# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set -# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set -# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set -# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set -# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set -# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set -# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set -# CONFIG_PKG_USING_INFINEON_USBDEV is not set -# end of Infineon HAL Packages - # CONFIG_PKG_USING_BLUETRUM_SDK is not set # CONFIG_PKG_USING_EMBARC_BSP is not set # CONFIG_PKG_USING_ESP_IDF is not set @@ -1027,96 +961,7 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # CONFIG_PKG_USING_NRF5X_SDK is not set # CONFIG_PKG_USING_NRFX is not set -# CONFIG_PKG_USING_RASPBERRYPI_PICO_RP2350_SDK is not set # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set -# CONFIG_PKG_USING_MM32 is not set - -# -# WCH HAL & SDK Drivers -# -# CONFIG_PKG_USING_CH32V20x_SDK is not set -# CONFIG_PKG_USING_CH32V307_SDK is not set -# end of WCH HAL & SDK Drivers - -# -# AT32 HAL & SDK Drivers -# -# CONFIG_PKG_USING_AT32A403A_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32A403A_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32A423_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32A423_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F45x_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F45x_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F402_405_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F402_405_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F403A_407_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F403A_407_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F413_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F413_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F415_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F415_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F421_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F421_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F423_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F423_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F425_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F425_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F435_437_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F435_437_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32M412_416_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32M412_416_CMSIS_DRIVER is not set -# end of AT32 HAL & SDK Drivers - -# -# HC32 DDL Drivers -# -# CONFIG_PKG_USING_HC32F3_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_HC32F3_SERIES_DRIVER is not set -# CONFIG_PKG_USING_HC32F4_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_HC32F4_SERIES_DRIVER is not set -# end of HC32 DDL Drivers - -# -# NXP HAL & SDK Drivers -# -# CONFIG_PKG_USING_NXP_MCX_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_NXP_MCX_SERIES_DRIVER is not set -# CONFIG_PKG_USING_NXP_LPC_DRIVER is not set -# CONFIG_PKG_USING_NXP_LPC55S_DRIVER is not set -# CONFIG_PKG_USING_NXP_IMX6SX_DRIVER is not set -# CONFIG_PKG_USING_NXP_IMX6UL_DRIVER is not set -# CONFIG_PKG_USING_NXP_IMXRT_DRIVER is not set -# end of NXP HAL & SDK Drivers - -# -# NUVOTON Drivers -# -# CONFIG_PKG_USING_NUVOTON_SERIES_DRIVER is not set -# end of NUVOTON Drivers - -# -# GD32 Drivers -# -# CONFIG_PKG_USING_GD32_ARM_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_GD32_ARM_SERIES_DRIVER is not set -# CONFIG_PKG_USING_GD32_RISCV_SERIES_DRIVER is not set -# CONFIG_PKG_USING_GD32VW55X_WIFI is not set -# end of GD32 Drivers - -# -# HPMicro SDK -# -# CONFIG_PKG_USING_HPM_SDK is not set -# end of HPMicro SDK - -# -# FT32 HAL & SDK Drivers -# -# CONFIG_PKG_USING_FT32F0_STD_DRIVER is not set -# CONFIG_PKG_USING_FT32F0_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_FT32F4_STD_DRIVER is not set -# CONFIG_PKG_USING_FT32F4_CMSIS_DRIVER is not set -# end of FT32 HAL & SDK Drivers # end of HAL & SDK Drivers # @@ -1154,19 +999,14 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # CONFIG_PKG_USING_BMI088 is not set # CONFIG_PKG_USING_HMC5883 is not set # CONFIG_PKG_USING_MAX6675 is not set -# CONFIG_PKG_USING_MAX31855 is not set # CONFIG_PKG_USING_TMP1075 is not set # CONFIG_PKG_USING_SR04 is not set # CONFIG_PKG_USING_CCS811 is not set # CONFIG_PKG_USING_PMSXX is not set # CONFIG_PKG_USING_RT3020 is not set # CONFIG_PKG_USING_MLX90632 is not set -# CONFIG_PKG_USING_MLX90382 is not set -# CONFIG_PKG_USING_MLX90384 is not set # CONFIG_PKG_USING_MLX90393 is not set # CONFIG_PKG_USING_MLX90392 is not set -# CONFIG_PKG_USING_MLX90394 is not set -# CONFIG_PKG_USING_MLX90396 is not set # CONFIG_PKG_USING_MLX90397 is not set # CONFIG_PKG_USING_MS5611 is not set # CONFIG_PKG_USING_MAX31865 is not set @@ -1192,10 +1032,6 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_PAJ7620 is not set # CONFIG_PKG_USING_STHS34PF80 is not set -# CONFIG_PKG_USING_P3T1755 is not set -# CONFIG_PKG_USING_QMI8658 is not set -# CONFIG_PKG_USING_ICM20948 is not set -# CONFIG_PKG_USING_SCD4X is not set # end of sensors drivers # @@ -1213,7 +1049,6 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # CONFIG_PKG_USING_CST812T is not set # end of touch drivers -# CONFIG_PKG_USING_LCD_SPI_DRIVER is not set # CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_BUTTON is not set # CONFIG_PKG_USING_PCF8574 is not set @@ -1285,21 +1120,6 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # CONFIG_PKG_USING_SYSTEM_RUN_LED is not set # CONFIG_PKG_USING_BT_MX01 is not set # CONFIG_PKG_USING_RGPOWER is not set -# CONFIG_PKG_USING_BT_MX02 is not set -# CONFIG_PKG_USING_GC9A01 is not set -# CONFIG_PKG_USING_IK485 is not set -# CONFIG_PKG_USING_SERVO is not set -# CONFIG_PKG_USING_SEAN_WS2812B is not set -# CONFIG_PKG_USING_IC74HC165 is not set -# CONFIG_PKG_USING_IST8310 is not set -# CONFIG_PKG_USING_ST7789_SPI is not set -# CONFIG_PKG_USING_CAN_UDS is not set -# CONFIG_PKG_USING_ISOTP_C is not set -# CONFIG_PKG_USING_IKUNLED is not set -# CONFIG_PKG_USING_INS5T8025 is not set -# CONFIG_PKG_USING_IRUART is not set -# CONFIG_PKG_USING_ST7305 is not set -# CONFIG_PKG_USING_TM1668 is not set # CONFIG_PKG_USING_SPI_TOOLS is not set # end of peripheral libraries and drivers @@ -1316,19 +1136,16 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # CONFIG_PKG_USING_QUEST is not set # CONFIG_PKG_USING_NAXOS is not set # CONFIG_PKG_USING_R_TINYMAIX is not set -# CONFIG_PKG_USING_LLMCHAT is not set # end of AI packages # # Signal Processing and Control Algorithm Packages # -# CONFIG_PKG_USING_APID is not set # CONFIG_PKG_USING_FIRE_PID_CURVE is not set # CONFIG_PKG_USING_QPID is not set # CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_DIGITALCTRL is not set # CONFIG_PKG_USING_KISSFFT is not set -# CONFIG_PKG_USING_CMSIS_DSP is not set # end of Signal Processing and Control Algorithm Packages # @@ -1388,7 +1205,6 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # CONFIG_PKG_USING_KI is not set # CONFIG_PKG_USING_ARMv7M_DWT is not set # CONFIG_PKG_USING_CRCLIB is not set -# CONFIG_PKG_USING_LIBCRC is not set # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set # CONFIG_PKG_USING_DESIGN_PATTERN is not set @@ -1399,7 +1215,6 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # CONFIG_PKG_USING_SOEM is not set # CONFIG_PKG_USING_QPARAM is not set # CONFIG_PKG_USING_CorevMCU_CLI is not set -# CONFIG_PKG_USING_DRMP is not set # end of miscellaneous packages # @@ -1413,7 +1228,6 @@ CONFIG_RT_PAGE_MAX_ORDER=11 # CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set # CONFIG_PKG_USING_ARDUINO_SKETCH_LOADER_DEMO is not set # CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set -# CONFIG_PKG_USING_ARDUINO_RTDUINO_SENSORFUSION_SHIELD is not set # CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set # CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set # CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set @@ -1666,7 +1480,7 @@ CONFIG_RT_USING_UART1=y # CONFIG_BSP_USING_PWM is not set # CONFIG_BSP_USING_SDIF_LAYER is not set # CONFIG_BSP_USING_DC is not set -# CONFIG_BSP_USING_I2S is not set +# CONFIG_BSP_USING_I2S_LAYER is not set # CONFIG_BSP_USING_DEVICE is not set # end of On-chip Peripheral Drivers @@ -1745,7 +1559,7 @@ CONFIG_LOG_ERROR=y # CONFIG_LOG_EXTRA_INFO is not set # CONFIG_LOG_DISPALY_CORE_NUM is not set # CONFIG_BOOTUP_DEBUG_PRINTS is not set -CONFIG_USE_NS_GTIMER=y +CONFIG_USE_PHYSICAL_GTIMER=y # CONFIG_USE_VIRTUAL_GTIMER is not set CONFIG_USE_DEFAULT_INTERRUPT_CONFIG=y CONFIG_INTERRUPT_ROLE_MASTER=y diff --git a/bsp/phytium/aarch32/.config.origin b/bsp/phytium/aarch32/.config.origin deleted file mode 100644 index 7912b90a3b..0000000000 --- a/bsp/phytium/aarch32/.config.origin +++ /dev/null @@ -1,1551 +0,0 @@ - -# -# RT-Thread Kernel -# - -# -# klibc options -# - -# -# rt_vsnprintf options -# -# CONFIG_RT_KLIBC_USING_LIBC_VSNPRINTF is not set -# CONFIG_RT_KLIBC_USING_VSNPRINTF_LONGLONG is not set -# CONFIG_RT_KLIBC_USING_VSNPRINTF_STANDARD is not set -# end of rt_vsnprintf options - -# -# rt_vsscanf options -# -# CONFIG_RT_KLIBC_USING_LIBC_VSSCANF is not set -# end of rt_vsscanf options - -# -# rt_memset options -# -# CONFIG_RT_KLIBC_USING_USER_MEMSET is not set -# CONFIG_RT_KLIBC_USING_LIBC_MEMSET is not set -# CONFIG_RT_KLIBC_USING_TINY_MEMSET is not set -# end of rt_memset options - -# -# rt_memcpy options -# -# CONFIG_RT_KLIBC_USING_USER_MEMCPY is not set -# CONFIG_RT_KLIBC_USING_LIBC_MEMCPY is not set -# CONFIG_RT_KLIBC_USING_TINY_MEMCPY is not set -# end of rt_memcpy options - -# -# rt_memmove options -# -# CONFIG_RT_KLIBC_USING_USER_MEMMOVE is not set -# CONFIG_RT_KLIBC_USING_LIBC_MEMMOVE is not set -# end of rt_memmove options - -# -# rt_memcmp options -# -# CONFIG_RT_KLIBC_USING_USER_MEMCMP is not set -# CONFIG_RT_KLIBC_USING_LIBC_MEMCMP is not set -# end of rt_memcmp options - -# -# rt_strstr options -# -# CONFIG_RT_KLIBC_USING_USER_STRSTR is not set -# CONFIG_RT_KLIBC_USING_LIBC_STRSTR is not set -# end of rt_strstr options - -# -# rt_strcasecmp options -# -# CONFIG_RT_KLIBC_USING_USER_STRCASECMP is not set -# end of rt_strcasecmp options - -# -# rt_strncpy options -# -# CONFIG_RT_KLIBC_USING_USER_STRNCPY is not set -# CONFIG_RT_KLIBC_USING_LIBC_STRNCPY is not set -# end of rt_strncpy options - -# -# rt_strcpy options -# -# CONFIG_RT_KLIBC_USING_USER_STRCPY is not set -# CONFIG_RT_KLIBC_USING_LIBC_STRCPY is not set -# end of rt_strcpy options - -# -# rt_strncmp options -# -# CONFIG_RT_KLIBC_USING_USER_STRNCMP is not set -# CONFIG_RT_KLIBC_USING_LIBC_STRNCMP is not set -# end of rt_strncmp options - -# -# rt_strcmp options -# -# CONFIG_RT_KLIBC_USING_USER_STRCMP is not set -# CONFIG_RT_KLIBC_USING_LIBC_STRCMP is not set -# end of rt_strcmp options - -# -# rt_strlen options -# -# CONFIG_RT_KLIBC_USING_USER_STRLEN is not set -# CONFIG_RT_KLIBC_USING_LIBC_STRLEN is not set -# end of rt_strlen options - -# -# rt_strnlen options -# -# CONFIG_RT_KLIBC_USING_USER_STRNLEN is not set -# end of rt_strnlen options - -# CONFIG_RT_UTEST_TC_USING_KLIBC is not set -# end of klibc options - -CONFIG_RT_NAME_MAX=16 -# CONFIG_RT_USING_ARCH_DATA_TYPE is not set -# CONFIG_RT_USING_NANO is not set -# CONFIG_RT_USING_SMART is not set -# CONFIG_RT_USING_AMP is not set -# CONFIG_RT_USING_SMP is not set -CONFIG_RT_CPUS_NR=1 -CONFIG_RT_ALIGN_SIZE=4 -# CONFIG_RT_THREAD_PRIORITY_8 is not set -CONFIG_RT_THREAD_PRIORITY_32=y -# CONFIG_RT_THREAD_PRIORITY_256 is not set -CONFIG_RT_THREAD_PRIORITY_MAX=32 -CONFIG_RT_TICK_PER_SECOND=1000 -CONFIG_RT_USING_OVERFLOW_CHECK=y -CONFIG_RT_USING_HOOK=y -CONFIG_RT_HOOK_USING_FUNC_PTR=y -# CONFIG_RT_USING_HOOKLIST is not set -CONFIG_RT_USING_IDLE_HOOK=y -CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 -CONFIG_IDLE_THREAD_STACK_SIZE=4096 -CONFIG_RT_USING_TIMER_SOFT=y -CONFIG_RT_TIMER_THREAD_PRIO=4 -CONFIG_RT_TIMER_THREAD_STACK_SIZE=4096 -# CONFIG_RT_USING_TIMER_ALL_SOFT is not set -# CONFIG_RT_USING_CPU_USAGE_TRACER is not set - -# -# kservice options -# -# CONFIG_RT_USING_TINY_FFS is not set -# end of kservice options - -CONFIG_RT_USING_DEBUG=y -CONFIG_RT_DEBUGING_ASSERT=y -CONFIG_RT_DEBUGING_COLOR=y -CONFIG_RT_DEBUGING_CONTEXT=y -# CONFIG_RT_DEBUGING_AUTO_INIT is not set -# CONFIG_RT_USING_CI_ACTION is not set - -# -# Inter-Thread communication -# -CONFIG_RT_USING_SEMAPHORE=y -CONFIG_RT_USING_MUTEX=y -CONFIG_RT_USING_EVENT=y -CONFIG_RT_USING_MAILBOX=y -CONFIG_RT_USING_MESSAGEQUEUE=y -CONFIG_RT_USING_MESSAGEQUEUE_PRIORITY=y -# CONFIG_RT_USING_SIGNALS is not set -# end of Inter-Thread communication - -# -# Memory Management -# -CONFIG_RT_USING_MEMPOOL=y -# CONFIG_RT_USING_SMALL_MEM is not set -CONFIG_RT_USING_SLAB=y -CONFIG_RT_USING_MEMHEAP=y -CONFIG_RT_MEMHEAP_FAST_MODE=y -# CONFIG_RT_MEMHEAP_BEST_MODE is not set -# CONFIG_RT_USING_SMALL_MEM_AS_HEAP is not set -# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set -CONFIG_RT_USING_SLAB_AS_HEAP=y -# CONFIG_RT_USING_USERHEAP is not set -# CONFIG_RT_USING_NOHEAP is not set -# CONFIG_RT_USING_MEMTRACE is not set -CONFIG_RT_USING_HEAP_ISR=y -CONFIG_RT_USING_HEAP=y -# end of Memory Management - -CONFIG_RT_USING_DEVICE=y -# CONFIG_RT_USING_DEVICE_OPS is not set -# CONFIG_RT_USING_INTERRUPT_INFO is not set -# CONFIG_RT_USING_THREADSAFE_PRINTF is not set -CONFIG_RT_USING_CONSOLE=y -CONFIG_RT_CONSOLEBUF_SIZE=256 -CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" -CONFIG_RT_VER_NUM=0x50201 -# CONFIG_RT_USING_STDC_ATOMIC is not set -CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32 -# end of RT-Thread Kernel - -CONFIG_RT_USING_CACHE=y -CONFIG_RT_USING_HW_ATOMIC=y -CONFIG_RT_USING_CPU_FFS=y -CONFIG_ARCH_MM_MMU=y -CONFIG_ARCH_ARM=y -CONFIG_ARCH_ARM_MMU=y -CONFIG_ARCH_ARM_CORTEX_A=y -CONFIG_RT_USING_GIC_V3=y -# CONFIG_ARCH_ARM_SECURE_MODE is not set -# CONFIG_RT_BACKTRACE_FUNCTION_NAME is not set - -# -# RT-Thread Components -# -CONFIG_RT_USING_COMPONENTS_INIT=y -CONFIG_RT_USING_USER_MAIN=y -CONFIG_RT_MAIN_THREAD_STACK_SIZE=8192 -CONFIG_RT_MAIN_THREAD_PRIORITY=10 -# CONFIG_RT_USING_LEGACY is not set -CONFIG_RT_USING_MSH=y -CONFIG_RT_USING_FINSH=y -CONFIG_FINSH_USING_MSH=y -CONFIG_FINSH_THREAD_NAME="tshell" -CONFIG_FINSH_THREAD_PRIORITY=20 -CONFIG_FINSH_THREAD_STACK_SIZE=4096 -CONFIG_FINSH_USING_HISTORY=y -CONFIG_FINSH_HISTORY_LINES=5 -CONFIG_FINSH_USING_SYMTAB=y -CONFIG_FINSH_CMD_SIZE=80 -CONFIG_MSH_USING_BUILT_IN_COMMANDS=y -CONFIG_FINSH_USING_DESCRIPTION=y -# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set -# CONFIG_FINSH_USING_AUTH is not set -CONFIG_FINSH_ARG_MAX=10 -CONFIG_FINSH_USING_OPTION_COMPLETION=y - -# -# DFS: device virtual file system -# -CONFIG_RT_USING_DFS=y -CONFIG_DFS_USING_POSIX=y -CONFIG_DFS_USING_WORKDIR=y -# CONFIG_RT_USING_DFS_MNTTABLE is not set -CONFIG_DFS_FD_MAX=16 -CONFIG_RT_USING_DFS_V1=y -# CONFIG_RT_USING_DFS_V2 is not set -CONFIG_DFS_FILESYSTEMS_MAX=4 -CONFIG_DFS_FILESYSTEM_TYPES_MAX=4 -CONFIG_RT_USING_DFS_ELMFAT=y - -# -# elm-chan's FatFs, Generic FAT Filesystem Module -# -CONFIG_RT_DFS_ELM_CODE_PAGE=437 -CONFIG_RT_DFS_ELM_WORD_ACCESS=y -# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set -# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set -# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set -CONFIG_RT_DFS_ELM_USE_LFN_3=y -CONFIG_RT_DFS_ELM_USE_LFN=3 -CONFIG_RT_DFS_ELM_LFN_UNICODE_0=y -# CONFIG_RT_DFS_ELM_LFN_UNICODE_1 is not set -# CONFIG_RT_DFS_ELM_LFN_UNICODE_2 is not set -# CONFIG_RT_DFS_ELM_LFN_UNICODE_3 is not set -CONFIG_RT_DFS_ELM_LFN_UNICODE=0 -CONFIG_RT_DFS_ELM_MAX_LFN=255 -CONFIG_RT_DFS_ELM_DRIVES=2 -CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512 -# CONFIG_RT_DFS_ELM_USE_ERASE is not set -CONFIG_RT_DFS_ELM_REENTRANT=y -CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000 -# CONFIG_RT_DFS_ELM_USE_EXFAT is not set -# end of elm-chan's FatFs, Generic FAT Filesystem Module - -CONFIG_RT_USING_DFS_DEVFS=y -# CONFIG_RT_USING_DFS_ISO9660 is not set -# CONFIG_RT_USING_DFS_ROMFS is not set -# CONFIG_RT_USING_DFS_CROMFS is not set -CONFIG_RT_USING_DFS_RAMFS=y -# CONFIG_RT_USING_DFS_TMPFS is not set -CONFIG_RT_USING_DFS_MQUEUE=y -# CONFIG_RT_USING_DFS_NFS is not set -# end of DFS: device virtual file system - -# CONFIG_RT_USING_FAL is not set - -# -# Device Drivers -# -# CONFIG_RT_USING_DM is not set -CONFIG_RT_USING_DEV_BUS=y -CONFIG_RT_USING_DEVICE_IPC=y -CONFIG_RT_UNAMED_PIPE_NUMBER=64 -CONFIG_RT_USING_SYSTEM_WORKQUEUE=y -CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=4096 -CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23 -CONFIG_RT_USING_SERIAL=y -CONFIG_RT_USING_SERIAL_V1=y -# CONFIG_RT_USING_SERIAL_V2 is not set -CONFIG_RT_SERIAL_USING_DMA=y -CONFIG_RT_SERIAL_RB_BUFSZ=1024 -# CONFIG_RT_USING_SERIAL_BYPASS is not set -CONFIG_RT_USING_CAN=y -# CONFIG_RT_CAN_USING_HDR is not set -CONFIG_RT_CAN_USING_CANFD=y -# CONFIG_RT_USING_CPUTIME is not set -CONFIG_RT_USING_I2C=y -# CONFIG_RT_I2C_DEBUG is not set -CONFIG_RT_USING_I2C_BITOPS=y -# CONFIG_RT_I2C_BITOPS_DEBUG is not set -# CONFIG_RT_USING_SOFT_I2C is not set -# CONFIG_RT_USING_PHY is not set -# CONFIG_RT_USING_PHY_V2 is not set -# CONFIG_RT_USING_ADC is not set -# CONFIG_RT_USING_DAC is not set -CONFIG_RT_USING_NULL=y -CONFIG_RT_USING_ZERO=y -CONFIG_RT_USING_RANDOM=y -CONFIG_RT_USING_PWM=y -# CONFIG_RT_USING_PULSE_ENCODER is not set -# CONFIG_RT_USING_INPUT_CAPTURE is not set -# CONFIG_RT_USING_MTD_NOR is not set -# CONFIG_RT_USING_MTD_NAND is not set -# CONFIG_RT_USING_PM is not set -CONFIG_RT_USING_RTC=y -# CONFIG_RT_USING_ALARM is not set -# CONFIG_RT_USING_SOFT_RTC is not set -CONFIG_RT_USING_SDIO=y -CONFIG_RT_SDIO_STACK_SIZE=4096 -CONFIG_RT_SDIO_THREAD_PRIORITY=15 -CONFIG_RT_MMCSD_STACK_SIZE=4096 -CONFIG_RT_MMCSD_THREAD_PRIORITY=22 -CONFIG_RT_MMCSD_MAX_PARTITION=16 -# CONFIG_RT_SDIO_DEBUG is not set -# CONFIG_RT_USING_SDHCI is not set -CONFIG_RT_USING_SPI=y -# CONFIG_RT_USING_SOFT_SPI is not set -CONFIG_RT_USING_QSPI=y -# CONFIG_RT_USING_SPI_MSD is not set -# CONFIG_RT_USING_SFUD is not set -# CONFIG_RT_USING_ENC28J60 is not set -# CONFIG_RT_USING_SPI_WIFI is not set -# CONFIG_RT_USING_WDT is not set -CONFIG_RT_USING_AUDIO=y -CONFIG_RT_AUDIO_REPLAY_MP_BLOCK_SIZE=4096 -CONFIG_RT_AUDIO_REPLAY_MP_BLOCK_COUNT=2 -CONFIG_RT_AUDIO_RECORD_PIPE_SIZE=2048 -# CONFIG_RT_USING_SENSOR is not set -# CONFIG_RT_USING_TOUCH is not set -# CONFIG_RT_USING_LCD is not set -# CONFIG_RT_USING_HWCRYPTO is not set -# CONFIG_RT_USING_WIFI is not set -CONFIG_RT_USING_BLK=y - -# -# Partition Types -# -CONFIG_RT_BLK_PARTITION_DFS=y -CONFIG_RT_BLK_PARTITION_EFI=y -# end of Partition Types - -# CONFIG_RT_USING_VIRTIO is not set -CONFIG_RT_USING_PIN=y -CONFIG_RT_USING_KTIME=y -# CONFIG_RT_USING_HWTIMER is not set -# CONFIG_RT_USING_CHERRYUSB is not set -# end of Device Drivers - -# -# C/C++ and POSIX layer -# - -# -# ISO-ANSI C layer -# - -# -# Timezone and Daylight Saving Time -# -# CONFIG_RT_LIBC_USING_FULL_TZ_DST is not set -CONFIG_RT_LIBC_USING_LIGHT_TZ_DST=y -CONFIG_RT_LIBC_TZ_DEFAULT_HOUR=8 -CONFIG_RT_LIBC_TZ_DEFAULT_MIN=0 -CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 -# end of Timezone and Daylight Saving Time -# end of ISO-ANSI C layer - -# -# POSIX (Portable Operating System Interface) layer -# -CONFIG_RT_USING_POSIX_FS=y -CONFIG_RT_USING_POSIX_DEVIO=y -CONFIG_RT_USING_POSIX_STDIO=y -CONFIG_RT_USING_POSIX_POLL=y -CONFIG_RT_USING_POSIX_SELECT=y -# CONFIG_RT_USING_POSIX_EVENTFD is not set -# CONFIG_RT_USING_POSIX_TIMERFD is not set -# CONFIG_RT_USING_POSIX_SOCKET is not set -CONFIG_RT_USING_POSIX_TERMIOS=y -CONFIG_RT_USING_POSIX_AIO=y -# CONFIG_RT_USING_POSIX_MMAN is not set -CONFIG_RT_USING_POSIX_DELAY=y -CONFIG_RT_USING_POSIX_CLOCK=y -CONFIG_RT_USING_POSIX_TIMER=y -# CONFIG_RT_USING_PTHREADS is not set -# CONFIG_RT_USING_MODULE is not set - -# -# Interprocess Communication (IPC) -# -CONFIG_RT_USING_POSIX_PIPE=y -CONFIG_RT_USING_POSIX_PIPE_SIZE=512 -CONFIG_RT_USING_POSIX_MESSAGE_QUEUE=y -CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE=y - -# -# Socket is in the 'Network' category -# -# end of Interprocess Communication (IPC) -# end of POSIX (Portable Operating System Interface) layer - -# CONFIG_RT_USING_CPLUSPLUS is not set -# end of C/C++ and POSIX layer - -# -# Network -# -CONFIG_RT_USING_SAL=y -CONFIG_SAL_INTERNET_CHECK=y - -# -# Docking with protocol stacks -# -CONFIG_SAL_USING_LWIP=y -# CONFIG_SAL_USING_AT is not set -# CONFIG_SAL_USING_TLS is not set -# end of Docking with protocol stacks - -CONFIG_SAL_USING_POSIX=y -CONFIG_RT_USING_NETDEV=y -CONFIG_NETDEV_USING_IFCONFIG=y -CONFIG_NETDEV_USING_PING=y -CONFIG_NETDEV_USING_NETSTAT=y -CONFIG_NETDEV_USING_AUTO_DEFAULT=y -# CONFIG_NETDEV_USING_LINK_STATUS_CALLBACK is not set -# CONFIG_NETDEV_USING_IPV6 is not set -CONFIG_NETDEV_IPV4=1 -CONFIG_NETDEV_IPV6=0 -CONFIG_RT_USING_LWIP=y -# CONFIG_RT_USING_LWIP_LOCAL_VERSION is not set -# CONFIG_RT_USING_LWIP141 is not set -# CONFIG_RT_USING_LWIP203 is not set -CONFIG_RT_USING_LWIP212=y -# CONFIG_RT_USING_LWIP_LATEST is not set -CONFIG_RT_USING_LWIP_VER_NUM=0x20102 -# CONFIG_RT_USING_LWIP_IPV6 is not set -CONFIG_RT_LWIP_MEM_ALIGNMENT=64 -CONFIG_RT_LWIP_IGMP=y -CONFIG_RT_LWIP_ICMP=y -# CONFIG_RT_LWIP_SNMP is not set -CONFIG_RT_LWIP_DNS=y -# CONFIG_RT_LWIP_DHCP is not set - -# -# Static IPv4 Address -# -CONFIG_RT_LWIP_IPADDR="192.168.4.10" -CONFIG_RT_LWIP_GWADDR="192.168.4.1" -CONFIG_RT_LWIP_MSKADDR="255.255.255.0" -# end of Static IPv4 Address - -CONFIG_RT_LWIP_UDP=y -CONFIG_RT_LWIP_TCP=y -CONFIG_RT_LWIP_RAW=y -# CONFIG_RT_LWIP_PPP is not set -CONFIG_RT_MEMP_NUM_NETCONN=8 -CONFIG_RT_LWIP_PBUF_NUM=512 -CONFIG_RT_LWIP_RAW_PCB_NUM=4 -CONFIG_RT_LWIP_UDP_PCB_NUM=4 -CONFIG_RT_LWIP_TCP_PCB_NUM=4 -CONFIG_RT_LWIP_TCP_SEG_NUM=40 -CONFIG_RT_LWIP_TCP_SND_BUF=8196 -CONFIG_RT_LWIP_TCP_WND=8196 -CONFIG_RT_LWIP_TCPTHREAD_PRIORITY=16 -CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=8 -CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=16184 -# CONFIG_LWIP_NO_RX_THREAD is not set -# CONFIG_LWIP_NO_TX_THREAD is not set -CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12 -CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=8192 -CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8 -CONFIG_RT_LWIP_REASSEMBLY_FRAG=y -CONFIG_LWIP_NETIF_STATUS_CALLBACK=1 -CONFIG_LWIP_NETIF_LINK_CALLBACK=1 -CONFIG_RT_LWIP_NETIF_NAMESIZE=6 -CONFIG_SO_REUSE=1 -CONFIG_LWIP_SO_RCVTIMEO=1 -CONFIG_LWIP_SO_SNDTIMEO=1 -CONFIG_LWIP_SO_RCVBUF=1 -CONFIG_LWIP_SO_LINGER=0 -# CONFIG_RT_LWIP_NETIF_LOOPBACK is not set -CONFIG_LWIP_NETIF_LOOPBACK=0 -# CONFIG_RT_LWIP_STATS is not set -# CONFIG_RT_LWIP_USING_HW_CHECKSUM is not set -CONFIG_RT_LWIP_USING_PING=y -# CONFIG_LWIP_USING_DHCPD is not set -# CONFIG_RT_LWIP_ENABLE_USER_HOOKS is not set -# CONFIG_RT_LWIP_DEBUG is not set -# CONFIG_RT_USING_AT is not set -# end of Network - -# -# Memory protection -# -# CONFIG_RT_USING_MEM_PROTECTION is not set -# CONFIG_RT_USING_HW_STACK_GUARD is not set -# end of Memory protection - -# -# Utilities -# -CONFIG_RT_USING_RYM=y -# CONFIG_YMODEM_USING_CRC_TABLE is not set -CONFIG_YMODEM_USING_FILE_TRANSFER=y -# CONFIG_RT_USING_ULOG is not set -CONFIG_RT_USING_UTEST=y -CONFIG_UTEST_THR_STACK_SIZE=4096 -CONFIG_UTEST_THR_PRIORITY=20 -# CONFIG_RT_UTEST_USING_AUTO_RUN is not set -# CONFIG_RT_UTEST_USING_ALL_CASES is not set -# CONFIG_RT_USING_VAR_EXPORT is not set -CONFIG_RT_USING_RESOURCE_ID=y -CONFIG_RT_USING_ADT=y -CONFIG_RT_USING_ADT_AVL=y -CONFIG_RT_USING_ADT_BITMAP=y -CONFIG_RT_USING_ADT_HASHMAP=y -CONFIG_RT_USING_ADT_REF=y -# CONFIG_RT_USING_RT_LINK is not set -# end of Utilities - -# CONFIG_RT_USING_VBUS is not set - -# -# Memory management -# -CONFIG_RT_PAGE_AFFINITY_BLOCK_SIZE=0x1000 -CONFIG_RT_PAGE_MAX_ORDER=11 -# CONFIG_RT_USING_MEMBLOCK is not set - -# -# Debugging -# -# CONFIG_RT_DEBUGGING_ALIASING is not set -# CONFIG_RT_DEBUGING_PAGE_LEAK is not set -# CONFIG_RT_DEBUGGING_PAGE_POISON is not set -# end of Debugging -# end of Memory management - -# -# Using USB legacy version -# -# CONFIG_RT_USING_USB_HOST is not set -# CONFIG_RT_USING_USB_DEVICE is not set -# end of Using USB legacy version - -# CONFIG_RT_USING_FDT is not set -# end of RT-Thread Components - -# -# RT-Thread Utestcases -# -# CONFIG_RT_USING_UTESTCASES is not set -# end of RT-Thread Utestcases - -# -# RT-Thread online packages -# - -# -# IoT - internet of things -# -# CONFIG_PKG_USING_LORAWAN_DRIVER is not set -# CONFIG_PKG_USING_PAHOMQTT is not set -# CONFIG_PKG_USING_UMQTT is not set -# CONFIG_PKG_USING_WEBCLIENT is not set -# CONFIG_PKG_USING_WEBNET is not set -# CONFIG_PKG_USING_MONGOOSE is not set -# CONFIG_PKG_USING_MYMQTT is not set -# CONFIG_PKG_USING_KAWAII_MQTT is not set -# CONFIG_PKG_USING_BC28_MQTT is not set -# CONFIG_PKG_USING_WEBTERMINAL is not set -# CONFIG_PKG_USING_FREEMODBUS is not set -# CONFIG_PKG_USING_NANOPB is not set -# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set - -# -# Wi-Fi -# - -# -# Marvell WiFi -# -# CONFIG_PKG_USING_WLANMARVELL is not set -# end of Marvell WiFi - -# -# Wiced WiFi -# -# CONFIG_PKG_USING_WLAN_WICED is not set -# end of Wiced WiFi - -# CONFIG_PKG_USING_RW007 is not set - -# -# CYW43012 WiFi -# -# CONFIG_PKG_USING_WLAN_CYW43012 is not set -# end of CYW43012 WiFi - -# -# BL808 WiFi -# -# CONFIG_PKG_USING_WLAN_BL808 is not set -# end of BL808 WiFi - -# -# CYW43439 WiFi -# -# CONFIG_PKG_USING_WLAN_CYW43439 is not set -# end of CYW43439 WiFi -# end of Wi-Fi - -# CONFIG_PKG_USING_COAP is not set -# CONFIG_PKG_USING_NOPOLL is not set -# CONFIG_PKG_USING_NETUTILS is not set -# CONFIG_PKG_USING_CMUX is not set -# CONFIG_PKG_USING_PPP_DEVICE is not set -# CONFIG_PKG_USING_AT_DEVICE is not set -# CONFIG_PKG_USING_ATSRV_SOCKET is not set -# CONFIG_PKG_USING_WIZNET is not set -# CONFIG_PKG_USING_ZB_COORDINATOR is not set - -# -# IoT Cloud -# -# CONFIG_PKG_USING_ONENET is not set -# CONFIG_PKG_USING_GAGENT_CLOUD is not set -# CONFIG_PKG_USING_ALI_IOTKIT is not set -# CONFIG_PKG_USING_AZURE is not set -# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set -# CONFIG_PKG_USING_JIOT-C-SDK is not set -# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set -# CONFIG_PKG_USING_JOYLINK is not set -# CONFIG_PKG_USING_IOTSHARP_SDK is not set -# end of IoT Cloud - -# CONFIG_PKG_USING_NIMBLE is not set -# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set -# CONFIG_PKG_USING_OTA_DOWNLOADER is not set -# CONFIG_PKG_USING_IPMSG is not set -# CONFIG_PKG_USING_LSSDP is not set -# CONFIG_PKG_USING_AIRKISS_OPEN is not set -# CONFIG_PKG_USING_LIBRWS is not set -# CONFIG_PKG_USING_TCPSERVER is not set -# CONFIG_PKG_USING_PROTOBUF_C is not set -# CONFIG_PKG_USING_DLT645 is not set -# CONFIG_PKG_USING_QXWZ is not set -# CONFIG_PKG_USING_SMTP_CLIENT is not set -# CONFIG_PKG_USING_ABUP_FOTA is not set -# CONFIG_PKG_USING_LIBCURL2RTT is not set -# CONFIG_PKG_USING_CAPNP is not set -# CONFIG_PKG_USING_AGILE_TELNET is not set -# CONFIG_PKG_USING_NMEALIB is not set -# CONFIG_PKG_USING_PDULIB is not set -# CONFIG_PKG_USING_BTSTACK is not set -# CONFIG_PKG_USING_BT_CYW43012 is not set -# CONFIG_PKG_USING_CYW43XX is not set -# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set -# CONFIG_PKG_USING_WAYZ_IOTKIT is not set -# CONFIG_PKG_USING_MAVLINK is not set -# CONFIG_PKG_USING_BSAL is not set -# CONFIG_PKG_USING_AGILE_MODBUS is not set -# CONFIG_PKG_USING_AGILE_FTP is not set -# CONFIG_PKG_USING_EMBEDDEDPROTO is not set -# CONFIG_PKG_USING_RT_LINK_HW is not set -# CONFIG_PKG_USING_RYANMQTT is not set -# CONFIG_PKG_USING_RYANW5500 is not set -# CONFIG_PKG_USING_LORA_PKT_FWD is not set -# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set -# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set -# CONFIG_PKG_USING_HM is not set -# CONFIG_PKG_USING_SMALL_MODBUS is not set -# CONFIG_PKG_USING_NET_SERVER is not set -# CONFIG_PKG_USING_ZFTP is not set -# CONFIG_PKG_USING_WOL is not set -# CONFIG_PKG_USING_ZEPHYR_POLLING is not set -# CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set -# CONFIG_PKG_USING_LHC_MODBUS is not set -# CONFIG_PKG_USING_QMODBUS is not set -# end of IoT - internet of things - -# -# security packages -# -# CONFIG_PKG_USING_MBEDTLS is not set -# CONFIG_PKG_USING_LIBSODIUM is not set -# CONFIG_PKG_USING_LIBHYDROGEN is not set -# CONFIG_PKG_USING_TINYCRYPT is not set -# CONFIG_PKG_USING_TFM is not set -# CONFIG_PKG_USING_YD_CRYPTO is not set -# end of security packages - -# -# language packages -# - -# -# JSON: JavaScript Object Notation, a lightweight data-interchange format -# -# CONFIG_PKG_USING_CJSON is not set -# CONFIG_PKG_USING_LJSON is not set -# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set -# CONFIG_PKG_USING_RAPIDJSON is not set -# CONFIG_PKG_USING_JSMN is not set -# CONFIG_PKG_USING_AGILE_JSMN is not set -# CONFIG_PKG_USING_PARSON is not set -# end of JSON: JavaScript Object Notation, a lightweight data-interchange format - -# -# XML: Extensible Markup Language -# -# CONFIG_PKG_USING_SIMPLE_XML is not set -# CONFIG_PKG_USING_EZXML is not set -# end of XML: Extensible Markup Language - -# CONFIG_PKG_USING_LUATOS_SOC is not set -# CONFIG_PKG_USING_LUA is not set -# CONFIG_PKG_USING_JERRYSCRIPT is not set -# CONFIG_PKG_USING_MICROPYTHON is not set -# CONFIG_PKG_USING_PIKASCRIPT is not set -# CONFIG_PKG_USING_RTT_RUST is not set -# end of language packages - -# -# multimedia packages -# - -# -# LVGL: powerful and easy-to-use embedded GUI library -# -# CONFIG_PKG_USING_LVGL is not set -# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set -# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set -# end of LVGL: powerful and easy-to-use embedded GUI library - -# -# u8g2: a monochrome graphic library -# -# CONFIG_PKG_USING_U8G2_OFFICIAL is not set -# CONFIG_PKG_USING_U8G2 is not set -# end of u8g2: a monochrome graphic library - -# CONFIG_PKG_USING_OPENMV is not set -# CONFIG_PKG_USING_MUPDF is not set -# CONFIG_PKG_USING_STEMWIN is not set -# CONFIG_PKG_USING_WAVPLAYER is not set -# CONFIG_PKG_USING_TJPGD is not set -# CONFIG_PKG_USING_PDFGEN is not set -# CONFIG_PKG_USING_HELIX is not set -# CONFIG_PKG_USING_AZUREGUIX is not set -# CONFIG_PKG_USING_TOUCHGFX2RTT is not set -# CONFIG_PKG_USING_NUEMWIN is not set -# CONFIG_PKG_USING_MP3PLAYER is not set -# CONFIG_PKG_USING_TINYJPEG is not set -# CONFIG_PKG_USING_UGUI is not set -# CONFIG_PKG_USING_MCURSES is not set -# CONFIG_PKG_USING_TERMBOX is not set -# CONFIG_PKG_USING_VT100 is not set -# CONFIG_PKG_USING_QRCODE is not set -# CONFIG_PKG_USING_GUIENGINE is not set -# CONFIG_PKG_USING_PERSIMMON is not set -# CONFIG_PKG_USING_3GPP_AMRNB is not set -# end of multimedia packages - -# -# tools packages -# -# CONFIG_PKG_USING_CMBACKTRACE is not set -# CONFIG_PKG_USING_EASYFLASH is not set -# CONFIG_PKG_USING_EASYLOGGER is not set -# CONFIG_PKG_USING_SYSTEMVIEW is not set -# CONFIG_PKG_USING_SEGGER_RTT is not set -# CONFIG_PKG_USING_RTT_AUTO_EXE_CMD is not set -# CONFIG_PKG_USING_RDB is not set -# CONFIG_PKG_USING_ULOG_EASYFLASH is not set -# CONFIG_PKG_USING_LOGMGR is not set -# CONFIG_PKG_USING_ADBD is not set -# CONFIG_PKG_USING_COREMARK is not set -# CONFIG_PKG_USING_DHRYSTONE is not set -# CONFIG_PKG_USING_MEMORYPERF is not set -# CONFIG_PKG_USING_NR_MICRO_SHELL is not set -# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set -# CONFIG_PKG_USING_LUNAR_CALENDAR is not set -# CONFIG_PKG_USING_BS8116A is not set -# CONFIG_PKG_USING_GPS_RMC is not set -# CONFIG_PKG_USING_URLENCODE is not set -# CONFIG_PKG_USING_UMCN is not set -# CONFIG_PKG_USING_LWRB2RTT is not set -# CONFIG_PKG_USING_CPU_USAGE is not set -# CONFIG_PKG_USING_GBK2UTF8 is not set -# CONFIG_PKG_USING_VCONSOLE is not set -# CONFIG_PKG_USING_KDB is not set -# CONFIG_PKG_USING_WAMR is not set -# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set -# CONFIG_PKG_USING_LWLOG is not set -# CONFIG_PKG_USING_ANV_TRACE is not set -# CONFIG_PKG_USING_ANV_MEMLEAK is not set -# CONFIG_PKG_USING_ANV_TESTSUIT is not set -# CONFIG_PKG_USING_ANV_BENCH is not set -# CONFIG_PKG_USING_DEVMEM is not set -# CONFIG_PKG_USING_REGEX is not set -# CONFIG_PKG_USING_MEM_SANDBOX is not set -# CONFIG_PKG_USING_SOLAR_TERMS is not set -# CONFIG_PKG_USING_GAN_ZHI is not set -# CONFIG_PKG_USING_FDT is not set -# CONFIG_PKG_USING_CBOX is not set -# CONFIG_PKG_USING_SNOWFLAKE is not set -# CONFIG_PKG_USING_HASH_MATCH is not set -# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set -# CONFIG_PKG_USING_VOFA_PLUS is not set -# CONFIG_PKG_USING_ZDEBUG is not set -# end of tools packages - -# -# system packages -# - -# -# enhanced kernel services -# -# CONFIG_PKG_USING_RT_MEMCPY_CM is not set -# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set -# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set -# end of enhanced kernel services - -# -# acceleration: Assembly language or algorithmic acceleration packages -# -# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set -# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set -# CONFIG_PKG_USING_QFPLIB_M3 is not set -# end of acceleration: Assembly language or algorithmic acceleration packages - -# -# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard -# -# CONFIG_PKG_USING_CMSIS_5 is not set -# CONFIG_PKG_USING_CMSIS_CORE is not set -# CONFIG_PKG_USING_CMSIS_DSP is not set -# CONFIG_PKG_USING_CMSIS_NN is not set -# CONFIG_PKG_USING_CMSIS_RTOS1 is not set -# CONFIG_PKG_USING_CMSIS_RTOS2 is not set -# end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard - -# -# Micrium: Micrium software products porting for RT-Thread -# -# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set -# CONFIG_PKG_USING_UCOSII_WRAPPER is not set -# CONFIG_PKG_USING_UC_CRC is not set -# CONFIG_PKG_USING_UC_CLK is not set -# CONFIG_PKG_USING_UC_COMMON is not set -# CONFIG_PKG_USING_UC_MODBUS is not set -# end of Micrium: Micrium software products porting for RT-Thread - -# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set -# CONFIG_PKG_USING_LITEOS_SDK is not set -# CONFIG_PKG_USING_TZ_DATABASE is not set -# CONFIG_PKG_USING_CAIRO is not set -# CONFIG_PKG_USING_PIXMAN is not set -# CONFIG_PKG_USING_PARTITION is not set -# CONFIG_PKG_USING_PERF_COUNTER is not set -# CONFIG_PKG_USING_FILEX is not set -# CONFIG_PKG_USING_LEVELX is not set -# CONFIG_PKG_USING_FLASHDB is not set -# CONFIG_PKG_USING_SQLITE is not set -# CONFIG_PKG_USING_RTI is not set -# CONFIG_PKG_USING_DFS_YAFFS is not set -# CONFIG_PKG_USING_LITTLEFS is not set -# CONFIG_PKG_USING_DFS_JFFS2 is not set -# CONFIG_PKG_USING_DFS_UFFS is not set -# CONFIG_PKG_USING_LWEXT4 is not set -# CONFIG_PKG_USING_THREAD_POOL is not set -# CONFIG_PKG_USING_ROBOTS is not set -# CONFIG_PKG_USING_EV is not set -# CONFIG_PKG_USING_SYSWATCH is not set -# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set -# CONFIG_PKG_USING_PLCCORE is not set -# CONFIG_PKG_USING_RAMDISK is not set -# CONFIG_PKG_USING_MININI is not set -# CONFIG_PKG_USING_QBOOT is not set -# CONFIG_PKG_USING_PPOOL is not set -# CONFIG_PKG_USING_OPENAMP is not set -# CONFIG_PKG_USING_RPMSG_LITE is not set -# CONFIG_PKG_USING_LPM is not set -# CONFIG_PKG_USING_TLSF is not set -# CONFIG_PKG_USING_EVENT_RECORDER is not set -# CONFIG_PKG_USING_ARM_2D is not set -# CONFIG_PKG_USING_MCUBOOT is not set -# CONFIG_PKG_USING_TINYUSB is not set -# CONFIG_PKG_USING_CHERRYUSB is not set -# CONFIG_PKG_USING_KMULTI_RTIMER is not set -# CONFIG_PKG_USING_TFDB is not set -# CONFIG_PKG_USING_QPC is not set -# CONFIG_PKG_USING_AGILE_UPGRADE is not set -# CONFIG_PKG_USING_FLASH_BLOB is not set -# CONFIG_PKG_USING_MLIBC is not set -# CONFIG_PKG_USING_TASK_MSG_BUS is not set -# CONFIG_PKG_USING_SFDB is not set -# CONFIG_PKG_USING_RTP is not set -# CONFIG_PKG_USING_REB is not set -# CONFIG_PKG_USING_R_RHEALSTONE is not set -# end of system packages - -# -# peripheral libraries and drivers -# - -# -# HAL & SDK Drivers -# - -# -# STM32 HAL & SDK Drivers -# -# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32WB55_SDK is not set -# CONFIG_PKG_USING_STM32_SDIO is not set -# end of STM32 HAL & SDK Drivers - -# CONFIG_PKG_USING_BLUETRUM_SDK is not set -# CONFIG_PKG_USING_EMBARC_BSP is not set -# CONFIG_PKG_USING_ESP_IDF is not set - -# -# Kendryte SDK -# -# CONFIG_PKG_USING_K210_SDK is not set -# CONFIG_PKG_USING_KENDRYTE_SDK is not set -# end of Kendryte SDK - -# CONFIG_PKG_USING_NRF5X_SDK is not set -# CONFIG_PKG_USING_NRFX is not set -# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set -# end of HAL & SDK Drivers - -# -# sensors drivers -# -# CONFIG_PKG_USING_LSM6DSM is not set -# CONFIG_PKG_USING_LSM6DSL is not set -# CONFIG_PKG_USING_LPS22HB is not set -# CONFIG_PKG_USING_HTS221 is not set -# CONFIG_PKG_USING_LSM303AGR is not set -# CONFIG_PKG_USING_BME280 is not set -# CONFIG_PKG_USING_BME680 is not set -# CONFIG_PKG_USING_BMA400 is not set -# CONFIG_PKG_USING_BMI160_BMX160 is not set -# CONFIG_PKG_USING_SPL0601 is not set -# CONFIG_PKG_USING_MS5805 is not set -# CONFIG_PKG_USING_DA270 is not set -# CONFIG_PKG_USING_DF220 is not set -# CONFIG_PKG_USING_HSHCAL001 is not set -# CONFIG_PKG_USING_BH1750 is not set -# CONFIG_PKG_USING_MPU6XXX is not set -# CONFIG_PKG_USING_AHT10 is not set -# CONFIG_PKG_USING_AP3216C is not set -# CONFIG_PKG_USING_TSL4531 is not set -# CONFIG_PKG_USING_DS18B20 is not set -# CONFIG_PKG_USING_DHT11 is not set -# CONFIG_PKG_USING_DHTXX is not set -# CONFIG_PKG_USING_GY271 is not set -# CONFIG_PKG_USING_GP2Y10 is not set -# CONFIG_PKG_USING_SGP30 is not set -# CONFIG_PKG_USING_HDC1000 is not set -# CONFIG_PKG_USING_BMP180 is not set -# CONFIG_PKG_USING_BMP280 is not set -# CONFIG_PKG_USING_SHTC1 is not set -# CONFIG_PKG_USING_BMI088 is not set -# CONFIG_PKG_USING_HMC5883 is not set -# CONFIG_PKG_USING_MAX6675 is not set -# CONFIG_PKG_USING_TMP1075 is not set -# CONFIG_PKG_USING_SR04 is not set -# CONFIG_PKG_USING_CCS811 is not set -# CONFIG_PKG_USING_PMSXX is not set -# CONFIG_PKG_USING_RT3020 is not set -# CONFIG_PKG_USING_MLX90632 is not set -# CONFIG_PKG_USING_MLX90393 is not set -# CONFIG_PKG_USING_MLX90392 is not set -# CONFIG_PKG_USING_MLX90397 is not set -# CONFIG_PKG_USING_MS5611 is not set -# CONFIG_PKG_USING_MAX31865 is not set -# CONFIG_PKG_USING_VL53L0X is not set -# CONFIG_PKG_USING_INA260 is not set -# CONFIG_PKG_USING_MAX30102 is not set -# CONFIG_PKG_USING_INA226 is not set -# CONFIG_PKG_USING_LIS2DH12 is not set -# CONFIG_PKG_USING_HS300X is not set -# CONFIG_PKG_USING_ZMOD4410 is not set -# CONFIG_PKG_USING_ISL29035 is not set -# CONFIG_PKG_USING_MMC3680KJ is not set -# CONFIG_PKG_USING_QMP6989 is not set -# CONFIG_PKG_USING_BALANCE is not set -# CONFIG_PKG_USING_SHT2X is not set -# CONFIG_PKG_USING_SHT3X is not set -# CONFIG_PKG_USING_SHT4X is not set -# CONFIG_PKG_USING_AD7746 is not set -# CONFIG_PKG_USING_ADT74XX is not set -# CONFIG_PKG_USING_MAX17048 is not set -# CONFIG_PKG_USING_AS7341 is not set -# CONFIG_PKG_USING_CW2015 is not set -# CONFIG_PKG_USING_ICM20608 is not set -# CONFIG_PKG_USING_PAJ7620 is not set -# CONFIG_PKG_USING_STHS34PF80 is not set -# end of sensors drivers - -# -# touch drivers -# -# CONFIG_PKG_USING_GT9147 is not set -# CONFIG_PKG_USING_GT1151 is not set -# CONFIG_PKG_USING_GT917S is not set -# CONFIG_PKG_USING_GT911 is not set -# CONFIG_PKG_USING_FT6206 is not set -# CONFIG_PKG_USING_FT5426 is not set -# CONFIG_PKG_USING_FT6236 is not set -# CONFIG_PKG_USING_XPT2046_TOUCH is not set -# CONFIG_PKG_USING_CST816X is not set -# CONFIG_PKG_USING_CST812T is not set -# end of touch drivers - -# CONFIG_PKG_USING_REALTEK_AMEBA is not set -# CONFIG_PKG_USING_BUTTON is not set -# CONFIG_PKG_USING_PCF8574 is not set -# CONFIG_PKG_USING_SX12XX is not set -# CONFIG_PKG_USING_SIGNAL_LED is not set -# CONFIG_PKG_USING_LEDBLINK is not set -# CONFIG_PKG_USING_LITTLED is not set -# CONFIG_PKG_USING_LKDGUI is not set -# CONFIG_PKG_USING_INFRARED is not set -# CONFIG_PKG_USING_MULTI_INFRARED is not set -# CONFIG_PKG_USING_AGILE_BUTTON is not set -# CONFIG_PKG_USING_AGILE_LED is not set -# CONFIG_PKG_USING_AT24CXX is not set -# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set -# CONFIG_PKG_USING_PCA9685 is not set -# CONFIG_PKG_USING_ILI9341 is not set -# CONFIG_PKG_USING_I2C_TOOLS is not set -# CONFIG_PKG_USING_NRF24L01 is not set -# CONFIG_PKG_USING_RPLIDAR is not set -# CONFIG_PKG_USING_AS608 is not set -# CONFIG_PKG_USING_RC522 is not set -# CONFIG_PKG_USING_WS2812B is not set -# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set -# CONFIG_PKG_USING_MULTI_RTIMER is not set -# CONFIG_PKG_USING_MAX7219 is not set -# CONFIG_PKG_USING_BEEP is not set -# CONFIG_PKG_USING_EASYBLINK is not set -# CONFIG_PKG_USING_PMS_SERIES is not set -# CONFIG_PKG_USING_CAN_YMODEM is not set -# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set -# CONFIG_PKG_USING_QLED is not set -# CONFIG_PKG_USING_AGILE_CONSOLE is not set -# CONFIG_PKG_USING_LD3320 is not set -# CONFIG_PKG_USING_WK2124 is not set -# CONFIG_PKG_USING_LY68L6400 is not set -# CONFIG_PKG_USING_DM9051 is not set -# CONFIG_PKG_USING_SSD1306 is not set -# CONFIG_PKG_USING_QKEY is not set -# CONFIG_PKG_USING_RS485 is not set -# CONFIG_PKG_USING_RS232 is not set -# CONFIG_PKG_USING_NES is not set -# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set -# CONFIG_PKG_USING_VDEVICE is not set -# CONFIG_PKG_USING_SGM706 is not set -# CONFIG_PKG_USING_RDA58XX is not set -# CONFIG_PKG_USING_LIBNFC is not set -# CONFIG_PKG_USING_MFOC is not set -# CONFIG_PKG_USING_TMC51XX is not set -# CONFIG_PKG_USING_TCA9534 is not set -# CONFIG_PKG_USING_KOBUKI is not set -# CONFIG_PKG_USING_ROSSERIAL is not set -# CONFIG_PKG_USING_MICRO_ROS is not set -# CONFIG_PKG_USING_MCP23008 is not set -# CONFIG_PKG_USING_MISAKA_AT24CXX is not set -# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set -# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set -# CONFIG_PKG_USING_SOFT_SERIAL is not set -# CONFIG_PKG_USING_MB85RS16 is not set -# CONFIG_PKG_USING_RFM300 is not set -# CONFIG_PKG_USING_IO_INPUT_FILTER is not set -# CONFIG_PKG_USING_LRF_NV7LIDAR is not set -# CONFIG_PKG_USING_AIP650 is not set -# CONFIG_PKG_USING_FINGERPRINT is not set -# CONFIG_PKG_USING_BT_ECB02C is not set -# CONFIG_PKG_USING_UAT is not set -# CONFIG_PKG_USING_ST7789 is not set -# CONFIG_PKG_USING_VS1003 is not set -# CONFIG_PKG_USING_X9555 is not set -# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set -# CONFIG_PKG_USING_BT_MX01 is not set -# CONFIG_PKG_USING_RGPOWER is not set -# CONFIG_PKG_USING_SPI_TOOLS is not set -# end of peripheral libraries and drivers - -# -# AI packages -# -# CONFIG_PKG_USING_LIBANN is not set -# CONFIG_PKG_USING_NNOM is not set -# CONFIG_PKG_USING_ONNX_BACKEND is not set -# CONFIG_PKG_USING_ONNX_PARSER is not set -# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set -# CONFIG_PKG_USING_ELAPACK is not set -# CONFIG_PKG_USING_ULAPACK is not set -# CONFIG_PKG_USING_QUEST is not set -# CONFIG_PKG_USING_NAXOS is not set -# CONFIG_PKG_USING_R_TINYMAIX is not set -# end of AI packages - -# -# Signal Processing and Control Algorithm Packages -# -# CONFIG_PKG_USING_FIRE_PID_CURVE is not set -# CONFIG_PKG_USING_QPID is not set -# CONFIG_PKG_USING_UKAL is not set -# CONFIG_PKG_USING_DIGITALCTRL is not set -# CONFIG_PKG_USING_KISSFFT is not set -# end of Signal Processing and Control Algorithm Packages - -# -# miscellaneous packages -# - -# -# project laboratory -# -# end of project laboratory - -# -# samples: kernel and components samples -# -# CONFIG_PKG_USING_KERNEL_SAMPLES is not set -# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set -# CONFIG_PKG_USING_NETWORK_SAMPLES is not set -# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set -# end of samples: kernel and components samples - -# -# entertainment: terminal games and other interesting software packages -# -# CONFIG_PKG_USING_CMATRIX is not set -# CONFIG_PKG_USING_SL is not set -# CONFIG_PKG_USING_CAL is not set -# CONFIG_PKG_USING_ACLOCK is not set -# CONFIG_PKG_USING_THREES is not set -# CONFIG_PKG_USING_2048 is not set -# CONFIG_PKG_USING_SNAKE is not set -# CONFIG_PKG_USING_TETRIS is not set -# CONFIG_PKG_USING_DONUT is not set -# CONFIG_PKG_USING_COWSAY is not set -# CONFIG_PKG_USING_MORSE is not set -# end of entertainment: terminal games and other interesting software packages - -# CONFIG_PKG_USING_LIBCSV is not set -# CONFIG_PKG_USING_OPTPARSE is not set -# CONFIG_PKG_USING_FASTLZ is not set -# CONFIG_PKG_USING_MINILZO is not set -# CONFIG_PKG_USING_QUICKLZ is not set -# CONFIG_PKG_USING_LZMA is not set -# CONFIG_PKG_USING_RALARAM is not set -# CONFIG_PKG_USING_MULTIBUTTON is not set -# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set -# CONFIG_PKG_USING_CANFESTIVAL is not set -# CONFIG_PKG_USING_ZLIB is not set -# CONFIG_PKG_USING_MINIZIP is not set -# CONFIG_PKG_USING_HEATSHRINK is not set -# CONFIG_PKG_USING_DSTR is not set -# CONFIG_PKG_USING_TINYFRAME is not set -# CONFIG_PKG_USING_KENDRYTE_DEMO is not set -# CONFIG_PKG_USING_UPACKER is not set -# CONFIG_PKG_USING_UPARAM is not set -# CONFIG_PKG_USING_HELLO is not set -# CONFIG_PKG_USING_VI is not set -# CONFIG_PKG_USING_KI is not set -# CONFIG_PKG_USING_ARMv7M_DWT is not set -# CONFIG_PKG_USING_CRCLIB is not set -# CONFIG_PKG_USING_LWGPS is not set -# CONFIG_PKG_USING_STATE_MACHINE is not set -# CONFIG_PKG_USING_DESIGN_PATTERN is not set -# CONFIG_PKG_USING_CONTROLLER is not set -# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set -# CONFIG_PKG_USING_MFBD is not set -# CONFIG_PKG_USING_SLCAN2RTT is not set -# CONFIG_PKG_USING_SOEM is not set -# CONFIG_PKG_USING_QPARAM is not set -# CONFIG_PKG_USING_CorevMCU_CLI is not set -# end of miscellaneous packages - -# -# Arduino libraries -# -# CONFIG_PKG_USING_RTDUINO is not set - -# -# Projects and Demos -# -# CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set -# CONFIG_PKG_USING_ARDUINO_SKETCH_LOADER_DEMO is not set -# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set -# CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set -# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set -# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set -# end of Projects and Demos - -# -# Sensors -# -# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31855 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MSA301 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_ITG3200 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_MP503 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set -# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set -# CONFIG_PKG_USING_ARDUINO_JARZEBSKI_MPU6050 is not set -# end of Sensors - -# -# Display -# -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_GFX_LIBRARY is not set -# CONFIG_PKG_USING_ARDUINO_U8G2 is not set -# CONFIG_PKG_USING_ARDUINO_TFT_ESPI is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ST7735 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set -# CONFIG_PKG_USING_SEEED_TM1637 is not set -# end of Display - -# -# Timing -# -# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set -# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set -# CONFIG_PKG_USING_ARDUINO_TICKER is not set -# CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set -# end of Timing - -# -# Data Processing -# -# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set -# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set -# CONFIG_PKG_USING_ARDUINO_TENSORFLOW_LITE_MICRO is not set -# CONFIG_PKG_USING_ARDUINO_RUNNINGMEDIAN is not set -# end of Data Processing - -# -# Data Storage -# - -# -# Communication -# -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set -# end of Communication - -# -# Device Control -# -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TPA2016 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DRV2605 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set -# end of Device Control - -# -# Other -# -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set -# end of Other - -# -# Signal IO -# -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set -# end of Signal IO - -# -# Uncategorized -# -# end of Arduino libraries -# end of RT-Thread online packages - -# -# Hardware Drivers -# -# CONFIG_DRV_DEBUG is not set - -# -# On-chip Peripheral Drivers -# -CONFIG_BSP_USING_DRIVERS_EXAMPLE=y -CONFIG_BSP_USING_DRIVERS_AUTO_TEST=y -CONFIG_BSP_USING_IOPAD=y -CONFIG_BSP_USING_UART_LAYER=y -CONFIG_BSP_USING_UART=y -# CONFIG_BSP_USING_UART_MSG is not set -# CONFIG_RT_USING_UART0 is not set -CONFIG_RT_USING_UART1=y -# CONFIG_RT_USING_UART2 is not set -# CONFIG_RT_USING_UART3 is not set -# CONFIG_BSP_USING_SPI_LAYER is not set -# CONFIG_BSP_USING_I2C_LAYER is not set -# CONFIG_BSP_USING_CAN is not set -# CONFIG_BSP_USING_GPIO is not set -# CONFIG_BSP_USING_QSPI is not set -# CONFIG_BSP_USING_ETH_LAYER is not set -# CONFIG_BSP_USING_PWM is not set -# CONFIG_BSP_USING_SDIF_LAYER is not set -# CONFIG_BSP_USING_DC is not set -# CONFIG_BSP_USING_I2S is not set -# CONFIG_BSP_USING_DEVICE is not set -# end of On-chip Peripheral Drivers - -# -# Board extended module Drivers -# -# end of Hardware Drivers - -CONFIG_PHYTIUM_ARCH_AARCH32=y - -# -# Standalone Setting -# -CONFIG_TARGET_ARMV8_AARCH32=y -CONFIG_USE_AARCH64_L1_TO_AARCH32=y - -# -# Soc configuration -# -# CONFIG_TARGET_PE2204 is not set -CONFIG_TARGET_PE2202=y -# CONFIG_TARGET_PE2201 is not set -# CONFIG_TARGET_PD1904 is not set -# CONFIG_TARGET_PD2008 is not set -# CONFIG_TARGET_PD2308 is not set -# CONFIG_TARGET_PS2316 is not set -# CONFIG_TARGET_PD2408 is not set -# CONFIG_TARGET_QEMU_VIRT is not set -CONFIG_SOC_NAME="pe220x" -CONFIG_TARGET_TYPE_NAME="pe2202" -CONFIG_SOC_CORE_NUM=2 -CONFIG_F32BIT_MEMORY_ADDRESS=0x80000000 -CONFIG_F32BIT_MEMORY_LENGTH=0x80000000 -CONFIG_F64BIT_MEMORY_ADDRESS=0x2000000000 -CONFIG_F64BIT_MEMORY_LENGTH=0x800000000 -CONFIG_TARGET_PE220X=y -CONFIG_DEFAULT_DEBUG_PRINT_UART1=y -# CONFIG_DEFAULT_DEBUG_PRINT_UART0 is not set -# CONFIG_DEFAULT_DEBUG_PRINT_UART2 is not set -# end of Soc configuration - -# -# Board Configuration -# -CONFIG_E2000D_DEMO_BOARD=y -CONFIG_BOARD_NAME="pe2202_demo" - -# -# IO mux configuration when board start up -# -# CONFIG_USE_SPI_IOPAD is not set -# CONFIG_USE_GPIO_IOPAD is not set -# CONFIG_USE_CAN_IOPAD is not set -# CONFIG_USE_QSPI_IOPAD is not set -# CONFIG_USE_PWM_IOPAD is not set -# CONFIG_USE_MIO_IOPAD is not set -# CONFIG_USE_TACHO_IOPAD is not set -# CONFIG_USE_UART_IOPAD is not set -# CONFIG_USE_THIRD_PARTY_IOPAD is not set -# end of IO mux configuration when board start up - -# CONFIG_CUS_DEMO_BOARD is not set -# end of Board Configuration - -# -# Sdk common configuration -# -CONFIG_ELOG_LINE_BUF_SIZE=0x100 -# CONFIG_LOG_VERBOS is not set -# CONFIG_LOG_DEBUG is not set -# CONFIG_LOG_INFO is not set -# CONFIG_LOG_WARN is not set -CONFIG_LOG_ERROR=y -# CONFIG_LOG_NONE is not set -# CONFIG_LOG_EXTRA_INFO is not set -# CONFIG_LOG_DISPALY_CORE_NUM is not set -# CONFIG_BOOTUP_DEBUG_PRINTS is not set -CONFIG_USE_NS_GTIMER=y -# CONFIG_USE_VIRTUAL_GTIMER is not set -CONFIG_USE_DEFAULT_INTERRUPT_CONFIG=y -CONFIG_INTERRUPT_ROLE_MASTER=y -# CONFIG_INTERRUPT_ROLE_SLAVE is not set -# CONFIG_INTERRUPT_ROLE_NONE is not set -# end of Sdk common configuration -# end of Standalone Setting diff --git a/bsp/phytium/aarch32/applications/main.c b/bsp/phytium/aarch32/applications/main.c index 408c2a6717..5fc7680b83 100644 --- a/bsp/phytium/aarch32/applications/main.c +++ b/bsp/phytium/aarch32/applications/main.c @@ -89,7 +89,7 @@ void demo_core(void) int main(void) { -#ifdef BSP_USING_DRIVERS_EXAMPLE +#ifdef BSP_USING_DRIVERS_AUTO_TEST auto_test(); #elif defined RT_USING_SMP demo_core(); diff --git a/bsp/phytium/aarch32/rtconfig.h b/bsp/phytium/aarch32/rtconfig.h index ab88c3b3e2..1a273b06cc 100644 --- a/bsp/phytium/aarch32/rtconfig.h +++ b/bsp/phytium/aarch32/rtconfig.h @@ -62,7 +62,8 @@ /* end of rt_strnlen options */ /* end of klibc options */ #define RT_NAME_MAX 16 -#define RT_CPUS_NR 1 +#define RT_USING_SMP +#define RT_CPUS_NR 2 #define RT_ALIGN_SIZE 4 #define RT_THREAD_PRIORITY_32 #define RT_THREAD_PRIORITY_MAX 32 @@ -73,9 +74,12 @@ #define RT_USING_IDLE_HOOK #define RT_IDLE_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 4096 +#define SYSTEM_THREAD_STACK_SIZE 4096 #define RT_USING_TIMER_SOFT #define RT_TIMER_THREAD_PRIO 4 #define RT_TIMER_THREAD_STACK_SIZE 4096 +#define RT_USING_CPU_USAGE_TRACER +#define RT_CPU_USAGE_CALC_INTERVAL_MS 200 /* kservice options */ @@ -84,6 +88,7 @@ #define RT_DEBUGING_ASSERT #define RT_DEBUGING_COLOR #define RT_DEBUGING_CONTEXT +#define RT_DEBUGING_CRITICAL /* Inter-Thread communication */ @@ -106,11 +111,13 @@ #define RT_USING_HEAP /* end of Memory Management */ #define RT_USING_DEVICE +#define RT_USING_DEVICE_OPS #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 256 #define RT_CONSOLE_DEVICE_NAME "uart1" #define RT_USING_CONSOLE_OUTPUT_CTL #define RT_VER_NUM 0x50300 +#define RT_USING_STDC_ATOMIC #define RT_BACKTRACE_LEVEL_MAX_NR 32 /* end of RT-Thread Kernel */ #define RT_USING_CACHE @@ -187,6 +194,7 @@ #define RT_USING_SERIAL_V1 #define RT_SERIAL_USING_DMA #define RT_SERIAL_RB_BUFSZ 1024 +#define RT_USING_SERIAL_BYPASS #define RT_USING_CAN #define RT_CAN_USING_CANFD #define RT_CANMSG_BOX_SZ 16 @@ -454,45 +462,9 @@ /* end of STM32 HAL & SDK Drivers */ -/* Infineon HAL Packages */ - -/* end of Infineon HAL Packages */ - /* Kendryte SDK */ /* end of Kendryte SDK */ - -/* WCH HAL & SDK Drivers */ - -/* end of WCH HAL & SDK Drivers */ - -/* AT32 HAL & SDK Drivers */ - -/* end of AT32 HAL & SDK Drivers */ - -/* HC32 DDL Drivers */ - -/* end of HC32 DDL Drivers */ - -/* NXP HAL & SDK Drivers */ - -/* end of NXP HAL & SDK Drivers */ - -/* NUVOTON Drivers */ - -/* end of NUVOTON Drivers */ - -/* GD32 Drivers */ - -/* end of GD32 Drivers */ - -/* HPMicro SDK */ - -/* end of HPMicro SDK */ - -/* FT32 HAL & SDK Drivers */ - -/* end of FT32 HAL & SDK Drivers */ /* end of HAL & SDK Drivers */ /* sensors drivers */ @@ -624,7 +596,7 @@ #define ELOG_LINE_BUF_SIZE 0x100 #define LOG_ERROR -#define USE_NS_GTIMER +#define USE_PHYSICAL_GTIMER #define USE_DEFAULT_INTERRUPT_CONFIG #define INTERRUPT_ROLE_MASTER /* end of Sdk common configuration */ diff --git a/bsp/phytium/aarch32/rtconfig.h.origin b/bsp/phytium/aarch32/rtconfig.h.origin deleted file mode 100644 index 764055c826..0000000000 --- a/bsp/phytium/aarch32/rtconfig.h.origin +++ /dev/null @@ -1,587 +0,0 @@ -#ifndef RT_CONFIG_H__ -#define RT_CONFIG_H__ - -/* RT-Thread Kernel */ - -/* klibc options */ - -/* rt_vsnprintf options */ - -/* end of rt_vsnprintf options */ - -/* rt_vsscanf options */ - -/* end of rt_vsscanf options */ - -/* rt_memset options */ - -/* end of rt_memset options */ - -/* rt_memcpy options */ - -/* end of rt_memcpy options */ - -/* rt_memmove options */ - -/* end of rt_memmove options */ - -/* rt_memcmp options */ - -/* end of rt_memcmp options */ - -/* rt_strstr options */ - -/* end of rt_strstr options */ - -/* rt_strcasecmp options */ - -/* end of rt_strcasecmp options */ - -/* rt_strncpy options */ - -/* end of rt_strncpy options */ - -/* rt_strcpy options */ - -/* end of rt_strcpy options */ - -/* rt_strncmp options */ - -/* end of rt_strncmp options */ - -/* rt_strcmp options */ - -/* end of rt_strcmp options */ - -/* rt_strlen options */ - -/* end of rt_strlen options */ - -/* rt_strnlen options */ - -/* end of rt_strnlen options */ -/* end of klibc options */ -#define RT_NAME_MAX 16 -#define RT_CPUS_NR 1 -#define RT_ALIGN_SIZE 4 -#define RT_THREAD_PRIORITY_32 -#define RT_THREAD_PRIORITY_MAX 32 -#define RT_TICK_PER_SECOND 1000 -#define RT_USING_OVERFLOW_CHECK -#define RT_USING_HOOK -#define RT_HOOK_USING_FUNC_PTR -#define RT_USING_IDLE_HOOK -#define RT_IDLE_HOOK_LIST_SIZE 4 -#define IDLE_THREAD_STACK_SIZE 4096 -#define RT_USING_TIMER_SOFT -#define RT_TIMER_THREAD_PRIO 4 -#define RT_TIMER_THREAD_STACK_SIZE 4096 - -/* kservice options */ - -/* end of kservice options */ -#define RT_USING_DEBUG -#define RT_DEBUGING_ASSERT -#define RT_DEBUGING_COLOR -#define RT_DEBUGING_CONTEXT - -/* Inter-Thread communication */ - -#define RT_USING_SEMAPHORE -#define RT_USING_MUTEX -#define RT_USING_EVENT -#define RT_USING_MAILBOX -#define RT_USING_MESSAGEQUEUE -#define RT_USING_MESSAGEQUEUE_PRIORITY -/* end of Inter-Thread communication */ - -/* Memory Management */ - -#define RT_USING_MEMPOOL -#define RT_USING_SLAB -#define RT_USING_MEMHEAP -#define RT_MEMHEAP_FAST_MODE -#define RT_USING_SLAB_AS_HEAP -#define RT_USING_HEAP_ISR -#define RT_USING_HEAP -/* end of Memory Management */ -#define RT_USING_DEVICE -#define RT_USING_CONSOLE -#define RT_CONSOLEBUF_SIZE 256 -#define RT_CONSOLE_DEVICE_NAME "uart1" -#define RT_VER_NUM 0x50201 -#define RT_BACKTRACE_LEVEL_MAX_NR 32 -/* end of RT-Thread Kernel */ -#define RT_USING_CACHE -#define RT_USING_HW_ATOMIC -#define RT_USING_CPU_FFS -#define ARCH_MM_MMU -#define ARCH_ARM -#define ARCH_ARM_MMU -#define ARCH_ARM_CORTEX_A -#define RT_USING_GIC_V3 - -/* RT-Thread Components */ - -#define RT_USING_COMPONENTS_INIT -#define RT_USING_USER_MAIN -#define RT_MAIN_THREAD_STACK_SIZE 8192 -#define RT_MAIN_THREAD_PRIORITY 10 -#define RT_USING_MSH -#define RT_USING_FINSH -#define FINSH_USING_MSH -#define FINSH_THREAD_NAME "tshell" -#define FINSH_THREAD_PRIORITY 20 -#define FINSH_THREAD_STACK_SIZE 4096 -#define FINSH_USING_HISTORY -#define FINSH_HISTORY_LINES 5 -#define FINSH_USING_SYMTAB -#define FINSH_CMD_SIZE 80 -#define MSH_USING_BUILT_IN_COMMANDS -#define FINSH_USING_DESCRIPTION -#define FINSH_ARG_MAX 10 -#define FINSH_USING_OPTION_COMPLETION - -/* DFS: device virtual file system */ - -#define RT_USING_DFS -#define DFS_USING_POSIX -#define DFS_USING_WORKDIR -#define DFS_FD_MAX 16 -#define RT_USING_DFS_V1 -#define DFS_FILESYSTEMS_MAX 4 -#define DFS_FILESYSTEM_TYPES_MAX 4 -#define RT_USING_DFS_ELMFAT - -/* elm-chan's FatFs, Generic FAT Filesystem Module */ - -#define RT_DFS_ELM_CODE_PAGE 437 -#define RT_DFS_ELM_WORD_ACCESS -#define RT_DFS_ELM_USE_LFN_3 -#define RT_DFS_ELM_USE_LFN 3 -#define RT_DFS_ELM_LFN_UNICODE_0 -#define RT_DFS_ELM_LFN_UNICODE 0 -#define RT_DFS_ELM_MAX_LFN 255 -#define RT_DFS_ELM_DRIVES 2 -#define RT_DFS_ELM_MAX_SECTOR_SIZE 512 -#define RT_DFS_ELM_REENTRANT -#define RT_DFS_ELM_MUTEX_TIMEOUT 3000 -/* end of elm-chan's FatFs, Generic FAT Filesystem Module */ -#define RT_USING_DFS_DEVFS -#define RT_USING_DFS_RAMFS -#define RT_USING_DFS_MQUEUE -/* end of DFS: device virtual file system */ - -/* Device Drivers */ - -#define RT_USING_DEV_BUS -#define RT_USING_DEVICE_IPC -#define RT_UNAMED_PIPE_NUMBER 64 -#define RT_USING_SYSTEM_WORKQUEUE -#define RT_SYSTEM_WORKQUEUE_STACKSIZE 4096 -#define RT_SYSTEM_WORKQUEUE_PRIORITY 23 -#define RT_USING_SERIAL -#define RT_USING_SERIAL_V1 -#define RT_SERIAL_USING_DMA -#define RT_SERIAL_RB_BUFSZ 1024 -#define RT_USING_CAN -#define RT_CAN_USING_CANFD -#define RT_USING_I2C -#define RT_USING_I2C_BITOPS -#define RT_USING_NULL -#define RT_USING_ZERO -#define RT_USING_RANDOM -#define RT_USING_PWM -#define RT_USING_RTC -#define RT_USING_SDIO -#define RT_SDIO_STACK_SIZE 4096 -#define RT_SDIO_THREAD_PRIORITY 15 -#define RT_MMCSD_STACK_SIZE 4096 -#define RT_MMCSD_THREAD_PRIORITY 22 -#define RT_MMCSD_MAX_PARTITION 16 -#define RT_USING_SPI -#define RT_USING_QSPI -#define RT_USING_AUDIO -#define RT_AUDIO_REPLAY_MP_BLOCK_SIZE 4096 -#define RT_AUDIO_REPLAY_MP_BLOCK_COUNT 2 -#define RT_AUDIO_RECORD_PIPE_SIZE 2048 -#define RT_USING_BLK - -/* Partition Types */ - -#define RT_BLK_PARTITION_DFS -#define RT_BLK_PARTITION_EFI -/* end of Partition Types */ -#define RT_USING_PIN -#define RT_USING_KTIME -/* end of Device Drivers */ - -/* C/C++ and POSIX layer */ - -/* ISO-ANSI C layer */ - -/* Timezone and Daylight Saving Time */ - -#define RT_LIBC_USING_LIGHT_TZ_DST -#define RT_LIBC_TZ_DEFAULT_HOUR 8 -#define RT_LIBC_TZ_DEFAULT_MIN 0 -#define RT_LIBC_TZ_DEFAULT_SEC 0 -/* end of Timezone and Daylight Saving Time */ -/* end of ISO-ANSI C layer */ - -/* POSIX (Portable Operating System Interface) layer */ - -#define RT_USING_POSIX_FS -#define RT_USING_POSIX_DEVIO -#define RT_USING_POSIX_STDIO -#define RT_USING_POSIX_POLL -#define RT_USING_POSIX_SELECT -#define RT_USING_POSIX_TERMIOS -#define RT_USING_POSIX_AIO -#define RT_USING_POSIX_DELAY -#define RT_USING_POSIX_CLOCK -#define RT_USING_POSIX_TIMER - -/* Interprocess Communication (IPC) */ - -#define RT_USING_POSIX_PIPE -#define RT_USING_POSIX_PIPE_SIZE 512 -#define RT_USING_POSIX_MESSAGE_QUEUE -#define RT_USING_POSIX_MESSAGE_SEMAPHORE - -/* Socket is in the 'Network' category */ - -/* end of Interprocess Communication (IPC) */ -/* end of POSIX (Portable Operating System Interface) layer */ -/* end of C/C++ and POSIX layer */ - -/* Network */ - -#define RT_USING_SAL -#define SAL_INTERNET_CHECK - -/* Docking with protocol stacks */ - -#define SAL_USING_LWIP -/* end of Docking with protocol stacks */ -#define SAL_USING_POSIX -#define RT_USING_NETDEV -#define NETDEV_USING_IFCONFIG -#define NETDEV_USING_PING -#define NETDEV_USING_NETSTAT -#define NETDEV_USING_AUTO_DEFAULT -#define NETDEV_IPV4 1 -#define NETDEV_IPV6 0 -#define RT_USING_LWIP -#define RT_USING_LWIP212 -#define RT_USING_LWIP_VER_NUM 0x20102 -#define RT_LWIP_MEM_ALIGNMENT 64 -#define RT_LWIP_IGMP -#define RT_LWIP_ICMP -#define RT_LWIP_DNS - -/* Static IPv4 Address */ - -#define RT_LWIP_IPADDR "192.168.4.10" -#define RT_LWIP_GWADDR "192.168.4.1" -#define RT_LWIP_MSKADDR "255.255.255.0" -/* end of Static IPv4 Address */ -#define RT_LWIP_UDP -#define RT_LWIP_TCP -#define RT_LWIP_RAW -#define RT_MEMP_NUM_NETCONN 8 -#define RT_LWIP_PBUF_NUM 512 -#define RT_LWIP_RAW_PCB_NUM 4 -#define RT_LWIP_UDP_PCB_NUM 4 -#define RT_LWIP_TCP_PCB_NUM 4 -#define RT_LWIP_TCP_SEG_NUM 40 -#define RT_LWIP_TCP_SND_BUF 8196 -#define RT_LWIP_TCP_WND 8196 -#define RT_LWIP_TCPTHREAD_PRIORITY 16 -#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8 -#define RT_LWIP_TCPTHREAD_STACKSIZE 16184 -#define RT_LWIP_ETHTHREAD_PRIORITY 12 -#define RT_LWIP_ETHTHREAD_STACKSIZE 8192 -#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8 -#define RT_LWIP_REASSEMBLY_FRAG -#define LWIP_NETIF_STATUS_CALLBACK 1 -#define LWIP_NETIF_LINK_CALLBACK 1 -#define RT_LWIP_NETIF_NAMESIZE 6 -#define SO_REUSE 1 -#define LWIP_SO_RCVTIMEO 1 -#define LWIP_SO_SNDTIMEO 1 -#define LWIP_SO_RCVBUF 1 -#define LWIP_SO_LINGER 0 -#define LWIP_NETIF_LOOPBACK 0 -#define RT_LWIP_USING_PING -/* end of Network */ - -/* Memory protection */ - -/* end of Memory protection */ - -/* Utilities */ - -#define RT_USING_RYM -#define YMODEM_USING_FILE_TRANSFER -#define RT_USING_UTEST -#define UTEST_THR_STACK_SIZE 4096 -#define UTEST_THR_PRIORITY 20 -#define RT_USING_RESOURCE_ID -#define RT_USING_ADT -#define RT_USING_ADT_AVL -#define RT_USING_ADT_BITMAP -#define RT_USING_ADT_HASHMAP -#define RT_USING_ADT_REF -/* end of Utilities */ - -/* Memory management */ - -#define RT_PAGE_AFFINITY_BLOCK_SIZE 0x1000 -#define RT_PAGE_MAX_ORDER 11 - -/* Debugging */ - -/* end of Debugging */ -/* end of Memory management */ - -/* Using USB legacy version */ - -/* end of Using USB legacy version */ -/* end of RT-Thread Components */ - -/* RT-Thread Utestcases */ - -/* end of RT-Thread Utestcases */ - -/* RT-Thread online packages */ - -/* IoT - internet of things */ - - -/* Wi-Fi */ - -/* Marvell WiFi */ - -/* end of Marvell WiFi */ - -/* Wiced WiFi */ - -/* end of Wiced WiFi */ - -/* CYW43012 WiFi */ - -/* end of CYW43012 WiFi */ - -/* BL808 WiFi */ - -/* end of BL808 WiFi */ - -/* CYW43439 WiFi */ - -/* end of CYW43439 WiFi */ -/* end of Wi-Fi */ - -/* IoT Cloud */ - -/* end of IoT Cloud */ -/* end of IoT - internet of things */ - -/* security packages */ - -/* end of security packages */ - -/* language packages */ - -/* JSON: JavaScript Object Notation, a lightweight data-interchange format */ - -/* end of JSON: JavaScript Object Notation, a lightweight data-interchange format */ - -/* XML: Extensible Markup Language */ - -/* end of XML: Extensible Markup Language */ -/* end of language packages */ - -/* multimedia packages */ - -/* LVGL: powerful and easy-to-use embedded GUI library */ - -/* end of LVGL: powerful and easy-to-use embedded GUI library */ - -/* u8g2: a monochrome graphic library */ - -/* end of u8g2: a monochrome graphic library */ -/* end of multimedia packages */ - -/* tools packages */ - -/* end of tools packages */ - -/* system packages */ - -/* enhanced kernel services */ - -/* end of enhanced kernel services */ - -/* acceleration: Assembly language or algorithmic acceleration packages */ - -/* end of acceleration: Assembly language or algorithmic acceleration packages */ - -/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ - -/* end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ - -/* Micrium: Micrium software products porting for RT-Thread */ - -/* end of Micrium: Micrium software products porting for RT-Thread */ -/* end of system packages */ - -/* peripheral libraries and drivers */ - -/* HAL & SDK Drivers */ - -/* STM32 HAL & SDK Drivers */ - -/* end of STM32 HAL & SDK Drivers */ - -/* Kendryte SDK */ - -/* end of Kendryte SDK */ -/* end of HAL & SDK Drivers */ - -/* sensors drivers */ - -/* end of sensors drivers */ - -/* touch drivers */ - -/* end of touch drivers */ -/* end of peripheral libraries and drivers */ - -/* AI packages */ - -/* end of AI packages */ - -/* Signal Processing and Control Algorithm Packages */ - -/* end of Signal Processing and Control Algorithm Packages */ - -/* miscellaneous packages */ - -/* project laboratory */ - -/* end of project laboratory */ - -/* samples: kernel and components samples */ - -/* end of samples: kernel and components samples */ - -/* entertainment: terminal games and other interesting software packages */ - -/* end of entertainment: terminal games and other interesting software packages */ -/* end of miscellaneous packages */ - -/* Arduino libraries */ - - -/* Projects and Demos */ - -/* end of Projects and Demos */ - -/* Sensors */ - -/* end of Sensors */ - -/* Display */ - -/* end of Display */ - -/* Timing */ - -/* end of Timing */ - -/* Data Processing */ - -/* end of Data Processing */ - -/* Data Storage */ - -/* Communication */ - -/* end of Communication */ - -/* Device Control */ - -/* end of Device Control */ - -/* Other */ - -/* end of Other */ - -/* Signal IO */ - -/* end of Signal IO */ - -/* Uncategorized */ - -/* end of Arduino libraries */ -/* end of RT-Thread online packages */ - -/* Hardware Drivers */ - - -/* On-chip Peripheral Drivers */ - -#define BSP_USING_DRIVERS_EXAMPLE -#define BSP_USING_DRIVERS_AUTO_TEST -#define BSP_USING_IOPAD -#define BSP_USING_UART_LAYER -#define BSP_USING_UART -#define RT_USING_UART1 -/* end of On-chip Peripheral Drivers */ - -/* Board extended module Drivers */ - -/* end of Hardware Drivers */ -#define PHYTIUM_ARCH_AARCH32 - -/* Standalone Setting */ - -#define TARGET_ARMV8_AARCH32 -#define USE_AARCH64_L1_TO_AARCH32 - -/* Soc configuration */ - -#define TARGET_PE2202 -#define SOC_NAME "pe220x" -#define TARGET_TYPE_NAME "pe2202" -#define SOC_CORE_NUM 2 -#define F32BIT_MEMORY_ADDRESS 0x80000000 -#define F32BIT_MEMORY_LENGTH 0x80000000 -#define F64BIT_MEMORY_ADDRESS 0x2000000000 -#define F64BIT_MEMORY_LENGTH 0x800000000 -#define TARGET_PE220X -#define DEFAULT_DEBUG_PRINT_UART1 -/* end of Soc configuration */ - -/* Board Configuration */ - -#define E2000D_DEMO_BOARD -#define BOARD_NAME "pe2202_demo" - -/* IO mux configuration when board start up */ - -/* end of IO mux configuration when board start up */ -/* end of Board Configuration */ - -/* Sdk common configuration */ - -#define ELOG_LINE_BUF_SIZE 0x100 -#define LOG_ERROR -#define USE_NS_GTIMER -#define USE_DEFAULT_INTERRUPT_CONFIG -#define INTERRUPT_ROLE_MASTER -/* end of Sdk common configuration */ -/* end of Standalone Setting */ - -#endif diff --git a/bsp/phytium/aarch64/.ci/attachconfig/ci.attachconfig.yml b/bsp/phytium/aarch64/.ci/attachconfig/ci.attachconfig.yml index 404988283b..ed3c33cd80 100644 --- a/bsp/phytium/aarch64/.ci/attachconfig/ci.attachconfig.yml +++ b/bsp/phytium/aarch64/.ci/attachconfig/ci.attachconfig.yml @@ -28,6 +28,8 @@ board.pd2408_test_b_rtthread: - devices.uart - devices.qspi - devices.i2c_msg + - devices.i2s_msg + - devices.es8336 - devices.spi_msg - devices.xmac_msg - devices.pwm @@ -40,6 +42,7 @@ board.pd2408_test_b_rtthread: - CONFIG_RT_USING_UART1=y - CONFIG_RT_USING_QSPI0=y - CONFIG_USING_QSPI_CHANNEL0=y + - CONFIG_RT_USING_I2S0_MSG=y - CONFIG_RT_USING_I2C3_MSG=y - CONFIG_RT_USING_SPIM0_MSG=y - CONFIG_RT_USING_XMAC0_MSG=y @@ -55,12 +58,12 @@ board.e2000d_demo_rtthread: - devices.can - devices.gpio - devices.i2s + - devices.es8336 - devices.pwm - devices.spi - devices.qspi - devices.xmac - devices.sdif - - devices.dc - devices.devices_auto_test kconfig: - CONFIG_TARGET_PE2202=y @@ -83,8 +86,6 @@ board.e2000d_demo_rtthread: - CONFIG_USE_SDIF0_EMMC=y - CONFIG_RT_SDIO_STACK_SIZE=4096 - CONFIG_RT_MMCSD_STACK_SIZE=4096 - - CONFIG_RT_USING_DC_CHANNEL0=y - - CONFIG_RT_USING_DC_CHANNEL1=y - CONFIG_BSP_USING_ES8336=y - CONFIG_I2C_USE_MIO=y @@ -95,12 +96,12 @@ board.e2000q_demo_rtthread: - devices.can - devices.gpio - devices.i2s + - devices.es8336 - devices.pwm - devices.spi - devices.qspi - devices.xmac - devices.sdif - - devices.dc - devices.devices_auto_test kconfig: - CONFIG_TARGET_PE2204=y @@ -123,8 +124,6 @@ board.e2000q_demo_rtthread: - CONFIG_USE_SDIF0_EMMC=y - CONFIG_RT_SDIO_STACK_SIZE=4096 - CONFIG_RT_MMCSD_STACK_SIZE=4096 - - CONFIG_RT_USING_DC_CHANNEL0=y - - CONFIG_RT_USING_DC_CHANNEL1=y - CONFIG_BSP_USING_ES8336=y - CONFIG_I2C_USE_MIO=y @@ -138,7 +137,6 @@ board.phytium_pi_rtthread: - devices.qspi - devices.xmac - devices.sdif - - devices.dc kconfig: - CONFIG_TARGET_PE2204=y - CONFIG_PHYTIUMPI_FIREFLY_BOARD=y @@ -154,7 +152,6 @@ board.phytium_pi_rtthread: - CONFIG_USING_SDIF1=y - CONFIG_USE_SDIF1_TF=y - CONFIG_RT_SDIO_STACK_SIZE=4096 - - CONFIG_RT_USING_DC_CHANNEL0=y - CONFIG_I2C_USE_MIO=y board.e2000d_demo_rtthread_pusb2_dc: @@ -234,7 +231,16 @@ devices.gpio: - CONFIG_BSP_USING_GPIO=y devices.i2s: kconfig: + - CONFIG_BSP_USING_I2S_LAYER=y - CONFIG_BSP_USING_I2S=y +devices.i2s_msg: + kconfig: + - CONFIG_BSP_USING_I2S_LAYER=y + - CONFIG_BSP_USING_I2S_MSG=y +devices.es8336: + kconfig: + - CONFIG_BSP_USING_DEVICE=y + - CONFIG_BSP_USING_ES8336=y devices.pwm: kconfig: - CONFIG_BSP_USING_PWM=y @@ -249,10 +255,22 @@ devices.uart_msg: - CONFIG_BSP_USING_UART_MSG=y devices.xmac: kconfig: + - CONFIG_BSP_USING_ETH_LAYER=y - CONFIG_BSP_USING_ETH=y + - CONFIG_RT_USING_SAL=y + - CONFIG_RT_USING_LWIP=y + - CONFIG_RT_USING_LWIP212=y + - CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=8192 + - CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=8192 devices.xmac_msg: kconfig: + - CONFIG_BSP_USING_ETH_LAYER=y - CONFIG_BSP_USING_ETH_MSG=y + - CONFIG_RT_USING_SAL=y + - CONFIG_RT_USING_LWIP=y + - CONFIG_RT_USING_LWIP212=y + - CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=8192 + - CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=8192 devices.sdif: kconfig: - CONFIG_BSP_USING_SDIF=y diff --git a/bsp/phytium/aarch64/.config b/bsp/phytium/aarch64/.config index 5a64aa2d99..a6a41bb0b3 100644 --- a/bsp/phytium/aarch64/.config +++ b/bsp/phytium/aarch64/.config @@ -116,7 +116,7 @@ CONFIG_RT_KLIBC_USING_VSNPRINTF_LOG10_TAYLOR_TERMS=4 # end of rt_strnlen options # end of klibc options -CONFIG_RT_NAME_MAX=16 +CONFIG_RT_NAME_MAX=32 # CONFIG_RT_USING_ARCH_DATA_TYPE is not set # CONFIG_RT_USING_NANO is not set # CONFIG_RT_USING_SMART is not set @@ -299,7 +299,6 @@ CONFIG_RT_USING_DFS_DEVFS=y CONFIG_RT_USING_DFS_RAMFS=y # CONFIG_RT_USING_DFS_TMPFS is not set # CONFIG_RT_USING_DFS_MQUEUE is not set -# CONFIG_RT_USING_DFS_NFS is not set # end of DFS: device virtual file system # CONFIG_RT_USING_FAL is not set @@ -341,7 +340,7 @@ CONFIG_RT_USING_I2C_BITOPS=y CONFIG_RT_USING_NULL=y CONFIG_RT_USING_ZERO=y CONFIG_RT_USING_RANDOM=y -CONFIG_RT_USING_PWM=y +# CONFIG_RT_USING_PWM is not set # CONFIG_RT_USING_PULSE_ENCODER is not set # CONFIG_RT_USING_INPUT_CAPTURE is not set # CONFIG_RT_USING_MTD_NOR is not set @@ -364,12 +363,13 @@ CONFIG_RT_USING_QSPI=y CONFIG_RT_USING_AUDIO=y CONFIG_RT_AUDIO_REPLAY_MP_BLOCK_SIZE=4096 CONFIG_RT_AUDIO_REPLAY_MP_BLOCK_COUNT=2 -CONFIG_RT_AUDIO_RECORD_PIPE_SIZE=2048 +CONFIG_RT_AUDIO_RECORD_PIPE_SIZE=4096 # CONFIG_RT_USING_SENSOR is not set # CONFIG_RT_USING_TOUCH is not set # CONFIG_RT_USING_LCD is not set # CONFIG_RT_USING_HWCRYPTO is not set # CONFIG_RT_USING_WIFI is not set +# CONFIG_RT_USING_RPMSG is not set CONFIG_RT_USING_BLK=y # @@ -444,88 +444,9 @@ CONFIG_RT_USING_POSIX_TIMER=y # # Network # -CONFIG_RT_USING_SAL=y -CONFIG_SAL_INTERNET_CHECK=y -CONFIG_SOCKET_TABLE_STEP_LEN=4 - -# -# Docking with protocol stacks -# -CONFIG_SAL_USING_LWIP=y -# CONFIG_SAL_USING_AT is not set -# CONFIG_SAL_USING_TLS is not set -# end of Docking with protocol stacks - -CONFIG_SAL_USING_POSIX=y -CONFIG_RT_USING_NETDEV=y -CONFIG_NETDEV_USING_IFCONFIG=y -CONFIG_NETDEV_USING_PING=y -CONFIG_NETDEV_USING_NETSTAT=y -CONFIG_NETDEV_USING_AUTO_DEFAULT=y -# CONFIG_NETDEV_USING_LINK_STATUS_CALLBACK is not set -# CONFIG_NETDEV_USING_IPV6 is not set -CONFIG_NETDEV_IPV4=1 -CONFIG_NETDEV_IPV6=0 -CONFIG_RT_USING_LWIP=y -# CONFIG_RT_USING_LWIP_LOCAL_VERSION is not set -# CONFIG_RT_USING_LWIP141 is not set -# CONFIG_RT_USING_LWIP203 is not set -CONFIG_RT_USING_LWIP212=y -# CONFIG_RT_USING_LWIP_LATEST is not set -CONFIG_RT_USING_LWIP_VER_NUM=0x20102 -# CONFIG_RT_USING_LWIP_IPV6 is not set -CONFIG_RT_LWIP_MEM_ALIGNMENT=64 -# CONFIG_RT_LWIP_IGMP is not set -CONFIG_RT_LWIP_ICMP=y -# CONFIG_RT_LWIP_SNMP is not set -CONFIG_RT_LWIP_DNS=y -# CONFIG_RT_LWIP_DHCP is not set - -# -# Static IPv4 Address -# -CONFIG_RT_LWIP_IPADDR="192.168.4.10" -CONFIG_RT_LWIP_GWADDR="192.168.4.1" -CONFIG_RT_LWIP_MSKADDR="255.255.255.0" -# end of Static IPv4 Address - -CONFIG_RT_LWIP_UDP=y -CONFIG_RT_LWIP_TCP=y -CONFIG_RT_LWIP_RAW=y -# CONFIG_RT_LWIP_PPP is not set -CONFIG_RT_MEMP_NUM_NETCONN=8 -CONFIG_RT_LWIP_PBUF_NUM=512 -CONFIG_RT_LWIP_RAW_PCB_NUM=4 -CONFIG_RT_LWIP_UDP_PCB_NUM=4 -CONFIG_RT_LWIP_TCP_PCB_NUM=4 -CONFIG_RT_LWIP_TCP_SEG_NUM=40 -CONFIG_RT_LWIP_TCP_SND_BUF=8196 -CONFIG_RT_LWIP_TCP_WND=8196 -CONFIG_RT_LWIP_TCPTHREAD_PRIORITY=12 -CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=256 -CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=16184 -# CONFIG_LWIP_NO_RX_THREAD is not set -# CONFIG_LWIP_NO_TX_THREAD is not set -CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=16 -CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=8192 -CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=256 -CONFIG_RT_LWIP_REASSEMBLY_FRAG=y -CONFIG_LWIP_NETIF_STATUS_CALLBACK=1 -CONFIG_LWIP_NETIF_LINK_CALLBACK=1 -CONFIG_RT_LWIP_NETIF_NAMESIZE=6 -CONFIG_SO_REUSE=1 -CONFIG_LWIP_SO_RCVTIMEO=1 -CONFIG_LWIP_SO_SNDTIMEO=1 -CONFIG_LWIP_SO_RCVBUF=1 -CONFIG_LWIP_SO_LINGER=0 -# CONFIG_RT_LWIP_NETIF_LOOPBACK is not set -CONFIG_LWIP_NETIF_LOOPBACK=0 -# CONFIG_RT_LWIP_STATS is not set -# CONFIG_RT_LWIP_USING_HW_CHECKSUM is not set -CONFIG_RT_LWIP_USING_PING=y -# CONFIG_LWIP_USING_DHCPD is not set -# CONFIG_RT_LWIP_ENABLE_USER_HOOKS is not set -# CONFIG_RT_LWIP_DEBUG is not set +# CONFIG_RT_USING_SAL is not set +# CONFIG_RT_USING_NETDEV is not set +# CONFIG_RT_USING_LWIP is not set # CONFIG_RT_USING_AT is not set # end of Network @@ -608,7 +529,6 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # CONFIG_PKG_USING_FREEMODBUS is not set # CONFIG_PKG_USING_NANOPB is not set # CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set -# CONFIG_PKG_USING_ESP_HOSTED is not set # # Wi-Fi @@ -714,9 +634,6 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set # CONFIG_PKG_USING_LHC_MODBUS is not set # CONFIG_PKG_USING_QMODBUS is not set -# CONFIG_PKG_USING_PNET is not set -# CONFIG_PKG_USING_OPENER is not set -# CONFIG_PKG_USING_FREEMQTT is not set # end of IoT - internet of things # @@ -744,7 +661,6 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_AGILE_JSMN is not set # CONFIG_PKG_USING_PARSON is not set -# CONFIG_PKG_USING_RYAN_JSON is not set # end of JSON: JavaScript Object Notation, a lightweight data-interchange format # @@ -781,7 +697,6 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # CONFIG_PKG_USING_U8G2 is not set # end of u8g2: a monochrome graphic library -# CONFIG_PKG_USING_NES_SIMULATOR is not set # CONFIG_PKG_USING_OPENMV is not set # CONFIG_PKG_USING_MUPDF is not set # CONFIG_PKG_USING_STEMWIN is not set @@ -806,11 +721,7 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # # tools packages # -# CONFIG_PKG_USING_VECTOR is not set -# CONFIG_PKG_USING_SORCH is not set -# CONFIG_PKG_USING_DICT is not set # CONFIG_PKG_USING_CMBACKTRACE is not set -# CONFIG_PKG_USING_MCOREDUMP is not set # CONFIG_PKG_USING_EASYFLASH is not set # CONFIG_PKG_USING_EASYLOGGER is not set # CONFIG_PKG_USING_SYSTEMVIEW is not set @@ -854,12 +765,6 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set # CONFIG_PKG_USING_VOFA_PLUS is not set # CONFIG_PKG_USING_ZDEBUG is not set -# CONFIG_PKG_USING_RVBACKTRACE is not set -# CONFIG_PKG_USING_HPATCHLITE is not set -# CONFIG_PKG_USING_THREAD_METRIC is not set -# CONFIG_PKG_USING_UORB is not set -# CONFIG_PKG_USING_RT_TUNNEL is not set -# CONFIG_PKG_USING_VIRTUAL_TERMINAL is not set # end of tools packages # @@ -871,10 +776,9 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # # CONFIG_PKG_USING_RT_MEMCPY_CM is not set # CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set # end of enhanced kernel services -# CONFIG_PKG_USING_AUNITY is not set - # # acceleration: Assembly language or algorithmic acceleration packages # @@ -888,6 +792,7 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # # CONFIG_PKG_USING_CMSIS_5 is not set # CONFIG_PKG_USING_CMSIS_CORE is not set +# CONFIG_PKG_USING_CMSIS_DSP is not set # CONFIG_PKG_USING_CMSIS_NN is not set # CONFIG_PKG_USING_CMSIS_RTOS1 is not set # CONFIG_PKG_USING_CMSIS_RTOS2 is not set @@ -939,6 +844,7 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # CONFIG_PKG_USING_ARM_2D is not set # CONFIG_PKG_USING_MCUBOOT is not set # CONFIG_PKG_USING_TINYUSB is not set +# CONFIG_PKG_USING_CHERRYUSB is not set # CONFIG_PKG_USING_KMULTI_RTIMER is not set # CONFIG_PKG_USING_TFDB is not set # CONFIG_PKG_USING_QPC is not set @@ -946,17 +852,10 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # CONFIG_PKG_USING_FLASH_BLOB is not set # CONFIG_PKG_USING_MLIBC is not set # CONFIG_PKG_USING_TASK_MSG_BUS is not set -# CONFIG_PKG_USING_UART_FRAMEWORK is not set # CONFIG_PKG_USING_SFDB is not set # CONFIG_PKG_USING_RTP is not set # CONFIG_PKG_USING_REB is not set -# CONFIG_PKG_USING_RMP is not set # CONFIG_PKG_USING_R_RHEALSTONE is not set -# CONFIG_PKG_USING_HEARTBEAT is not set -# CONFIG_PKG_USING_MICRO_ROS_RTTHREAD_PACKAGE is not set -# CONFIG_PKG_USING_CHERRYECAT is not set -# CONFIG_PKG_USING_EVENT_LOOP is not set -# CONFIG_PKG_USING_THREAD_MANAGER is not set # end of system packages # @@ -970,61 +869,12 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # # STM32 HAL & SDK Drivers # -# CONFIG_PKG_USING_STM32F0_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32F0_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32F1_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32F1_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32F2_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32F2_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32F3_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32F3_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32F7_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32F7_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32G0_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32G0_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32G4_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32G4_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32H5_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32H5_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32H7_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32H7_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32H7RS_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32H7RS_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32L0_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32L0_CMSIS_DRIVER is not set # CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set # CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32L5_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32L5_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32U5_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32U5_CMSIS_DRIVER is not set # CONFIG_PKG_USING_STM32WB55_SDK is not set # CONFIG_PKG_USING_STM32_SDIO is not set -# CONFIG_PKG_USING_STM32WL_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32WL_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32WB_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32WB_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_STM32MP1_M4_HAL_DRIVER is not set -# CONFIG_PKG_USING_STM32MP1_M4_CMSIS_DRIVER is not set # end of STM32 HAL & SDK Drivers -# -# Infineon HAL Packages -# -# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set -# CONFIG_PKG_USING_INFINEON_CMSIS is not set -# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set -# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set -# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set -# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set -# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set -# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set -# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set -# CONFIG_PKG_USING_INFINEON_USBDEV is not set -# end of Infineon HAL Packages - # CONFIG_PKG_USING_BLUETRUM_SDK is not set # CONFIG_PKG_USING_EMBARC_BSP is not set # CONFIG_PKG_USING_ESP_IDF is not set @@ -1038,96 +888,7 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # CONFIG_PKG_USING_NRF5X_SDK is not set # CONFIG_PKG_USING_NRFX is not set -# CONFIG_PKG_USING_RASPBERRYPI_PICO_RP2350_SDK is not set # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set -# CONFIG_PKG_USING_MM32 is not set - -# -# WCH HAL & SDK Drivers -# -# CONFIG_PKG_USING_CH32V20x_SDK is not set -# CONFIG_PKG_USING_CH32V307_SDK is not set -# end of WCH HAL & SDK Drivers - -# -# AT32 HAL & SDK Drivers -# -# CONFIG_PKG_USING_AT32A403A_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32A403A_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32A423_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32A423_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F45x_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F45x_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F402_405_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F402_405_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F403A_407_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F403A_407_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F413_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F413_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F415_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F415_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F421_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F421_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F423_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F423_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F425_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F425_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32F435_437_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32F435_437_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_AT32M412_416_HAL_DRIVER is not set -# CONFIG_PKG_USING_AT32M412_416_CMSIS_DRIVER is not set -# end of AT32 HAL & SDK Drivers - -# -# HC32 DDL Drivers -# -# CONFIG_PKG_USING_HC32F3_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_HC32F3_SERIES_DRIVER is not set -# CONFIG_PKG_USING_HC32F4_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_HC32F4_SERIES_DRIVER is not set -# end of HC32 DDL Drivers - -# -# NXP HAL & SDK Drivers -# -# CONFIG_PKG_USING_NXP_MCX_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_NXP_MCX_SERIES_DRIVER is not set -# CONFIG_PKG_USING_NXP_LPC_DRIVER is not set -# CONFIG_PKG_USING_NXP_LPC55S_DRIVER is not set -# CONFIG_PKG_USING_NXP_IMX6SX_DRIVER is not set -# CONFIG_PKG_USING_NXP_IMX6UL_DRIVER is not set -# CONFIG_PKG_USING_NXP_IMXRT_DRIVER is not set -# end of NXP HAL & SDK Drivers - -# -# NUVOTON Drivers -# -# CONFIG_PKG_USING_NUVOTON_SERIES_DRIVER is not set -# end of NUVOTON Drivers - -# -# GD32 Drivers -# -# CONFIG_PKG_USING_GD32_ARM_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_GD32_ARM_SERIES_DRIVER is not set -# CONFIG_PKG_USING_GD32_RISCV_SERIES_DRIVER is not set -# CONFIG_PKG_USING_GD32VW55X_WIFI is not set -# end of GD32 Drivers - -# -# HPMicro SDK -# -# CONFIG_PKG_USING_HPM_SDK is not set -# end of HPMicro SDK - -# -# FT32 HAL & SDK Drivers -# -# CONFIG_PKG_USING_FT32F0_STD_DRIVER is not set -# CONFIG_PKG_USING_FT32F0_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_FT32F4_STD_DRIVER is not set -# CONFIG_PKG_USING_FT32F4_CMSIS_DRIVER is not set -# end of FT32 HAL & SDK Drivers # end of HAL & SDK Drivers # @@ -1165,19 +926,14 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # CONFIG_PKG_USING_BMI088 is not set # CONFIG_PKG_USING_HMC5883 is not set # CONFIG_PKG_USING_MAX6675 is not set -# CONFIG_PKG_USING_MAX31855 is not set # CONFIG_PKG_USING_TMP1075 is not set # CONFIG_PKG_USING_SR04 is not set # CONFIG_PKG_USING_CCS811 is not set # CONFIG_PKG_USING_PMSXX is not set # CONFIG_PKG_USING_RT3020 is not set # CONFIG_PKG_USING_MLX90632 is not set -# CONFIG_PKG_USING_MLX90382 is not set -# CONFIG_PKG_USING_MLX90384 is not set # CONFIG_PKG_USING_MLX90393 is not set # CONFIG_PKG_USING_MLX90392 is not set -# CONFIG_PKG_USING_MLX90394 is not set -# CONFIG_PKG_USING_MLX90396 is not set # CONFIG_PKG_USING_MLX90397 is not set # CONFIG_PKG_USING_MS5611 is not set # CONFIG_PKG_USING_MAX31865 is not set @@ -1203,10 +959,6 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_PAJ7620 is not set # CONFIG_PKG_USING_STHS34PF80 is not set -# CONFIG_PKG_USING_P3T1755 is not set -# CONFIG_PKG_USING_QMI8658 is not set -# CONFIG_PKG_USING_ICM20948 is not set -# CONFIG_PKG_USING_SCD4X is not set # end of sensors drivers # @@ -1224,7 +976,6 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # CONFIG_PKG_USING_CST812T is not set # end of touch drivers -# CONFIG_PKG_USING_LCD_SPI_DRIVER is not set # CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_BUTTON is not set # CONFIG_PKG_USING_PCF8574 is not set @@ -1296,21 +1047,6 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # CONFIG_PKG_USING_SYSTEM_RUN_LED is not set # CONFIG_PKG_USING_BT_MX01 is not set # CONFIG_PKG_USING_RGPOWER is not set -# CONFIG_PKG_USING_BT_MX02 is not set -# CONFIG_PKG_USING_GC9A01 is not set -# CONFIG_PKG_USING_IK485 is not set -# CONFIG_PKG_USING_SERVO is not set -# CONFIG_PKG_USING_SEAN_WS2812B is not set -# CONFIG_PKG_USING_IC74HC165 is not set -# CONFIG_PKG_USING_IST8310 is not set -# CONFIG_PKG_USING_ST7789_SPI is not set -# CONFIG_PKG_USING_CAN_UDS is not set -# CONFIG_PKG_USING_ISOTP_C is not set -# CONFIG_PKG_USING_IKUNLED is not set -# CONFIG_PKG_USING_INS5T8025 is not set -# CONFIG_PKG_USING_IRUART is not set -# CONFIG_PKG_USING_ST7305 is not set -# CONFIG_PKG_USING_TM1668 is not set # CONFIG_PKG_USING_SPI_TOOLS is not set # end of peripheral libraries and drivers @@ -1328,13 +1064,11 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # CONFIG_PKG_USING_NAXOS is not set # CONFIG_PKG_USING_NCNN is not set # CONFIG_PKG_USING_R_TINYMAIX is not set -# CONFIG_PKG_USING_LLMCHAT is not set # end of AI packages # # Signal Processing and Control Algorithm Packages # -# CONFIG_PKG_USING_APID is not set # CONFIG_PKG_USING_FIRE_PID_CURVE is not set # CONFIG_PKG_USING_QPID is not set # CONFIG_PKG_USING_UKAL is not set @@ -1399,7 +1133,6 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # CONFIG_PKG_USING_KI is not set # CONFIG_PKG_USING_ARMv7M_DWT is not set # CONFIG_PKG_USING_CRCLIB is not set -# CONFIG_PKG_USING_LIBCRC is not set # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set # CONFIG_PKG_USING_DESIGN_PATTERN is not set @@ -1410,7 +1143,6 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # CONFIG_PKG_USING_SOEM is not set # CONFIG_PKG_USING_QPARAM is not set # CONFIG_PKG_USING_CorevMCU_CLI is not set -# CONFIG_PKG_USING_DRMP is not set # end of miscellaneous packages # @@ -1424,7 +1156,6 @@ CONFIG_RT_PAGE_MAX_ORDER=16 # CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set # CONFIG_PKG_USING_ARDUINO_SKETCH_LOADER_DEMO is not set # CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set -# CONFIG_PKG_USING_ARDUINO_RTDUINO_SENSORFUSION_SHIELD is not set # CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set # CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set # CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set @@ -1676,7 +1407,7 @@ CONFIG_RT_USING_UART1=y # CONFIG_BSP_USING_PWM is not set # CONFIG_BSP_USING_SDIF_LAYER is not set # CONFIG_BSP_USING_DC is not set -# CONFIG_BSP_USING_I2S is not set +# CONFIG_BSP_USING_I2S_LAYER is not set # CONFIG_BSP_USING_DEVICE is not set # end of On-chip Peripheral Drivers @@ -1685,6 +1416,12 @@ CONFIG_RT_USING_UART1=y # # end of Hardware Drivers +# +# System Example +# +# CONFIG_BSP_USING_SYSTEM_EXAMPLE is not set +# end of System Example + CONFIG_BSP_USING_GIC=y CONFIG_BSP_USING_GICV3=y CONFIG_PHYTIUM_ARCH_AARCH64=y @@ -1748,18 +1485,24 @@ CONFIG_BOARD_NAME="pe2202_demo" # CONFIG_ELOG_LINE_BUF_SIZE=0x100 # CONFIG_LOG_VERBOS is not set -CONFIG_LOG_DEBUG=y -# CONFIG_LOG_INFO is not set +# CONFIG_LOG_DEBUG is not set +CONFIG_LOG_INFO=y # CONFIG_LOG_WARN is not set # CONFIG_LOG_ERROR is not set # CONFIG_LOG_NONE is not set # CONFIG_LOG_EXTRA_INFO is not set # CONFIG_LOG_DISPALY_CORE_NUM is not set # CONFIG_BOOTUP_DEBUG_PRINTS is not set -CONFIG_USE_NS_GTIMER=y +CONFIG_USE_PHYSICAL_GTIMER=y # CONFIG_USE_VIRTUAL_GTIMER is not set # CONFIG_USE_DEFAULT_INTERRUPT_CONFIG is not set # end of Sdk common configuration + +# +# OpenAmp +# +# CONFIG_USE_OPENAMP is not set +# end of OpenAmp # end of Standalone Setting CONFIG_KERNEL_ASPACE_START=0x1000 diff --git a/bsp/phytium/aarch64/Kconfig b/bsp/phytium/aarch64/Kconfig index 5e689d7134..8cc3d051dc 100644 --- a/bsp/phytium/aarch64/Kconfig +++ b/bsp/phytium/aarch64/Kconfig @@ -9,6 +9,7 @@ PKGS_DIR := packages source "$(RTT_DIR)/Kconfig" osource "$PKGS_DIR/Kconfig" source "$(BSP_DIR)/../libraries/drivers/Kconfig" +source "$(BSP_DIR)/../libraries/system_example/Kconfig" config BSP_USING_GIC bool @@ -61,7 +62,7 @@ menu "Standalone Setting" source "$(SDK_DIR)/soc/soc.kconfig" source "$(BSP_DIR)/../board/board.kconfig" source "$(SDK_DIR)/common/common.kconfig" - + source "$(SDK_DIR)/third-party/openamp/ports/Kconfig" endmenu config KERNEL_ASPACE_START diff --git a/bsp/phytium/aarch64/SConstruct b/bsp/phytium/aarch64/SConstruct index c8f335e633..996d4da647 100644 --- a/bsp/phytium/aarch64/SConstruct +++ b/bsp/phytium/aarch64/SConstruct @@ -83,5 +83,25 @@ if not IS_EXPORTED: # if project is not exported, libraries and board need to ma objs.extend(SConscript(os.path.join(BSP_ROOT,'board','SConscript'))) # make a building +# Preprocess linker script +import subprocess +lds_src = os.path.join(os.getcwd(), 'link.lds') +lds_out = os.path.join(os.getcwd(), 'link_preprocessed.lds') +try: + subprocess.run([ + rtconfig.CC, + '-E', '-P', '-x', 'c', + '-I', os.getcwd(), + lds_src, '-o', lds_out + ], check=True, capture_output=True) +except subprocess.CalledProcessError as e: + print(f"Warning: Failed to preprocess linker script: {e.stderr.decode() if e.stderr else str(e)}") + +# Update LFLAGS to use preprocessed linker script +env['LINKFLAGS'] = env['LINKFLAGS'].replace('-T link.lds', '-T link_preprocessed.lds') + +# Clean generated linker script +Clean(TARGET, lds_out) + DoBuilding(TARGET, objs) diff --git a/bsp/phytium/aarch64/applications/main.c b/bsp/phytium/aarch64/applications/main.c index 810f889906..5785485971 100644 --- a/bsp/phytium/aarch64/applications/main.c +++ b/bsp/phytium/aarch64/applications/main.c @@ -19,6 +19,10 @@ #include "auto_test.h" #endif +#if defined(USE_OPENAMP) +#include "openamp_for_linux_sample.h" +#endif + #define ASSERT_STATIC(expression) \ extern int assert_static[(expression) ? 1 : -1] @@ -88,12 +92,15 @@ void demo_core(void) int main(void) { -#ifdef BSP_USING_DRIVERS_EXAMPLE +#ifdef BSP_USING_DRIVERS_AUTO_TEST rt_thread_mdelay(2000); auto_test(); #elif defined RT_USING_SMP demo_core(); #endif +#if defined(USE_OPENAMP) + creat_openamp_thread(); +#endif return RT_EOK; } diff --git a/bsp/phytium/aarch64/link.lds b/bsp/phytium/aarch64/link.lds new file mode 100644 index 0000000000..5709e3fc7e --- /dev/null +++ b/bsp/phytium/aarch64/link.lds @@ -0,0 +1,146 @@ +#include "rtconfig.h" +OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64") +OUTPUT_ARCH(aarch64) +PHDRS +{ + text PT_LOAD FLAGS(5); + data PT_LOAD FLAGS(6); + stack PT_LOAD FLAGS(6); +} +SECTIONS +{ +#ifdef USE_OPENAMP + _text_offset = 0x0; + . = 0xb0100000 + _text_offset; +#else + _text_offset = 0x80000; + . = 0x80000000 + _text_offset; +#endif + .text : + { + PROVIDE(__text_start = .); + KEEP(*(.text.entrypoint)) + *(.vectors) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + . = ALIGN(8); + PROVIDE(__rt_utest_tc_tab_start = .); + KEEP(*(UtestTcTab)) + PROVIDE(__rt_utest_tc_tab_end = .); + . = ALIGN(8); + PROVIDE(__fsymtab_start = .); + KEEP(*(FSymTab)) + PROVIDE(__fsymtab_end = .); + . = ALIGN(8); + PROVIDE(__vsymtab_start = .); + KEEP(*(VSymTab)) + PROVIDE(__vsymtab_end = .); + . = ALIGN(8); + . = ALIGN(8); + PROVIDE(__rtmsymtab_start = .); + KEEP(*(RTMSymTab)) + PROVIDE(__rtmsymtab_end = .); + . = ALIGN(8); + PROVIDE(__rt_init_start = .); + KEEP(*(SORT(.rti_fn*))) + PROVIDE(__rt_init_end = .); + . = ALIGN(16); + PROVIDE(__rt_ofw_data_start = .); + KEEP(*(SORT(.rt_ofw_data.*))) + PROVIDE(__rt_ofw_data_end = .); + . = ALIGN(16); + . = ALIGN(4); + __usbh_class_info_start__ = .; + KEEP(*(.usbh_class_info)) + . = ALIGN(4); + __usbh_class_info_end__ = .; + PROVIDE(__text_end = .); + } :text + .eh_frame_hdr : + { + *(.eh_frame_hdr) + *(.eh_frame_entry) + } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + . = ALIGN(8); + .data : + { + *(.data) + *(.data.*) + *(.data1) + *(.data1.*) + . = ALIGN(16); + _gp = ABSOLUTE(.); + *(.sdata) + *(.sdata.*) + *(.rel.local) + } :data + . = ALIGN(8); + .ctors : + { + PROVIDE(__ctors_start__ = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__ctors_end__ = .); + } + .dtors : + { + PROVIDE(__dtors_start__ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(__dtors_end__ = .); + } + . = ALIGN(16); + .bss : + { + PROVIDE(__bss_noclean_start = .); + *(.bss.noclean.*) + PROVIDE(__bss_noclean_end = .); + . = ALIGN(8); + PROVIDE(__bss_start = .); + *(.bss) + *(.bss.*) + *(.dynbss) + *(COMMON) + . = ALIGN(8); + PROVIDE(__bss_end = .); + } +#ifdef USE_OPENAMP + .resource_table 0xc0000000 : { + *(.resource_table) + . = ALIGN(4); + } +#endif + _end = .; + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + __data_size = SIZEOF(.data); + __bss_size = SIZEOF(.bss); +} diff --git a/bsp/phytium/aarch64/rtconfig.h b/bsp/phytium/aarch64/rtconfig.h index b12a8adf6f..def0ed1e9c 100644 --- a/bsp/phytium/aarch64/rtconfig.h +++ b/bsp/phytium/aarch64/rtconfig.h @@ -72,7 +72,7 @@ /* end of rt_strnlen options */ /* end of klibc options */ -#define RT_NAME_MAX 16 +#define RT_NAME_MAX 32 #define RT_USING_SMP #define RT_CPUS_NR 2 #define RT_ALIGN_SIZE 4 @@ -219,7 +219,6 @@ #define RT_USING_NULL #define RT_USING_ZERO #define RT_USING_RANDOM -#define RT_USING_PWM #define RT_USING_RTC #define RT_USING_SPI #define RT_USING_SPI_ISR @@ -227,7 +226,7 @@ #define RT_USING_AUDIO #define RT_AUDIO_REPLAY_MP_BLOCK_SIZE 4096 #define RT_AUDIO_REPLAY_MP_BLOCK_COUNT 2 -#define RT_AUDIO_RECORD_PIPE_SIZE 2048 +#define RT_AUDIO_RECORD_PIPE_SIZE 4096 #define RT_USING_BLK /* Partition Types */ @@ -272,63 +271,6 @@ /* Network */ -#define RT_USING_SAL -#define SAL_INTERNET_CHECK -#define SOCKET_TABLE_STEP_LEN 4 - -/* Docking with protocol stacks */ - -#define SAL_USING_LWIP -/* end of Docking with protocol stacks */ -#define SAL_USING_POSIX -#define RT_USING_NETDEV -#define NETDEV_USING_IFCONFIG -#define NETDEV_USING_PING -#define NETDEV_USING_NETSTAT -#define NETDEV_USING_AUTO_DEFAULT -#define NETDEV_IPV4 1 -#define NETDEV_IPV6 0 -#define RT_USING_LWIP -#define RT_USING_LWIP212 -#define RT_USING_LWIP_VER_NUM 0x20102 -#define RT_LWIP_MEM_ALIGNMENT 64 -#define RT_LWIP_ICMP -#define RT_LWIP_DNS - -/* Static IPv4 Address */ - -#define RT_LWIP_IPADDR "192.168.4.10" -#define RT_LWIP_GWADDR "192.168.4.1" -#define RT_LWIP_MSKADDR "255.255.255.0" -/* end of Static IPv4 Address */ -#define RT_LWIP_UDP -#define RT_LWIP_TCP -#define RT_LWIP_RAW -#define RT_MEMP_NUM_NETCONN 8 -#define RT_LWIP_PBUF_NUM 512 -#define RT_LWIP_RAW_PCB_NUM 4 -#define RT_LWIP_UDP_PCB_NUM 4 -#define RT_LWIP_TCP_PCB_NUM 4 -#define RT_LWIP_TCP_SEG_NUM 40 -#define RT_LWIP_TCP_SND_BUF 8196 -#define RT_LWIP_TCP_WND 8196 -#define RT_LWIP_TCPTHREAD_PRIORITY 12 -#define RT_LWIP_TCPTHREAD_MBOX_SIZE 256 -#define RT_LWIP_TCPTHREAD_STACKSIZE 16184 -#define RT_LWIP_ETHTHREAD_PRIORITY 16 -#define RT_LWIP_ETHTHREAD_STACKSIZE 8192 -#define RT_LWIP_ETHTHREAD_MBOX_SIZE 256 -#define RT_LWIP_REASSEMBLY_FRAG -#define LWIP_NETIF_STATUS_CALLBACK 1 -#define LWIP_NETIF_LINK_CALLBACK 1 -#define RT_LWIP_NETIF_NAMESIZE 6 -#define SO_REUSE 1 -#define LWIP_SO_RCVTIMEO 1 -#define LWIP_SO_SNDTIMEO 1 -#define LWIP_SO_RCVBUF 1 -#define LWIP_SO_LINGER 0 -#define LWIP_NETIF_LOOPBACK 0 -#define RT_LWIP_USING_PING /* end of Network */ /* Memory protection */ @@ -456,45 +398,9 @@ /* end of STM32 HAL & SDK Drivers */ -/* Infineon HAL Packages */ - -/* end of Infineon HAL Packages */ - /* Kendryte SDK */ /* end of Kendryte SDK */ - -/* WCH HAL & SDK Drivers */ - -/* end of WCH HAL & SDK Drivers */ - -/* AT32 HAL & SDK Drivers */ - -/* end of AT32 HAL & SDK Drivers */ - -/* HC32 DDL Drivers */ - -/* end of HC32 DDL Drivers */ - -/* NXP HAL & SDK Drivers */ - -/* end of NXP HAL & SDK Drivers */ - -/* NUVOTON Drivers */ - -/* end of NUVOTON Drivers */ - -/* GD32 Drivers */ - -/* end of GD32 Drivers */ - -/* HPMicro SDK */ - -/* end of HPMicro SDK */ - -/* FT32 HAL & SDK Drivers */ - -/* end of FT32 HAL & SDK Drivers */ /* end of HAL & SDK Drivers */ /* sensors drivers */ @@ -589,6 +495,10 @@ /* Board extended module Drivers */ /* end of Hardware Drivers */ + +/* System Example */ + +/* end of System Example */ #define BSP_USING_GIC #define BSP_USING_GICV3 #define PHYTIUM_ARCH_AARCH64 @@ -624,9 +534,13 @@ /* Sdk common configuration */ #define ELOG_LINE_BUF_SIZE 0x100 -#define LOG_DEBUG -#define USE_NS_GTIMER +#define LOG_INFO +#define USE_PHYSICAL_GTIMER /* end of Sdk common configuration */ + +/* OpenAmp */ + +/* end of OpenAmp */ /* end of Standalone Setting */ #define KERNEL_ASPACE_START 0x1000 diff --git a/bsp/phytium/board/board.c b/bsp/phytium/board/board.c index ccd352a751..abc9ec6ab0 100644 --- a/bsp/phytium/board/board.c +++ b/bsp/phytium/board/board.c @@ -44,7 +44,9 @@ #include "fcpu_info.h" #include "fiopad.h" -#ifdef RT_USING_SMP +#ifdef RT_USING_SMP /* SMP */ + #include "fpsci.h" +#elif defined(RT_USING_AMP) #include "fpsci.h" #endif @@ -120,8 +122,8 @@ void rt_hw_timer_isr(int vector, void *parameter) int rt_hw_timer_init(void) { - rt_hw_interrupt_install(GENERIC_TIMER_NS_IRQ_NUM, rt_hw_timer_isr, RT_NULL, "tick"); - rt_hw_interrupt_umask(GENERIC_TIMER_NS_IRQ_NUM); + rt_hw_interrupt_install(GENERIC_PTIMER_EL1_IRQ_NUM, rt_hw_timer_isr, RT_NULL, "tick"); + rt_hw_interrupt_umask(GENERIC_PTIMER_EL1_IRQ_NUM); timer_step = gtimer_get_counter_frequency(); FASSERT_MSG((timer_step > 1000000), "invalid freqency %ud", timer_step); timer_step /= RT_TICK_PER_SECOND; @@ -161,8 +163,6 @@ void rt_hw_board_aarch64_init(void) phytium_interrupt_init(); - rt_hw_gtimer_init(); - FIOMuxInit(); FEarlyUartProbe(); @@ -180,6 +180,12 @@ void rt_hw_board_aarch64_init(void) rt_thread_idle_sethook(idle_wfi); + rt_hw_gtimer_init(); + +#if defined(USE_OPENAMP) + FPsciInit(); +#endif + #ifdef RT_USING_SMP FPsciInit(); /* install IPI handle */ diff --git a/bsp/phytium/board/phytium_cpu.h b/bsp/phytium/board/phytium_cpu.h index 3da9793649..286529fc0a 100644 --- a/bsp/phytium/board/phytium_cpu.h +++ b/bsp/phytium/board/phytium_cpu.h @@ -46,21 +46,21 @@ rt_uint64_t get_main_cpu_affval(void); -rt_inline rt_uint32_t platform_get_gic_dist_base(void) +rt_inline rt_uintptr_t platform_get_gic_dist_base(void) { return GICV3_DISTRIBUTOR_BASE_ADDR; } /* the basic constants and interfaces needed by gic */ -rt_inline uintptr_t platform_get_gic_redist_base(void) +rt_inline rt_uintptr_t platform_get_gic_redist_base(void) { - uintptr_t redis_base, mpidr_aff, gicr_typer_aff; - mpidr_aff = (uintptr_t)(GetAffinity() & CORE_AFF_MASK); + rt_uintptr_t redis_base, mpidr_aff, gicr_typer_aff; + mpidr_aff = (rt_uintptr_t)(GetAffinity() & CORE_AFF_MASK); for (redis_base = GICV3_RD_BASE_ADDR; redis_base < GICV3_RD_BASE_ADDR + GICV3_RD_SIZE; redis_base += GICV3_RD_OFFSET) { #ifdef RT_USING_SMART - uintptr_t redis_base_virtual = (uintptr_t)rt_ioremap((void *)redis_base, GICV3_RD_OFFSET); + rt_uintptr_t redis_base_virtual = (rt_uintptr_t)rt_ioremap((void *)redis_base, GICV3_RD_OFFSET); rt_hw_tlb_invalidate_all(); if (redis_base_virtual == 0) { @@ -77,7 +77,7 @@ rt_inline uintptr_t platform_get_gic_redist_base(void) } else { - rt_iounmap(redis_base_virtual); + rt_iounmap((volatile void *)redis_base_virtual); } #else #if defined(TARGET_ARMV8_AARCH64) @@ -98,7 +98,7 @@ rt_inline uintptr_t platform_get_gic_redist_base(void) #if defined(TARGET_ARMV8_AARCH64) -rt_inline rt_uint32_t platform_get_gic_cpu_base(void) +rt_inline rt_uintptr_t platform_get_gic_cpu_base(void) { return 0; /* unused in gicv3 */ } diff --git a/bsp/phytium/board/phytium_cpu_id.S b/bsp/phytium/board/phytium_cpu_id.S index d16883e16b..5d5203c5df 100644 --- a/bsp/phytium/board/phytium_cpu_id.S +++ b/bsp/phytium/board/phytium_cpu_id.S @@ -106,6 +106,17 @@ return: .globl cpu_id_mapping cpu_id_mapping: #if defined(TARGET_PE2204) +#if defined(USE_OPENAMP) +cmp x0, #0 // compare cpu_id with 0 +beq map_cpu_id_0 +cmp x0, #1 // compare cpu_id with 2 +beq map_cpu_id_2 +cmp x0, #2 // compare cpu_id with 1 +beq map_cpu_id_1 +cmp x0, #3 // compare cpu_id with 3 +beq map_cpu_id_3 +RET // no mapping needed +#else cmp x0, #0 // compare cpu_id with 0 beq map_cpu_id_0 cmp x0, #1 // compare cpu_id with 1 @@ -116,6 +127,7 @@ cmp x0, #3 // compare cpu_id with 3 beq map_cpu_id_3 RET // no mapping needed #endif +#endif RET // no mapping needed // Mapping for PE2204 diff --git a/bsp/phytium/board/smp_sgi_test.c b/bsp/phytium/board/smp_sgi_test.c index 1d48e99032..e6a30e31bf 100644 --- a/bsp/phytium/board/smp_sgi_test.c +++ b/bsp/phytium/board/smp_sgi_test.c @@ -39,7 +39,7 @@ static char *core_thread_name[] = }; static rt_uint8_t core_stack[RT_CPUS_NR][4096]; -static rt_isr_handler_t smp_test_ipi_handle(int vector, void *param) +static void smp_test_ipi_handle(int vector, void *param) { rt_int32_t cpu_id = rt_hw_cpu_id(); rt_kprintf("smp_test_ipi_handle, cpu_id = %d\n", cpu_id); diff --git a/bsp/phytium/libraries/SConscript b/bsp/phytium/libraries/SConscript index 5122ca521b..6c278a5d39 100644 --- a/bsp/phytium/libraries/SConscript +++ b/bsp/phytium/libraries/SConscript @@ -7,6 +7,7 @@ cwd = GetCurrentDir() PORT_DRV_DIR = cwd + '/drivers' DRIVERS_EXAMPLE_DIR = cwd + '/drivers_example' PHYTIUM_SDK_DIR = cwd + '/phytium_standalone_sdk' +SYSTEM_EXAMPLE_DIR = cwd + '/system_example' COMMON_DIR = cwd + '/common' # common source @@ -137,10 +138,24 @@ if GetDepend(['BSP_USING_GPIO']): if GetDepend(['BSP_USING_I2S']): src += Glob(PHYTIUM_SDK_DIR+'/drivers/i2s/fi2s/*.c') \ + Glob(PHYTIUM_SDK_DIR+'/drivers/dma/fddma/*.c') \ - + Glob(PORT_DRV_DIR+'/drv_i2s.c') + + Glob(PORT_DRV_DIR+'/drv_i2s.c') + path += [PHYTIUM_SDK_DIR + '/drivers/i2s/fi2s/'] \ + [PHYTIUM_SDK_DIR + '/drivers/dma/fddma/'] +## i2s +if GetDepend(['BSP_USING_I2S_MSG']): + src += Glob(PHYTIUM_SDK_DIR+'/drivers/i2s/fi2s_v2/*.c') \ + + Glob(PHYTIUM_SDK_DIR+'/drivers/dma/fddma/*.c') \ + + Glob(PORT_DRV_DIR+'/drv_i2s_msg.c') + + path += [PHYTIUM_SDK_DIR + '/drivers/i2s/fi2s_v2/'] \ + + [PHYTIUM_SDK_DIR + '/drivers/dma/fddma/'] + +## pwm +if GetDepend(['BSP_USING_ES8336']): + src += Glob(PORT_DRV_DIR+'/drv_es8336.c') + ## pwm if GetDepend(['BSP_USING_PWM']): src += Glob(PHYTIUM_SDK_DIR+'/drivers/pwm/fpwm/*.c') + Glob(PORT_DRV_DIR+'/drv_pwm.c') @@ -171,17 +186,6 @@ if GetDepend(['I2C_USE_MIO']): src += Glob(PHYTIUM_SDK_DIR+'/drivers/mio/fmio/*.c') path += [PHYTIUM_SDK_DIR + '/drivers/mio/fmio/'] -## device -if GetDepend(['BSP_USING_DEVICE']): - src += Glob(PHYTIUM_SDK_DIR+'/drivers/device/fdevice/fdevice.c') - path += [PHYTIUM_SDK_DIR + '/drivers/device/fdevice/'] - if GetDepend(['BSP_USING_ES8336']): - src += Glob(PHYTIUM_SDK_DIR+'/drivers/device/fes8336/fes8336.c') + Glob(PHYTIUM_SDK_DIR+'/drivers/i2c/fi2c/*.c') - path += [PHYTIUM_SDK_DIR + '/drivers/device/fes8336/'] + [PHYTIUM_SDK_DIR + '/drivers/i2c/fi2c/'] - if GetDepend(['BSP_USING_ES8388']): - src += Glob(PHYTIUM_SDK_DIR+'/drivers/device/fes8388/fes8388.c') + Glob(PHYTIUM_SDK_DIR+'/drivers/i2c/fi2c/*.c') - path += [PHYTIUM_SDK_DIR + '/drivers/device/fes8388/'] + [PHYTIUM_SDK_DIR + '/drivers/i2c/fi2c/'] - ## drivers_example if GetDepend(['BSP_USING_DRIVERS_EXAMPLE']): src += Glob(DRIVERS_EXAMPLE_DIR+'/*.c') @@ -191,7 +195,7 @@ if GetDepend(['BSP_USING_DRIVERS_EXAMPLE']): if GetDepend(['E2000D_DEMO_BOARD']): src += Glob(PHYTIUM_SDK_DIR+'/board/e2000d_demo/fio_mux.c') path += [PHYTIUM_SDK_DIR + '/board/e2000d_demo/'] - + if GetDepend(['BSP_USING_SDIF_LAYER']): src += Glob(PHYTIUM_SDK_DIR+'/board/e2000d_demo/fsdif_timing.c') @@ -223,7 +227,53 @@ if GetDepend(['PHYTIUMPI_FIREFLY_BOARD']): if GetDepend(['BSP_USING_SDIF_LAYER']): src += Glob(PHYTIUM_SDK_DIR+'/board/phytiumpi_firefly/fsdif_timing.c') + +## third-party +if GetDepend(['USE_OPENAMP']): + ## libmetal + src += Glob(PHYTIUM_SDK_DIR+'/third-party/libmetal/metal/*.c') + src += Glob(PHYTIUM_SDK_DIR+'/third-party/libmetal/metal/system/generic/*.c') + + ## libmetal port + src += Glob(cwd + '/port/libmetal_port/*.c') + path += [PHYTIUM_SDK_DIR + '/third-party/libmetal/'] + path += [PHYTIUM_SDK_DIR + '/third-party/libmetal/compiler/gcc/'] + path += [PHYTIUM_SDK_DIR + '/third-party/libmetal/processor/aarch64/'] + path += [cwd + '/port/libmetal_port/'] + + ## openamp + path += [PHYTIUM_SDK_DIR + '/third-party/openamp/lib'] + path += [PHYTIUM_SDK_DIR + '/third-party/openamp/lib/include'] + path += [PHYTIUM_SDK_DIR + '/third-party/openamp/lib/include/openamp'] + path += [PHYTIUM_SDK_DIR + '/third-party/openamp/lib/rpmsg'] + path += [PHYTIUM_SDK_DIR + '/third-party/openamp/lib/remoteproc'] + path += [PHYTIUM_SDK_DIR + '/third-party/openamp/ports'] + path += [PHYTIUM_SDK_DIR + '/third-party/openamp/lib/service/rpmsg/rpc'] + path += [PHYTIUM_SDK_DIR + '/third-party/openamp/lib/virtio'] + # openamp port + src += Glob(cwd + '/port/openamp_port/machine/phytium/*.c') + src += Glob(cwd + '/port/openamp_port/system/generic/machine/phytium/*.c') + path += [cwd + '/port/openamp_port/include'] + path += [cwd + '/port/openamp_port/machine/phytium'] + path += [cwd + '/port/openamp_port/system/generic/machine/phytium'] + + src += Glob(PHYTIUM_SDK_DIR+'/third-party/openamp/lib/rpmsg/*.c') + src += Glob(PHYTIUM_SDK_DIR+'/third-party/openamp/lib/version.c') + src += Glob(PHYTIUM_SDK_DIR+'/third-party/openamp/lib/proxy/*.c') + src += Glob(PHYTIUM_SDK_DIR+'/third-party/openamp/lib/remoteproc/*.c') + src += Glob(PHYTIUM_SDK_DIR+'/third-party/openamp/lib/virtio/*.c') + src += Glob(PHYTIUM_SDK_DIR+'/third-party/openamp/lib/services/rpmsg/rpc/*.c') + src += Glob(PHYTIUM_SDK_DIR+'/third-party/openamp/lib/utils/*.c') + + src += Glob(PHYTIUM_SDK_DIR+'/third-party/openamp/ports/load_fw.c') + src += Glob(PHYTIUM_SDK_DIR+'/third-party/openamp/ports/mem_image_store.c') + # system_example + if GetDepend(['BSP_USING_SYSTEM_EXAMPLE']): + if GetDepend(['BSP_USING_OPENAMP_EXAMPLE']): + src += Glob(SYSTEM_EXAMPLE_DIR+'/openamp/*.c') + path += [SYSTEM_EXAMPLE_DIR+'/openamp/'] + LIBS = [] LIBPATH = [] diff --git a/bsp/phytium/libraries/common/sdkconfig.h b/bsp/phytium/libraries/common/sdkconfig.h new file mode 100644 index 0000000000..57e4b7353d --- /dev/null +++ b/bsp/phytium/libraries/common/sdkconfig.h @@ -0,0 +1,62 @@ +/* + * Copyright : (C) 2025 Phytium Information Technology, Inc. + * All Rights Reserved. + * + * This program is OPEN SOURCE software: you can redistribute it and/or modify it + * under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd, + * either version 1.0 of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY; + * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * See the Phytium Public License for more details. + * + * + * FilePath: sdkconfig.h + * Created Date: 2025-04-24 10:47:57 + * Last Modified: 2025-05-08 19:35:29 + * Description: This file is for + * + * Modify History: + * Ver Who Date Changes + * ----- ---------- -------- --------------------------------- + */ + +#ifndef SDK_CONFIG_H +#define SDK_CONFIG_H + +#include "rtconfig.h" + +/* openamp define */ +#if defined(USE_OPENAMP) +#define CONFIG_USE_AMP +#define CONFIG_USE_LIBMETAL +#define CONFIG_USE_OPENAMP +#endif + +#if defined(USE_OPENAMP_IPI) +#define CONFIG_USE_OPENAMP_IPI +#endif + +#if defined (SKIP_SHBUF_IO_WRITE) +#define CONFIG_SKIP_SHBUF_IO_WRITE +#endif + +#if defined (USE_MASTER_VRING_DEFINE) +#define CONFIG_USE_MASTER_VRING_DEFINE +#endif + +#if defined (USE_CACHE_COHERENCY) +#define CONFIG_USE_CACHE_COHERENCY +#endif + +#if defined (USE_DEFAULT_INTERRUPT_CONFIG) +#define CONFIG_USE_DEFAULT_INTERRUPT_CONFIG +#endif + +#if defined (CONFIG_USE_DEFAULT_INTERRUPT_CONFIG) +#if defined (INTERRUPT_ROLE_SLAVE) +#define CONFIG_INTERRUPT_ROLE_SLAVE +#endif +#endif +#define CONFIG_MAX_XLAT_TABLES 256 +#endif /* SDK_CONFIG_H */ diff --git a/bsp/phytium/libraries/drivers/Kconfig b/bsp/phytium/libraries/drivers/Kconfig index 1e2f67b989..f08ffb23a2 100644 --- a/bsp/phytium/libraries/drivers/Kconfig +++ b/bsp/phytium/libraries/drivers/Kconfig @@ -11,7 +11,7 @@ menu "On-chip Peripheral Drivers" if BSP_USING_DRIVERS_EXAMPLE config BSP_USING_DRIVERS_AUTO_TEST - bool "Enable drivers example" + bool "Enable drivers auto test" default n endif @@ -425,21 +425,34 @@ menu "On-chip Peripheral Drivers" default n endif - menuconfig BSP_USING_I2S - bool "Enable I2S" - default n - select RT_USING_AUDIO - select BSP_USING_DEVICE - if BSP_USING_I2S - config RT_I2S_SAMPLERATE - int "The samplerate param" - default 8000 - config RT_I2S_SAMPLEBITS - int "The samplebits param" - default 16 - config RT_USING_I2S0 - bool "Enable i2s0" - default n + menuconfig BSP_USING_I2S_LAYER + bool "Enable I2S Layer" + default n + select RT_USING_AUDIO + select BSP_USING_DEVICE + if BSP_USING_I2S_LAYER + choice + prompt "Select I2S Mode" + config BSP_USING_I2S + bool "Standard I2S" + help + Use standard I2S communication mode + config BSP_USING_I2S_MSG + bool "IOP message-based I2S" + help + Use IOP message-based I2S communication + endchoice + + if BSP_USING_I2S + config RT_USING_I2S0 + bool "Enable i2s0" + default n + endif + if BSP_USING_I2S_MSG + config RT_USING_I2S0_MSG + bool "Enable i2s0 msg" + default n + endif endif menuconfig BSP_USING_DEVICE @@ -448,9 +461,14 @@ menu "On-chip Peripheral Drivers" if BSP_USING_DEVICE config BSP_USING_ES8336 bool "Enable ES8336" + select BSP_USING_I2C_LAYER + select RT_USING_MIO14 if E2000D_DEMO_BOARD + select RT_USING_MIO14 if E2000Q_DEMO_BOARD + select RT_USING_I2C3_MSG if PD2408_TEST_B_BOARD default n config BSP_USING_ES8388 bool "Enable ES8388" + select BSP_USING_I2C_LAYER default n endif endmenu diff --git a/bsp/phytium/libraries/drivers/drv_es8336.c b/bsp/phytium/libraries/drivers/drv_es8336.c new file mode 100644 index 0000000000..593320cfb0 --- /dev/null +++ b/bsp/phytium/libraries/drivers/drv_es8336.c @@ -0,0 +1,324 @@ +#include <string.h> +#include "drv_es8336.h" +#include "fdebug.h" +#include "fdrivers_port.h" +#include "fparameters.h" +#if defined(E2000D_DEMO_BOARD)||defined(E2000Q_DEMO_BOARD) +#include "fi2c.h" +#include "fi2c_hw.h" +#include "drv_i2c.h" +#endif +#if defined(PD2408_TEST_B_BOARD) +#include "fi2c_msg.h" +#include "fi2c_msg_hw.h" +#include "drv_i2c_msg.h" +#endif + +#include "rtconfig.h" + +#define ES_8336_ADDR 0x10 + +static struct rt_i2c_bus_device *i2c_bus = RT_NULL; + +static int i2c_ctrl_init() +{ + char name[RT_NAME_MAX]; +#if defined(E2000D_DEMO_BOARD)||defined(E2000Q_DEMO_BOARD) + rt_strncpy(name, "MIO14", RT_NAME_MAX); +#endif +#if defined(PD2408_TEST_B_BOARD) + rt_strncpy(name, "I2C3_MSG", RT_NAME_MAX); +#endif + i2c_bus = (struct rt_i2c_bus_device *)rt_device_find(name); + if (i2c_bus == RT_NULL) + { + rt_kprintf("can't find %s device!\n", name); + } + else + { + rt_kprintf("find %s device!!!!\n", name); + } + + return 0; +} + +int _i2c_master_read_reg(u16 device_addr, int addr, int addr_len, void *data, int data_len) +{ + FError ret = FT_SUCCESS; + u8 word_address = addr & 0xff; + struct rt_i2c_msg msgs[2]; + msgs[0].addr = device_addr; + msgs[0].flags = RT_I2C_WR; + msgs[0].buf = &word_address; + msgs[0].len = 1; + rt_i2c_transfer(i2c_bus, &msgs[0], 1); + + msgs[1].addr = device_addr; + msgs[1].flags = FI2C_M_RD; + msgs[1].buf = data; + msgs[1].len = data_len; + rt_i2c_transfer(i2c_bus, &msgs[1], 1); + return ret; +} + +int _i2c_master_write_reg(u16 device_addr, int addr, int addr_len, void *data, int data_len) +{ + FError ret = FT_SUCCESS; + u8 write_buf[2]; + write_buf[0] = addr & 0xff; + memcpy(write_buf + 1, data, data_len); + + struct rt_i2c_msg write_msgs; + write_msgs.addr = device_addr; + write_msgs.flags = RT_I2C_WR; + write_msgs.buf = write_buf; + write_msgs.len = data_len + 1; + + ret = rt_i2c_transfer(i2c_bus, &write_msgs, 1); + return ret; +} + +int es8336_write_reg(int reg, int value) +{ + return _i2c_master_write_reg(ES_8336_ADDR, reg, 1, &value, 1); +} + +int es8336_read_reg(int reg, int *value) +{ + *value = 0; + return _i2c_master_read_reg(ES_8336_ADDR, reg, 1, value, 1); +} + +int es8336_set_voice_mute(boolean enable) +{ + int res = 0; + int reg = 0; + res = es8336_read_reg(ES8336_DAC_SET1_REG30, ®); + reg = reg & 0xFB; + res |= es8336_write_reg(ES8336_DAC_SET1_REG30, reg | (((int) enable) << 2)); + return res; +} + +int es8336_start(codec_dec_work_mode_t mode) +{ + int res = 0; + es8336_write_reg(ES8336_RESET_REG00, 0xC0); + es8336_write_reg(ES8336_SYS_PDN_REG0D, 0x00); + es8336_write_reg(ES8336_SDP_ADCFMT_REG0A, 0x0C); + es8336_write_reg(ES8336_SDP_DACFMT_REG0B, 0x0C); + es8336_write_reg(ES8336_CLKMGR_CLKSW_REG01, 0x7F); + if (mode == CODEC_DEV_WORK_MODE_DAC) { + es8336_write_reg(ES8336_SYS_LP1_REG0E, 0x3F); + es8336_write_reg(ES8336_SYS_LP2_REG0F, 0x1F); + es8336_write_reg(ES8336_HPMIX_SWITCH_REG14, 0x88); + es8336_write_reg(ES8336_HPMIX_PDN_REG15, 0x00); + es8336_write_reg(ES8336_HPMIX_VOL_REG16, 0x00); + es8336_write_reg(ES8336_CPHP_PDN2_REG1A, 0x10); + es8336_write_reg(ES8336_CPHP_LDOCTL_REG1B, 0x30); + es8336_write_reg(ES8336_CPHP_PDN1_REG19, 0x02); + es8336_write_reg(ES8336_DAC_PDN_REG2F, 0x00); + es8336_write_reg(ES8336_CPHP_OUTEN_REG17, 0x66); + es8336_write_reg(ES8336_RESET_REG00, 0xc0); + es8336_write_reg(ES8336_DAC_VOLL_REG33, 0x0); + es8336_write_reg(ES8336_DAC_VOLR_REG34, 0x28); + es8336_write_reg(ES8336_DAC_SET1_REG30, 0x00);/*the connect of Lin,Lout,Rin,Rout*/ + es8336_write_reg(ES8336_DAC_VOLL_REG33, 0x0);/*digital volume control*/ + es8336_write_reg(ES8336_DAC_VOLR_REG34, 0x28); + es8336_write_reg(ES8336_DAC_VOLL_REG33, 0x1); + es8336_write_reg(ES8336_DAC_VOLR_REG34, 0x1); + es8336_write_reg(ES8336_ADC_VOLUME_REG27, 0x1); + es8336_write_reg(ES8336_ADC_VOLUME_REG28, 0x1); + + } else if(mode == CODEC_DEV_WORK_MODE_ADC) { + es8336_write_reg(ES8336_CLKMGR_CLKSW_REG01, + ES8336_CLKMGR_ADC_MCLK_EN | + ES8336_CLKMGR_ADC_ANALOG_EN); + } + else if(mode == CODEC_DEV_WORK_MODE_BOTH) { + es8336_write_reg(ES8336_RESET_REG00, 0xC0); + es8336_write_reg(ES8336_SYS_PDN_REG0D, 0x00); + es8336_write_reg(ES8336_CLKMGR_CLKSW_REG01, 0x7F); /*set the clock*/ + es8336_write_reg(ES8336_SYS_LP1_REG0E, 0x3F); /*low power mode of ADC*/ + es8336_write_reg(ES8336_SYS_LP2_REG0F, 0x1F); /*low power mode of output*/ + es8336_write_reg(ES8336_HPMIX_SWITCH_REG14, 0x88); /*headphone mixer*/ + es8336_write_reg(ES8336_HPMIX_PDN_REG15, 0x00); + es8336_write_reg(ES8336_HPMIX_VOL_REG16, 0x00); /*the gain of headphone mixer*/ + es8336_write_reg(ES8336_CPHP_PDN2_REG1A, 0x10); /*Power down charge pump circuits*/ + es8336_write_reg(ES8336_CPHP_LDOCTL_REG1B, 0x30); /*set the voltage*/ + es8336_write_reg(ES8336_CPHP_PDN1_REG19, 0x02); + es8336_write_reg(ES8336_DAC_PDN_REG2F, 0x00); + es8336_write_reg(ES8336_CPHP_OUTEN_REG17, 0x66); + es8336_write_reg(ES8336_RESET_REG00, 0xc0); + es8336_write_reg(ES8336_DAC_VOLL_REG33, 0x0); + es8336_write_reg(ES8336_DAC_VOLR_REG34, 0x28); + } +#if defined SOC_TARGET_PD2408 + es8336_write_reg(ES8336_ADC_PDN_LINSEL_REG22, 0x20); /*select the output and input source */ +#elif defined SOC_TARGET_PE220X + es8336_write_reg(ES8336_ADC_PDN_LINSEL_REG22, 0x30); /*select the output and input source*/ +#endif + return res; +} + +int es8336_stop(codec_dec_work_mode_t mode) +{ + int res = 0; + if (mode == CODEC_DEV_WORK_MODE_DAC) { + es8336_write_reg(ES8336_CPHP_OUTEN_REG17, 0x00); + es8336_write_reg(ES8336_DAC_PDN_REG2F, 0x11); + es8336_write_reg(ES8336_CPHP_LDOCTL_REG1B, 0x03); + es8336_write_reg(ES8336_CPHP_PDN2_REG1A, 0x22); + es8336_write_reg(ES8336_CPHP_PDN1_REG19, 0x06); + es8336_write_reg(ES8336_HPMIX_SWITCH_REG14, 0x00); + es8336_write_reg(ES8336_HPMIX_PDN_REG15, 0x33); + es8336_write_reg(ES8336_HPMIX_VOL_REG16, 0x00); + es8336_write_reg(ES8336_SYS_PDN_REG0D, 0x00); + es8336_write_reg(ES8336_SYS_LP1_REG0E, 0xFF); + es8336_write_reg(ES8336_SYS_LP2_REG0F, 0xFF); + es8336_write_reg(ES8336_CLKMGR_CLKSW_REG01,0x7F); + } + if (mode == CODEC_DEV_WORK_MODE_ADC) { + res |= es8336_write_reg(ES8336_ADC_PDN_LINSEL_REG22, 0xC0); /* power down adc and line in*/ + res |= es8336_write_reg(ES8336_CLKMGR_CLKSW_REG01, + ES8336_CLKMGR_ADC_MCLK_EN | + ES8336_CLKMGR_ADC_ANALOG_DIS); + } + if (mode == CODEC_DEV_WORK_MODE_BOTH) { + es8336_write_reg(ES8336_SYS_PDN_REG0D, 0x3F); + res |= es8336_write_reg(ES8336_CLKMGR_CLKSW_REG01, 0xF3); /* disable mclk */ + } + return res; +} + +int es8336_config_fmt(codec_dec_work_mode_t mode, i2s_fmt_t fmt) +{ + int res = 0; + int reg = 0; + if (mode & CODEC_DEV_WORK_MODE_ADC) { + res |= es8336_write_reg(ES8336_SDP_ADCFMT_REG0A, reg | (fmt << 1)); + } + if (mode & CODEC_DEV_WORK_MODE_DAC) { + res |= es8336_write_reg(ES8336_SDP_DACFMT_REG0B, reg | (fmt << 1)); + } + return res; +} + +int es8336_set_mic_gain(float db) +{ + int gain = db > 0 ? (int) (db / 3) : 0; + gain = (gain << 4) + gain; + return es8336_write_reg(ES8336_ADC_PGAGAIN_REG23, gain); /* MIC PGA*/ +} + +int es8336_set_bits_per_sample(codec_dec_work_mode_t mode) +{ + int res = 0; + int reg = 0; + if (mode & CODEC_DEV_WORK_MODE_ADC) { + res = es8336_read_reg(ES8336_SDP_ADCFMT_REG0A, ®); + res |= es8336_write_reg(ES8336_SDP_ADCFMT_REG0A, reg | (0x3 << 2)); + } + if (mode & CODEC_DEV_WORK_MODE_DAC) { + res = es8336_read_reg(ES8336_SDP_ADCFMT_REG0A, ®); + res |= es8336_write_reg(ES8336_SDP_DACFMT_REG0B, reg | (0x3 << 2)); + } + return res; +} + +int es8336_open() +{ + i2c_ctrl_init(); + int value = 0; + value = es8336_read_reg(ES8336_RESET_REG00, &value); + es8336_write_reg(ES8336_RESET_REG00, 0x3f); + FDriverUdelay(100); /*ensure reset success*/ + es8336_write_reg(ES8336_RESET_REG00, 0x03); + es8336_write_reg(ES8336_RESET_REG00, 0x3f); + FDriverUdelay(500); /*ensure reset success*/ + es8336_write_reg(ES8336_RESET_REG00, 0x00); + es8336_write_reg(ES8336_SYS_VMIDSEL_REG0C, 0xFF); /*vmisel config */ + FDriverUdelay(30); + es8336_write_reg(ES8336_CLKMGR_CLKSEL_REG02, 0x08); + es8336_write_reg(ES8336_CLKMGR_ADCOSR_REG03, 0x20); + es8336_write_reg(ES8336_CLKMGR_ADCDIV1_REG04, 0x11); + es8336_write_reg(ES8336_CLKMGR_ADCDIV2_REG05, 0x00); + es8336_write_reg(ES8336_CLKMGR_DACDIV1_REG06, 0x11); + es8336_write_reg(ES8336_CLKMGR_DACDIV2_REG07, 0x00); + es8336_write_reg(ES8336_CLKMGR_CPDIV_REG08, 0x00); + es8336_write_reg(ES8336_SDP_MS_BCKDIV_REG09, 0x04); + es8336_write_reg(ES8336_CLKMGR_CLKSW_REG01, 0x7F); + es8336_write_reg(ES8336_CAL_TYPE_REG1C, 0x0F); + es8336_write_reg(ES8336_CAL_HPLIV_REG1E, 0x90); + es8336_write_reg(ES8336_CAL_HPRIV_REG1F, 0x90); + es8336_write_reg(ES8336_ADC_VOLUME_REG27, 0x00); + es8336_write_reg(ES8336_ADC_PDN_LINSEL_REG22, 0xc0); + es8336_write_reg(ES8336_ADC_D2SEPGA_REG24, 0x00); + es8336_write_reg(ES8336_ADC_DMIC_REG25, 0x08); + es8336_write_reg(ES8336_DAC_SET1_REG30, 0x00); + es8336_write_reg(ES8336_DAC_SET2_REG31, 0x20); + es8336_write_reg(ES8336_DAC_SET3_REG32, 0x00); + es8336_write_reg(ES8336_DAC_VOLL_REG33, 0x00); + es8336_write_reg(ES8336_DAC_VOLR_REG34, 0x00); + es8336_write_reg(ES8336_SDP_ADCFMT_REG0A, 0x00); + es8336_write_reg(ES8336_SDP_DACFMT_REG0B, 0x00); + es8336_write_reg(ES8336_SYS_VMIDLOW_REG10, 0x11); + es8336_write_reg(ES8336_SYS_VSEL_REG11, 0xFC); + es8336_write_reg(ES8336_SYS_REF_REG12, 0x28); + es8336_write_reg(ES8336_SYS_LP1_REG0E, 0x04); + es8336_write_reg(ES8336_SYS_LP2_REG0F, 0x0C); + es8336_write_reg(ES8336_DAC_PDN_REG2F, 0x11); + es8336_write_reg(ES8336_HPMIX_SEL_REG13, 0x00); + es8336_write_reg(ES8336_HPMIX_SWITCH_REG14, 0x88); + es8336_write_reg(ES8336_HPMIX_PDN_REG15, 0x00); + es8336_write_reg(ES8336_HPMIX_VOL_REG16, 0xBB); + es8336_write_reg(ES8336_CPHP_PDN2_REG1A, 0x10); + es8336_write_reg(ES8336_CPHP_LDOCTL_REG1B, 0x30); + es8336_write_reg(ES8336_CPHP_PDN1_REG19, 0x02); + es8336_write_reg(ES8336_CPHP_ICAL_VOL_REG18, 0x00); + es8336_write_reg(ES8336_GPIO_SEL_REG4D, 0x02); + es8336_write_reg(ES8336_GPIO_DEBUNCE_INT_REG4E, 0x02); + es8336_write_reg(ES8336_TESTMODE_REG50, 0xA0); + es8336_write_reg(ES8336_TEST1_REG51, 0x00); + es8336_write_reg(ES8336_TEST2_REG52, 0x00); + es8336_write_reg(ES8336_SYS_PDN_REG0D, 0x00); + es8336_write_reg(ES8336_RESET_REG00, 0xC0); + FDriverUdelay(50); + es8336_write_reg(ES8336_ADC_PGAGAIN_REG23, 0x60); + es8336_write_reg(ES8336_ADC_D2SEPGA_REG24, 0x01); + /* adc ds mode, HPF enable */ + es8336_write_reg(ES8336_ADC_DMIC_REG25, 0x08); + es8336_write_reg(ES8336_ADC_ALC1_REG29, 0xcd); + es8336_write_reg(ES8336_ADC_ALC2_REG2A, 0x08); + es8336_write_reg(ES8336_ADC_ALC3_REG2B, 0xa0); + es8336_write_reg(ES8336_ADC_ALC4_REG2C, 0x05); + es8336_write_reg(ES8336_ADC_ALC5_REG2D, 0x06); + es8336_write_reg(ES8336_ADC_ALC6_REG2E, 0x61); + + es8336_write_reg(ES8336_GPIO_SEL_REG4D, 0x02); + /* max debance time, enable interrupt, low active */ + es8336_write_reg(ES8336_GPIO_DEBUNCE_INT_REG4E, 0xF3); + es8336_write_reg(ES8336_CPHP_OUTEN_REG17, 0x00); + es8336_write_reg(ES8336_DAC_PDN_REG2F, 0x11); + es8336_write_reg(ES8336_CPHP_LDOCTL_REG1B, 0x03); + es8336_write_reg(ES8336_CPHP_PDN2_REG1A, 0x22); + es8336_write_reg(ES8336_CPHP_PDN1_REG19, 0x06); + es8336_write_reg(ES8336_HPMIX_SWITCH_REG14, 0x00); + es8336_write_reg(ES8336_HPMIX_PDN_REG15, 0x33); + es8336_write_reg(ES8336_HPMIX_VOL_REG16, 0x00); + es8336_write_reg(ES8336_SYS_LP1_REG0E, 0xFF); + es8336_write_reg(ES8336_SYS_LP2_REG0F, 0xFF); + es8336_write_reg(ES8336_CLKMGR_CLKSW_REG01, 0xF3); + es8336_write_reg(ES8336_ADC_PDN_LINSEL_REG22, 0xD0); + + return 0; +} + +int es8336_test() +{ + es8336_open(); + es8336_start(CODEC_DEV_WORK_MODE_BOTH); + + return 0; +} + +INIT_COMPONENT_EXPORT(es8336_test);
\ No newline at end of file diff --git a/bsp/phytium/libraries/drivers/drv_es8336.h b/bsp/phytium/libraries/drivers/drv_es8336.h new file mode 100644 index 0000000000..b8f79c31b0 --- /dev/null +++ b/bsp/phytium/libraries/drivers/drv_es8336.h @@ -0,0 +1,222 @@ +/* + * Copyright (C) 2023, Phytium Technology Co., Ltd. All Rights Reserved. + * + * Licensed under the BSD 3-Clause License (the "License"); you may not use + * this file except in compliance with the License. You may obtain a copy of + * the License at + * + * https://opensource.org/licenses/BSD-3-Clause + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * + * FilePath: es8336_reg.h + * Created Date: 2025-10-03 10:51:32 + * Last Modified: 2025-10-22 14:51:22 + * Description: This file is for the Codec reg. + * + * Modify History: + * Ver Who Date Changes + * ----- ---------- -------- --------------------------------- + * 1.0 wangzongqiang 2025/10/23 init + */ + +#ifndef __DRV_ES8336_H__ +#define __DRV_ES8336_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum { + ES_I2S_MIN = -1, + ES_I2S_NORMAL = 0, + ES_I2S_LEFT = 1, + ES_I2S_RIGHT = 2, + ES_I2S_DSP = 3, + ES_I2S_MAX +} i2s_fmt_t; + +typedef enum { + CODEC_DEV_WORK_MODE_NONE, + CODEC_DEV_WORK_MODE_ADC = (1 << 0), /*!< Enable ADC, only support input */ + CODEC_DEV_WORK_MODE_DAC = (1 << 1), /*!< Enable DAC, only support output */ + CODEC_DEV_WORK_MODE_BOTH = + (CODEC_DEV_WORK_MODE_ADC | CODEC_DEV_WORK_MODE_DAC), /*!< Support both DAC and ADC */ + CODEC_DEV_WORK_MODE_LINE = (1 << 2), /*!< Line mode */ +} codec_dec_work_mode_t; + +/** + * @brief ES8336 default I2C address + */ +#define ES8336_CODEC_DEFAULT_ADDR (0x10) +#define ES8336_CODEC_DEFAULT_ADDR_1 (0x10) + +#define FES8336_SUCCESS FT_SUCCESS +#define FES8336_SET_BIAS_LEVEL 0x1 +#define FES8336_SET_FORMAT 0x2 +#define FES8336_SET_VOLUME 0x3 +#define FES8336_MUTE_DOWN 0x4 + +/* ES8336 register space */ +/* + * RESET Control + */ +#define ES8336_RESET_REG00 0x00 /*register of reset*/ +/* + * Clock Managerment + */ +#define ES8336_CLKMGR_CLKSW_REG01 0x01 /* clock manager*/ +#define ES8336_CLKMGR_CLKSEL_REG02 0x02 /* clock manager*/ +#define ES8336_CLKMGR_ADCOSR_REG03 0x03 /*ADC delta sigma over sample rate*/ +#define ES8336_CLKMGR_ADCDIV1_REG04 0x04 /*ADC clock divider*/ +#define ES8336_CLKMGR_ADCDIV2_REG05 0x05 /*ADC internal divider*/ +#define ES8336_CLKMGR_DACDIV1_REG06 0x06 /*DAC clock divider*/ +#define ES8336_CLKMGR_DACDIV2_REG07 0x07 /*DAC internal divider*/ +#define ES8336_CLKMGR_CPDIV_REG08 0x08 /*charge pump clock divider*/ +/* + * SDP Control + */ +#define ES8336_SDP_MS_BCKDIV_REG09 0x09 /*serial data port clk control*/ +#define ES8336_SDP_ADCFMT_REG0A 0x0a /*ADC sdp config*/ +#define ES8336_SDP_DACFMT_REG0B 0x0b /*DAC sdp config*/ +/* + * System Control + */ +#define ES8336_SYS_VMIDSEL_REG0C 0x0c /*vmidSel config*/ +#define ES8336_SYS_PDN_REG0D 0x0d /*power down config*/ +#define ES8336_SYS_LP1_REG0E 0x0e /*low power mode*/ +#define ES8336_SYS_LP2_REG0F 0x0f /*low power mode of output*/ +#define ES8336_SYS_VMIDLOW_REG10 0x10 /*DAC bias selection*/ +#define ES8336_SYS_VSEL_REG11 0x11 /*system register */ +#define ES8336_SYS_REF_REG12 0x12 /*system register*/ +/* + * HP Mixer + */ +#define ES8336_HPMIX_SEL_REG13 0x13 +#define ES8336_HPMIX_SWITCH_REG14 0x14 /*RDAC and LDAC signal*/ +#define ES8336_HPMIX_PDN_REG15 0x15 /*LHP and RHP config*/ +#define ES8336_HPMIX_VOL_REG16 0x16 /*the gain of dB*/ +/* + * Charge Pump Headphone driver + */ +#define ES8336_CPHP_OUTEN_REG17 0x17 /*LHP AND RHP output config*/ +#define ES8336_CPHP_ICAL_VOL_REG18 0x18 /*the gain of dB of HPL*/ +#define ES8336_CPHP_PDN1_REG19 0x19 /*HP config*/ +#define ES8336_CPHP_PDN2_REG1A 0x1a /*CP config*/ +#define ES8336_CPHP_LDOCTL_REG1B 0x1b /*voltage of hp*/ +/* + * Calibration + */ +#define ES8336_CAL_TYPE_REG1C 0x1c /*HPL and HPR config*/ +#define ES8336_CAL_SET_REG1D 0x1d /*ica and mcal config*/ +#define ES8336_CAL_HPLIV_REG1E 0x1e /*HPL ical config*/ +#define ES8336_CAL_HPRIV_REG1F 0x1f /*HPL ical config*/ +#define ES8336_CAL_HPLMV_REG20 0x20 /*HPL mcal config*/ +#define ES8336_CAL_HPRMV_REG21 0x21 /*HPL mcal config*/ +/* + * ADC Control + */ +#define ES8336_ADC_PDN_LINSEL_REG22 0x22 /*PGA input select*/ +#define ES8336_ADC_PGAGAIN_REG23 0x23 /*left PGA gain*/ +#define ES8336_ADC_D2SEPGA_REG24 0x24 /*DF2SE config*/ +#define ES8336_ADC_DMIC_REG25 0x25 /*ADC config*/ +#define ES8336_ADC_MUTE_REG26 0x26 /*ADC mute config*/ +#define ES8336_ADC_VOLUME_REG27 0x27 /*ADC volume config*/ +#define ES8336_ADC_VOLUME_REG28 0x28 /*ADC volume config*/ +#define ES8336_ADC_ALC1_REG29 0x29 /*ALC config and ALC PGA max gain*/ +#define ES8336_ADC_ALC2_REG2A 0x2a /*ALC config and ALC PGA min gain*/ +#define ES8336_ADC_ALC3_REG2B 0x2b /*ALC config*/ +#define ES8336_ADC_ALC4_REG2C 0x2c /*ALC decay and attack config*/ +#define ES8336_ADC_ALC5_REG2D 0x2d /*windows size for peak detector*/ +#define ES8336_ADC_ALC6_REG2E 0x2e /* ALC noise gate config*/ +/* + * DAC Control + */ +#define ES8336_DAC_PDN_REG2F 0x2f /*DAC control of power down*/ +#define ES8336_DAC_SET1_REG30 0x30 /*DAC data select and mute*/ +#define ES8336_DAC_SET2_REG31 0x31 /*DAC config and control*/ +#define ES8336_DAC_SET3_REG32 0x32 /*DAC fs mode and mute config*/ +#define ES8336_DAC_VOLL_REG33 0x33 /*DAC volume of left*/ +#define ES8336_DAC_VOLR_REG34 0x34 /*DAC volume of right*/ +/* + * GPIO + */ +#define ES8336_GPIO_SEL_REG4D 0x4D /*gpio select*/ +#define ES8336_GPIO_DEBUNCE_INT_REG4E 0x4E /*button and insert debounce*/ +#define ES8336_GPIO_FLAG 0x4F /*GM config*/ +/* + * TEST MODE + */ +#define ES8336_TESTMODE_REG50 0x50 /*test register*/ +#define ES8336_TEST1_REG51 0x51 +#define ES8336_TEST2_REG52 0x52 +#define ES8336_TEST3_REG53 0x53 + +#define ES8336_IFACE ES8336_SDP_MS_BCKDIV_REG09 +#define ES8336_ADC_IFACE ES8336_SDP_ADCFMT_REG0A +#define ES8336_DAC_IFACE ES8336_SDP_DACFMT_REG0B + +#define ES8336_REGNUM 84 + +/*REGISTER 0x22*/ +#define ES8336_ADC_INPUT_SHIFT 4 +#define ES8336_ADC_INPUT_MASK (0x3 << ES8336_ADC_INPUT_SHIFT) +#define ES8336_ADC_INPUT_LIN1 0 +#define ES8336_ADC_INPUT_LIN2 1 +#define ES8336_ADC_INPUT_LIN1_20DB_BOOST 2 +#define ES8336_ADC_INPUT_LIN2_20DB_BOOST 3 + + +/* REGISTER 0x01 CLOCK MANAGER */ +#define ES8336_CLKMGR_MCLK_DIV_MASK (0x1 << 7) +#define ES8336_CLKMGR_MCLK_DIV_NML (0x0 << 7) +#define ES8336_CLKMGR_MCLK_DIV_1 (0x1 << 7) +#define ES8336_CLKMGR_ADC_MCLK_MASK (0x1 << 3) +#define ES8336_CLKMGR_ADC_MCLK_EN (0x1 << 3) +#define ES8336_CLKMGR_ADC_MCLK_DIS (0x0 << 3) +#define ES8336_CLKMGR_DAC_MCLK_MASK (0x1 << 2) +#define ES8336_CLKMGR_DAC_MCLK_EN (0x1 << 2) +#define ES8336_CLKMGR_DAC_MCLK_DIS (0x0 << 2) +#define ES8336_CLKMGR_ADC_ANALOG_MASK (0x1 << 1) +#define ES8336_CLKMGR_ADC_ANALOG_EN (0x1 << 1) +#define ES8336_CLKMGR_ADC_ANALOG_DIS (0x0 << 1) +#define ES8336_CLKMGR_DAC_ANALOG_MASK (0x1 << 0) +#define ES8336_CLKMGR_DAC_ANALOG_EN (0x1 << 0) +#define ES8336_CLKMGR_DAC_ANALOG_DIS (0x0 << 0) + +/* REGISTER 0x0A */ +#define ES8336_ADCWL_MASK (0x7 << 2) +#define ES8336_ADCWL_32 (0x4 << 2) +#define ES8336_ADCWL_24 (0x0 << 2) +#define ES8336_ADCWL_20 (0x1 << 2) +#define ES8336_ADCWL_18 (0x2 << 2) +#define ES8336_ADCWL_16 (0x3 << 2) +#define ES8336_ADCFMT_MASK (0x3 << 0) +#define ES8336_ADCFMT_I2S (0x0 << 0) +#define ES8336_ADCWL_LEFT (0x1 << 0) +#define ES8336_ADCWL_RIGHT (0x2 << 0) +#define ES8336_ADCWL_PCM (0x3 << 0) + +/* REGISTER 0x0B */ +#define ES8336_DACWL_MASK (0x7 << 2) +#define ES8336_DACWL_32 (0x4 << 2) +#define ES8336_DACWL_24 (0x0 << 2) +#define ES8336_DACWL_20 (0x1 << 2) +#define ES8336_DACWL_18 (0x2 << 2) +#define ES8336_DACWL_16 (0x3 << 2) +#define ES8336_DACFMT_MASK (0x3 << 0) +#define ES8336_DACFMT_I2S (0x0 << 0) +#define ES8336_DACWL_LEFT (0x1 << 0) +#define ES8336_DACWL_RIGHT (0x2 << 0) +#define ES8336_DACWL_PCM (0x3 << 0) + +#ifdef __cplusplus +} +#endif + +#endif /*__ES8336_H__*/ diff --git a/bsp/phytium/libraries/drivers/drv_i2c.c b/bsp/phytium/libraries/drivers/drv_i2c.c index eca08a49aa..6a0aec160c 100644 --- a/bsp/phytium/libraries/drivers/drv_i2c.c +++ b/bsp/phytium/libraries/drivers/drv_i2c.c @@ -21,15 +21,12 @@ #include "fio_mux.h" #include "drivers/dev_i2c.h" #include "fparameters.h" +#include "interrupt.h" #ifdef RT_USING_SMART #include <ioremap.h> #endif /*Please define the length of the mem_addr of the device*/ -#ifndef FI2C_DEVICE_MEMADDR_LEN - #define FI2C_DEVICE_MEMADDR_LEN 2 -#endif -#define FI2C_DEFAULT_ID 0 #if defined(I2C_USE_MIO) #include "fmio_hw.h" #include "fmio.h" @@ -40,22 +37,60 @@ struct phytium_i2c_bus { struct rt_i2c_bus_device device; FI2c i2c_handle; - struct rt_i2c_msg *msg; const char *name; }; +static void FI2cReadDoneCallback(void *instance_p, void *param) +{ + FASSERT(instance_p); + LOG_D("trigger tx \n"); +} + +static void FI2cTransAbortedCallback(void *instance_p, void *param) +{ + FASSERT(instance_p); + LOG_D("trans aborted\n"); +} + +static void FI2cMasterStopCallback(void *instance_p, void *param) +{ + FASSERT(instance_p); + LOG_D("stop"); +} + +static void FI2cMasterStartRxCallback(void *instance_p, void *param) +{ + FASSERT(instance_p); + LOG_D("trigger rx\n"); +} + +static void FI2cMasterSetupInterrupt(FI2c *instance_p) +{ + rt_uint32_t cpu_id = rt_hw_cpu_id(); + /* callback function for FI2C_MASTER_INTR_EVT interrupt */ + instance_p->master_evt_handlers[FI2C_EVT_MASTER_TRANS_ABORTED] = FI2cTransAbortedCallback; + instance_p->master_evt_handlers[FI2C_EVT_MASTER_READ_DONE] = FI2cReadDoneCallback; + instance_p->master_evt_handlers[FI2C_EVT_MASTER_WRITE_DONE] = FI2cMasterStartRxCallback; + instance_p->master_evt_handlers[FI2C_EVT_MASTER_STOP_DEL] = FI2cMasterStopCallback; + + rt_hw_interrupt_set_target_cpus(instance_p->config.irq_num, cpu_id); + rt_hw_interrupt_set_priority(instance_p->config.irq_num, instance_p->config.irq_priority); + rt_hw_interrupt_install(instance_p->config.irq_num, FI2cMasterIntrHandler, instance_p, "i2c_master"); + rt_hw_interrupt_umask(instance_p->config.irq_num); +} + #if defined(I2C_USE_CONTROLLER) + static rt_err_t i2c_config(struct phytium_i2c_bus *i2c_bus) { RT_ASSERT(i2c_bus); FI2cConfig input_cfg; - const FI2cConfig *config_p = NULL; FI2c *instance_p = &i2c_bus->i2c_handle; FError ret = FI2C_SUCCESS; + FIOPadSetI2CMux(instance_p->config.instance_id); /* Lookup default configs by instance id */ - config_p = FI2cLookupConfig(instance_p->config.instance_id); - input_cfg = *config_p; + input_cfg = FI2cLookupConfig(instance_p->config.instance_id); #ifdef RT_USING_SMART input_cfg.base_addr = (uintptr)rt_ioremap((void *)input_cfg.base_addr, 0x1000); #endif @@ -69,7 +104,7 @@ static rt_err_t i2c_config(struct phytium_i2c_bus *i2c_bus) LOG_E("Init master I2c failed, ret: 0x%x", ret); return -RT_ERROR; } - ret = FI2cSetAddress(&i2c_bus->i2c_handle, FI2C_MASTER, i2c_bus->i2c_handle.config.slave_addr); + ret = FI2cSetAddress(&i2c_bus->i2c_handle, FI2C_MASTER, i2c_bus->i2c_handle.config.slave_addr); if (FI2C_SUCCESS != ret) { return -RT_ERROR; @@ -80,6 +115,8 @@ static rt_err_t i2c_config(struct phytium_i2c_bus *i2c_bus) return -RT_ERROR; } + FI2cMasterSetupInterrupt(&i2c_bus->i2c_handle); + return RT_EOK; } #endif @@ -91,8 +128,8 @@ static rt_err_t i2c_mio_config(struct phytium_i2c_bus *i2c_bus) FError ret = FI2C_SUCCESS; FI2cConfig i2c_config; FI2c *instance_p = &i2c_bus->i2c_handle; - FIOPadSetMioMux(instance_p->config.instance_id); + FIOPadSetMioMux(instance_p->config.instance_id); mio_handle.config = *FMioLookupConfig(instance_p->config.instance_id); #ifdef RT_USING_SMART mio_handle.config.func_base_addr = (uintptr)rt_ioremap((void *)mio_handle.config.func_base_addr, 0x1200); @@ -109,7 +146,7 @@ static rt_err_t i2c_mio_config(struct phytium_i2c_bus *i2c_bus) rt_memset(&i2c_config, 0, sizeof(i2c_config)); i2c_config.base_addr = FMioFuncGetAddress(&mio_handle, FMIO_FUNC_SET_I2C); i2c_config.irq_num = FMioFuncGetIrqNum(&mio_handle, FMIO_FUNC_SET_I2C); - i2c_config.irq_prority = 0; + i2c_config.irq_priority = 0; i2c_config.ref_clk_hz = FMIO_CLK_FREQ_HZ; i2c_config.work_mode = FI2C_MASTER; i2c_config.use_7bit_addr = TRUE; @@ -123,20 +160,15 @@ static rt_err_t i2c_mio_config(struct phytium_i2c_bus *i2c_bus) LOG_E("Init mio master failed, ret: 0x%x", ret); return -RT_ERROR; } - ret = FI2cSetAddress(instance_p, FI2C_MASTER, instance_p->config.slave_addr); - if (FI2C_SUCCESS != ret) - { - return -RT_ERROR; - } ret = FI2cSetSpeed(instance_p, FI2C_SPEED_STANDARD_RATE, TRUE); if (FI2C_SUCCESS != ret) { return -RT_ERROR; } - mio_handle.is_ready = 0; rt_memset(&mio_handle, 0, sizeof(mio_handle)); + FI2cMasterSetupInterrupt(instance_p); return RT_EOK; } #endif @@ -183,42 +215,21 @@ static rt_err_t i2c_bus_control(struct rt_i2c_bus_device *device, int cmd, void static rt_ssize_t i2c_master_xfer(struct rt_i2c_bus_device *device, struct rt_i2c_msg msgs[], rt_uint32_t num) { RT_ASSERT(device); - u32 ret; - struct rt_i2c_msg *pmsg; rt_ssize_t i; + FI2cMsg fmsgs; + struct rt_i2c_msg *pmsg; struct phytium_i2c_bus *i2c_bus; i2c_bus = (struct phytium_i2c_bus *)(device); - uintptr mem_addr = 0; - for (i = 0; i < num; i++) { pmsg = &msgs[i]; - for (u32 j = 0; j <FI2C_DEVICE_MEMADDR_LEN; j++) - { - mem_addr |= msgs[i].buf[j] << (8 * (FI2C_DEVICE_MEMADDR_LEN - 1 - j)); - } + fmsgs.device_addr = pmsg->addr; + fmsgs.buf = (u8 *)pmsg->buf; + fmsgs.len = pmsg->len; + fmsgs.flags = (pmsg->flags & RT_I2C_RD) ? FI2C_M_RD : FI2C_M_WE; - i2c_bus->i2c_handle.config.slave_addr = pmsg->addr; - if (pmsg->flags & RT_I2C_RD) - { - rt_thread_delay(100); - ret = FI2cMasterReadPoll(&i2c_bus->i2c_handle, mem_addr, FI2C_DEVICE_MEMADDR_LEN, &pmsg->buf[0], pmsg->len - FI2C_DEVICE_MEMADDR_LEN); - if (ret != FI2C_SUCCESS) - { - LOG_E("I2C master read failed!\n"); - return -RT_ERROR; - } - } - else - { - rt_thread_delay(100); - ret = FI2cMasterWritePoll(&i2c_bus->i2c_handle, mem_addr, FI2C_DEVICE_MEMADDR_LEN, &pmsg->buf[FI2C_DEVICE_MEMADDR_LEN], pmsg->len - FI2C_DEVICE_MEMADDR_LEN); - if (ret != FI2C_SUCCESS) - { - LOG_E("I2C master write failed!\n"); - return -RT_ERROR; - } - } + FI2cMasterIntrXfer(&i2c_bus->i2c_handle, &fmsgs, 1); + rt_thread_mdelay(5); } return i; diff --git a/bsp/phytium/libraries/drivers/drv_i2c_msg.c b/bsp/phytium/libraries/drivers/drv_i2c_msg.c index d0081fd6c0..8861ac1507 100644 --- a/bsp/phytium/libraries/drivers/drv_i2c_msg.c +++ b/bsp/phytium/libraries/drivers/drv_i2c_msg.c @@ -26,17 +26,10 @@ #include <ioremap.h> #endif -/*Please define the length of the mem_addr of the device*/ -#ifndef FI2C_DEVICE_MEMADDR_LEN - #define FI2C_DEVICE_MEMADDR_LEN 2 -#endif -#define I2C_TIMEOUT_MS 1000 - struct phytium_i2c_msg_bus { struct rt_i2c_bus_device device; FI2cMsgCtrl i2c_handle; - struct rt_i2c_msg *msg; const char *name; }; @@ -64,11 +57,10 @@ static rt_err_t i2c_msg_config(struct phytium_i2c_msg_bus *i2c_bus) return -RT_ERROR; } instance_p->speed_mode = FI2C_STANDARD_SPEED; - instance_p->timeout_ms = I2C_TIMEOUT_MS; instance_p->clk_clock_frequency = FI2C_CLK_FREQ_HZ; rt_hw_interrupt_set_target_cpus(instance_p->config.irq_num, cpu_id); - rt_hw_interrupt_set_priority(instance_p->config.irq_num, instance_p->config.irq_prority); + rt_hw_interrupt_set_priority(instance_p->config.irq_num, instance_p->config.irq_priority); rt_hw_interrupt_install(instance_p->config.irq_num, FI2cMsgMasterRegfileIsr, instance_p, i2c_bus->name); rt_hw_interrupt_umask(instance_p->config.irq_num); @@ -135,6 +127,7 @@ static rt_ssize_t i2c_msg_master_xfer(struct rt_i2c_bus_device *device, struct r u32 ret; struct rt_i2c_msg *pmsg; rt_ssize_t i; + FI2cMsg fmsgs; struct phytium_i2c_msg_bus *i2c_bus; i2c_bus = (struct phytium_i2c_msg_bus *)(device); FI2cMsgCtrl *instance_p = &i2c_bus->i2c_handle; @@ -142,40 +135,18 @@ static rt_ssize_t i2c_msg_master_xfer(struct rt_i2c_bus_device *device, struct r for (i = 0; i < num; i++) { pmsg = &msgs[i]; - if (pmsg->flags & RT_I2C_RD) - { - /*When performing a read operation, first write to the input memaddr, and then read*/ - struct FI2cMsg msg[2]; - msg[0].addr = pmsg->addr; - msg[0].flags = FI2C_MSG_WD; - msg[0].len = FI2C_DEVICE_MEMADDR_LEN; - msg[0].buf = pmsg->buf; + fmsgs.device_addr = pmsg->addr; + fmsgs.buf = (u8 *)pmsg->buf; + fmsgs.len = pmsg->len; + fmsgs.flags = (pmsg->flags & RT_I2C_RD) ? FI2C_M_RD : FI2C_M_WE; - msg[1].addr = pmsg->addr; - msg[1].flags = FI2C_MSG_RD; - msg[1].len = pmsg->len; - msg[1].buf = pmsg->buf; - ret = FI2cMsgMasterVirtXfer(instance_p, msg, 2); - if (ret != FI2C_MSG_SUCCESS) - { - LOG_E("FI2cMsgMasterVirtProbe read failed, ret = %d", ret); - } - } - else + ret = FI2cMsgMasterVirtXfer(instance_p, &fmsgs, 1); + if (ret != FI2C_MSG_SUCCESS) { - struct FI2cMsg msg; - msg.addr = pmsg->addr; - msg.buf = pmsg->buf; - msg.len = pmsg->len; - msg.flags = FI2C_MSG_WD; - ret = FI2cMsgMasterVirtXfer(instance_p, &msg, 1); /*num = 1 ,只需发送一次写命令*/ - if (ret != FI2C_MSG_SUCCESS) - { - LOG_E("FI2cMsgMasterVirtProbe write failed, ret = %d", ret); - } + LOG_E("FI2cMsgMasterVirtProbe read failed, ret = %d", ret); } + rt_thread_mdelay(5); } - return i; } diff --git a/bsp/phytium/libraries/drivers/drv_i2s.c b/bsp/phytium/libraries/drivers/drv_i2s.c index 1fe7658f18..e8acae887e 100644 --- a/bsp/phytium/libraries/drivers/drv_i2s.c +++ b/bsp/phytium/libraries/drivers/drv_i2s.c @@ -13,52 +13,51 @@ #include <rtthread.h> #include <rtdevice.h> - #include <drv_i2s.h> + #include "fi2s.h" #include "fi2s_hw.h" #include "fddma.h" #include "fddma_hw.h" #include "fddma_bdl.h" -#include "fdevice.h" -#include "fes8336.h" - +#include "interrupt.h" +#include "fio_mux.h" +#include "cache.h" #define DBG_TAG "drv.i2s" #define DBG_LVL DBG_INFO #include <rtdbg.h> -#define PER_BUFFER_SIZE 2048 -#define TX_RX_BUF_LEN 2048 - -static struct phytium_i2s_device i2s_dev0; -extern FI2c master_device; - -static FEs8336Controller fes8336 = -{ - .fes8336_device.name = "es8336", - .dev_type = DEV_TYPE_MIO, - .controller_id = FMIO14_ID, -}; -static const u32 ddma_ctrl_id = FDDMA2_I2S_ID; -static const u32 i2s_ctrl_id = FI2S0_ID; +#ifdef RT_USING_SMART + #include "ioremap.h" +#endif +#define TX_RX_BUF_LEN RT_AUDIO_REPLAY_MP_BLOCK_SIZE +static rt_uint8_t trans_buf[2][TX_RX_BUF_LEN * 4] __attribute__((aligned(FDDMA_DDR_ADDR_ALIGNMENT))) = {0}; +static FDdmaBdlDesc *bdl_desc_list_tx = NULL; +static FDdmaBdlDesc *bdl_desc_list_rx = NULL; +static rt_sem_t tx_done_sem = RT_NULL; +static rt_thread_t audio_tx_thread = RT_NULL; +static rt_thread_t audio_wdg_thread = RT_NULL; +static volatile rt_bool_t audio_running = RT_FALSE; struct phytium_i2s_device { const char *name; - struct rt_audio_device audio; struct rt_audio_configure config; + u32 i2s_ctrl_id; FI2s i2s_ctrl; FI2sConfig i2s_config; + + u32 ddma_ctrl_id; FDdma ddmac; FDdmaConfig ddmac_config; - - rt_uint8_t *rx_fifo; FDdmaChanConfig rx_config; + FDdmaChanConfig tx_config; + rt_uint8_t rx_channel; /* 接收通道为DDMA通道1 */ - rt_uint8_t volume; + rt_uint8_t tx_channel; /* 接收通道为DDMA通道1 */ }; static void FDdmaSetupInterrupt(FDdma *const instance) @@ -68,120 +67,142 @@ static void FDdmaSetupInterrupt(FDdma *const instance) rt_uint32_t cpu_id = rt_hw_cpu_id(); rt_hw_interrupt_set_target_cpus(config->irq_num, cpu_id); - rt_hw_interrupt_set_priority(config->irq_num, 16); - /* register intr callback */ - rt_hw_interrupt_install(config->irq_num, - FDdmaIrqHandler, - instance, - NULL); - - /* enable ddma0 irq */ + rt_hw_interrupt_set_priority(config->irq_num, config->irq_priority); + rt_hw_interrupt_install(config->irq_num, FDdmaIrqHandler, instance, NULL); rt_hw_interrupt_umask(config->irq_num); return; } -static FError FI2sEs8336Init(u32 word_length) +static FError i2s_ddma_init(struct phytium_i2s_device *i2s_dev, u32 word_length, u32 samplerate) { - FError ret = FT_SUCCESS; - u32 volumel = 0x1; - - FIOMuxInit(); + FError ret = FI2S_SUCCESS; + /*Init i2s*/ FIOPadSetI2sMux(); - - ret = FEs8336DevRegister(&fes8336.fes8336_device); - if (FT_SUCCESS != ret) + if (i2s_dev->i2s_ctrl.is_ready != FT_COMPONENT_IS_READY) { - printf("ES8336 dev register failed.\r\n"); - return ret; + i2s_dev->i2s_ctrl.data_config.word_length = word_length; + i2s_dev->i2s_config = *FI2sLookupConfig(i2s_dev->i2s_ctrl_id); +#ifdef RT_USING_SMART + i2s_dev->i2s_config.base_addr = (uintptr)rt_ioremap((void *)i2s_dev->i2s_config.base_addr, 0xd00); +#endif + ret = FI2sCfgInitialize(&i2s_dev->i2s_ctrl, &i2s_dev->i2s_config); + if (FI2S_SUCCESS != ret) + { + printf("Init the i2s failed.\r\n"); + return ret; + } + FI2sClkOutDiv(&i2s_dev->i2s_ctrl, samplerate); } - - ret = FDeviceInit(&fes8336.fes8336_device); - if (FT_SUCCESS != ret) + if (i2s_dev->ddmac.is_ready != FT_COMPONENT_IS_READY) { - printf("ES8336 dev init failed.\r\n"); - return ret; + /*Init ddma*/ + i2s_dev->ddmac_config = *FDdmaLookupConfig(i2s_dev->ddma_ctrl_id); +#ifdef RT_USING_SMART + i2s_dev->ddmac_config.base_addr = (uintptr)rt_ioremap((void *)i2s_dev->ddmac_config.base_addr, 0x1000); +#endif + ret = FDdmaCfgInitialize(&i2s_dev->ddmac, &i2s_dev->ddmac_config); + + if (FI2S_SUCCESS != ret) + { + printf("DDMA config initialization failed.\r\n"); + return ret; + } + FDdmaSetupInterrupt(&i2s_dev->ddmac); } + return ret; +} + +static FError FI2sDdmaDeviceRX(struct phytium_i2s_device *i2s_dev, uintptr src, fsize_t total_bytes, fsize_t per_buff_len) +{ + FError ret = FI2S_SUCCESS; + fsize_t bdl_num = total_bytes / per_buff_len; - ret = FDeviceOpen(&fes8336.fes8336_device, FDEVICE_FLAG_RDWR); - if (FT_SUCCESS != ret) + rt_hw_cpu_dcache_invalidate((void *)src, total_bytes); +#ifdef RT_USING_SMART + src = (uintptr)rt_kmem_v2p((void *)src); +#endif + for (u32 chan = FDDMA_CHAN_0; chan < FDDMA_NUM_OF_CHAN; chan++) { - printf("ES8336 dev open failed.\r\n"); - return ret; + FDdmaClearChanIrq(i2s_dev->ddmac_config.base_addr, chan, i2s_dev->ddmac_config.caps); } - ret = FDeviceControl(&fes8336.fes8336_device, FES8336_SET_FORMAT, &word_length); /* 设置ES8336工作模式 */ - if (FT_SUCCESS != ret) + if (bdl_desc_list_rx == NULL) { - printf("Set the ES8336 word length failed.\r\n"); - return ret; + bdl_desc_list_rx = rt_malloc_align(bdl_num * sizeof(FDdmaBdlDesc), FDDMA_BDL_ADDR_ALIGNMENT); } + rt_memset(bdl_desc_list_rx, 0, bdl_num * sizeof(FDdmaBdlDesc)); - ret = FDeviceControl(&fes8336.fes8336_device, FES8336_SET_VOLUMEL, &volumel); /* 设置ES8336工作模式 */ - if (FT_SUCCESS != ret) + FDdmaBdlDescConfig *bdl_desc_config = rt_calloc(1, bdl_num * sizeof(FDdmaBdlDescConfig)); + if ((NULL == bdl_desc_config)) { - printf("Set the ES8336 volumel failed.\r\n"); - return ret; + printf("FDdmaBdlDescConfig allocate failed.\r\n"); + return FDDMA_ERR_IS_USED; } - return ret; -} - -static FError FI2sRxInit(struct phytium_i2s_device *i2s_dev, u32 word_length) -{ - FError ret = FI2S_SUCCESS; - - memset(&i2s_dev->i2s_ctrl, 0, sizeof(FI2s)); - memset(&i2s_dev->i2s_ctrl, 0, sizeof(FI2sConfig)); - i2s_dev->i2s_ctrl.data_config.word_length = word_length; - i2s_dev->i2s_config = *FI2sLookupConfig(i2s_ctrl_id); - - ret = FI2sCfgInitialize(&i2s_dev->i2s_ctrl, &i2s_dev->i2s_config); - if (FI2S_SUCCESS != ret) + for (fsize_t loop = 0; loop < bdl_num; loop++) { - printf("Init the i2s failed.\r\n"); - return ret; + bdl_desc_config[loop].current_desc_num = loop; + bdl_desc_config[loop].src_addr = (uintptr)(src + per_buff_len * loop); + bdl_desc_config[loop].trans_length = per_buff_len; } + bdl_desc_config[bdl_num - 1].ioc = TRUE; - FI2sClkOutDiv(&i2s_dev->i2s_ctrl, i2s_dev->config.samplerate); - FI2sTxRxEnable(&i2s_dev->i2s_ctrl, TRUE); /* 模块使能 */ - return ret; -} + for (fsize_t loop = 0; loop < bdl_num; loop++) + { + FDdmaBDLSetDesc(bdl_desc_list_rx, &bdl_desc_config[loop]); + } -static FError FI2sRxDdmaInit(struct phytium_i2s_device *i2s_dev) -{ - FError ret = FI2S_SUCCESS; - i2s_dev->ddmac_config = *FDdmaLookupConfig(ddma_ctrl_id); + i2s_dev->rx_config.slave_id = 0U; + i2s_dev->rx_config.req_mode = FI2S_PCM_STREAM_CAPTURE; + i2s_dev->rx_config.ddr_addr = src; +#ifdef RT_USING_SMART + i2s_dev->rx_config.dev_addr = (uintptr)rt_kmem_v2p((void *)i2s_dev->i2s_config.base_addr) + FI2S_RXDMA; +#else + i2s_dev->rx_config.dev_addr = i2s_dev->i2s_config.base_addr + FI2S_RXDMA; +#endif + i2s_dev->rx_config.trans_len = total_bytes; + i2s_dev->rx_config.timeout = 0xffff; +#ifdef RT_USING_SMART + i2s_dev->rx_config.first_desc_paddr = (uintptr)rt_kmem_v2p(bdl_desc_list_rx); +#else + i2s_dev->rx_config.first_desc_paddr = (uintptr)bdl_desc_list_rx; +#endif + i2s_dev->rx_config.first_desc_vaddr = (uintptr)bdl_desc_list_rx; + i2s_dev->rx_config.valid_desc_num = bdl_num; + ret = FDdmaChanBdlConfigure(&i2s_dev->ddmac, i2s_dev->rx_channel, &i2s_dev->rx_config); - ret = FDdmaCfgInitialize(&i2s_dev->ddmac, &i2s_dev->ddmac_config); - if (FI2S_SUCCESS != ret) + if (ret != FI2S_SUCCESS) { - printf("DDMA config initialization failed.\r\n"); + printf("DDMA BDL configure failer.\r\n"); return ret; } + rt_free(bdl_desc_config); + return ret; } -static FError FI2sDdmaDeviceRX(struct phytium_i2s_device *i2s_dev, u32 work_mode, const void *src, fsize_t total_bytes, fsize_t per_buff_len) +static FError FI2sDdmaDeviceTX(struct phytium_i2s_device *i2s_dev, uintptr src, fsize_t total_bytes, fsize_t per_buff_len) { FError ret = FI2S_SUCCESS; fsize_t bdl_num = total_bytes / per_buff_len; - rt_hw_cpu_dcache_clean((uintptr)src, total_bytes); + rt_hw_cpu_dcache_invalidate((void *)src, total_bytes); - for (u32 chan = FDDMA_CHAN_0; chan < FDDMA_NUM_OF_CHAN; chan++) /* 清除中断 */ +#ifdef RT_USING_SMART + src = (uintptr)rt_kmem_v2p((void *)src); +#endif + for (u32 chan = FDDMA_CHAN_0; chan < FDDMA_NUM_OF_CHAN; chan++) { FDdmaClearChanIrq(i2s_dev->ddmac_config.base_addr, chan, i2s_dev->ddmac_config.caps); } - FDdmaBdlDesc *bdl_desc_list = rt_malloc_align(bdl_num * sizeof(FDdmaBdlDesc), FDDMA_BDL_ADDR_ALIGMENT); /* DDMA描述符首地址需128字节对齐 */ - if ((NULL == bdl_desc_list)) + if (bdl_desc_list_tx == NULL) { - printf("FDdmaBdlDesc allocate failed.\r\n"); - return FDDMA_ERR_IS_USED; + bdl_desc_list_tx = rt_malloc_align(bdl_num * sizeof(FDdmaBdlDesc), FDDMA_BDL_ADDR_ALIGNMENT); } - memset(bdl_desc_list, 0, bdl_num * sizeof(FDdmaBdlDesc)); + rt_memset(bdl_desc_list_tx, 0, bdl_num * sizeof(FDdmaBdlDesc)); FDdmaBdlDescConfig *bdl_desc_config = rt_calloc(1, bdl_num * sizeof(FDdmaBdlDescConfig)); if ((NULL == bdl_desc_config)) @@ -189,32 +210,43 @@ static FError FI2sDdmaDeviceRX(struct phytium_i2s_device *i2s_dev, u32 work_mode printf("FDdmaBdlDescConfig allocate failed.\r\n"); return FDDMA_ERR_IS_USED; } - /* set BDL descriptors */ + for (fsize_t loop = 0; loop < bdl_num; loop++) { bdl_desc_config[loop].current_desc_num = loop; bdl_desc_config[loop].src_addr = (uintptr)(src + per_buff_len * loop); bdl_desc_config[loop].trans_length = per_buff_len; } - bdl_desc_config[bdl_num -1].ioc = TRUE; - /* set BDL descriptor list with descriptor configs */ - for (fsize_t loop = 0; loop < bdl_num; loop++) + bdl_desc_config[bdl_num - 1].ioc = TRUE; + + for (fsize_t loop = 0; loop < bdl_num; loop++) { - FDdmaBDLSetDesc(bdl_desc_list, &bdl_desc_config[loop]); + FDdmaBDLSetDesc(bdl_desc_list_tx, &bdl_desc_config[loop]); } - i2s_dev->rx_config.slave_id = 0U, - i2s_dev->rx_config.req_mode = AUDIO_PCM_STREAM_CAPTURE; - i2s_dev->rx_config.ddr_addr = (uintptr)src; - i2s_dev->rx_config.dev_addr = i2s_dev->i2s_config.base_addr + FI2S_RXDMA ; - i2s_dev->rx_config.trans_len = total_bytes; - i2s_dev->rx_config.timeout = 0xffff, - i2s_dev->rx_config.first_desc_addr = (uintptr)bdl_desc_list; - i2s_dev->rx_config.valid_desc_num = bdl_num; + i2s_dev->tx_config.slave_id = 0U; + i2s_dev->tx_config.req_mode = FI2S_PCM_STREAM_PLAYBACK; + i2s_dev->tx_config.ddr_addr = src; - ret = FDdmaChanBdlConfigure(&i2s_dev->ddmac, i2s_dev->rx_channel, &i2s_dev->rx_config); +#ifdef RT_USING_SMART + i2s_dev->tx_config.dev_addr = (uintptr)rt_kmem_v2p((void *)i2s_dev->i2s_config.base_addr) + FI2S_TXDMA; +#else + i2s_dev->tx_config.dev_addr = i2s_dev->i2s_config.base_addr + FI2S_TXDMA; +#endif - if (ret != FI2S_SUCCESS) + i2s_dev->tx_config.trans_len = total_bytes; + i2s_dev->tx_config.timeout = 0xffff; + +#ifdef RT_USING_SMART + i2s_dev->tx_config.first_desc_paddr = (uintptr)rt_kmem_v2p(bdl_desc_list_tx); +#else + i2s_dev->tx_config.first_desc_paddr = (uintptr)bdl_desc_list_tx; +#endif + i2s_dev->tx_config.first_desc_vaddr = (uintptr)bdl_desc_list_tx; + i2s_dev->tx_config.valid_desc_num = bdl_num; + ret = FDdmaChanBdlConfigure(&i2s_dev->ddmac, i2s_dev->tx_channel, &i2s_dev->tx_config); + + if (ret != FI2S_SUCCESS) { printf("DDMA BDL configure failer.\r\n"); return ret; @@ -224,18 +256,28 @@ static FError FI2sDdmaDeviceRX(struct phytium_i2s_device *i2s_dev, u32 work_mode return ret; } -void dma_transfer_callback(void *args) +void dma_rx_channel_transfer_callback(FDdmaChanIrq *irq, void *args) { -#if defined(RT_USING_I2S0) - rt_audio_rx_done(&i2s_dev0.audio, &i2s_dev0.rx_fifo[0], TX_RX_BUF_LEN); -#endif + struct phytium_i2s_device *i2s_dev = (struct phytium_i2s_device *)args; + rt_audio_rx_done(&i2s_dev->audio, + trans_buf[i2s_dev->rx_channel], + TX_RX_BUF_LEN); + + FI2sDdmaDeviceRX(i2s_dev, + (uintptr)trans_buf[i2s_dev->rx_channel], + TX_RX_BUF_LEN, + TX_RX_BUF_LEN); +} + +void dma_tx_channel_transfer_callback(FDdmaChanIrq *irq, void *args) +{ + rt_sem_release(tx_done_sem); } static rt_err_t i2s_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps) { rt_err_t result = RT_EOK; struct phytium_i2s_device *i2s_dev; - RT_ASSERT(audio != RT_NULL); i2s_dev = (struct phytium_i2s_device *)audio->parent.user_data; @@ -268,15 +310,15 @@ static rt_err_t i2s_getcaps(struct rt_audio_device *audio, struct rt_audio_caps break; case AUDIO_DSP_SAMPLERATE: - caps->udata.config.samplerate = i2s_dev->config.samplerate; + caps->udata.config.samplerate = caps->udata.config.samplerate; break; case AUDIO_DSP_CHANNELS: - caps->udata.config.channels = i2s_dev->config.channels; + caps->udata.config.channels = caps->udata.config.channels; break; case AUDIO_DSP_SAMPLEBITS: - caps->udata.config.samplebits = i2s_dev->config.samplebits; + caps->udata.config.samplebits = caps->udata.config.samplebits; break; default: @@ -296,7 +338,6 @@ static rt_err_t i2s_getcaps(struct rt_audio_device *audio, struct rt_audio_caps break; case AUDIO_MIXER_VOLUME: - caps->udata.value = i2s_dev->volume; break; default: @@ -315,75 +356,77 @@ static rt_err_t i2s_getcaps(struct rt_audio_device *audio, struct rt_audio_caps return result; } -static rt_err_t i2s_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps) +static void i2s_set_word_length(struct phytium_i2s_device *dev, rt_uint32_t bits) { - rt_err_t result = RT_EOK; - struct phytium_i2s_device *i2s_dev; - struct rt_audio_replay *replay; - - RT_ASSERT(audio != RT_NULL); - i2s_dev = (struct phytium_i2s_device *)audio->parent.user_data; - - switch (caps->main_type) + switch (bits) { - case AUDIO_TYPE_INPUT: - { - switch (caps->sub_type) - { - case AUDIO_DSP_PARAM: - { - struct rt_audio_configure config = caps->udata.config; - i2s_dev->config.channels = config.channels; - i2s_dev->config.samplebits = config.samplebits; - i2s_dev->config.samplerate = config.samplerate; - } + case 16: + dev->i2s_ctrl.data_config.word_length = + FI2S_PCM_STREAM_WORD_LENGTH_16; + break; - default: - result = -RT_ERROR; - break; - } + case 24: + dev->i2s_ctrl.data_config.word_length = + FI2S_PCM_STREAM_WORD_LENGTH_24; + break; + case 32: + dev->i2s_ctrl.data_config.word_length = + FI2S_PCM_STREAM_WORD_LENGTH_32; break; - } default: + dev->i2s_ctrl.data_config.word_length = + FI2S_PCM_STREAM_WORD_LENGTH_16; break; } - return result; } -static rt_err_t i2s_init(struct rt_audio_device *audio) +static rt_err_t i2s_configure(struct rt_audio_device *audio, + struct rt_audio_caps *caps) { struct phytium_i2s_device *i2s_dev; RT_ASSERT(audio != RT_NULL); i2s_dev = (struct phytium_i2s_device *)audio->parent.user_data; - FError ret = FT_SUCCESS; - u32 word_length = i2s_dev->config.samplebits; /* 16-bits word length */ - - FI2sEs8336Init(word_length); - if (FT_SUCCESS != ret) + if (caps->main_type == AUDIO_TYPE_OUTPUT) { - printf("Init the escodec failed.\r\n"); - return ret; - } - ret = FI2sRxDdmaInit(i2s_dev); - if (FT_SUCCESS != ret) - { - printf("Init DDMA-2 failed.\r\n"); - return ret; + switch (caps->sub_type) + { + case AUDIO_DSP_PARAM: + i2s_dev->config.samplerate = caps->udata.config.samplerate; + i2s_dev->config.samplebits = caps->udata.config.samplebits; + i2s_dev->config.channels = caps->udata.config.channels; + i2s_set_word_length(i2s_dev, caps->udata.config.samplebits); + break; + case AUDIO_DSP_SAMPLERATE: + i2s_dev->config.samplerate = caps->udata.config.samplerate; + break; + + case AUDIO_DSP_SAMPLEBITS: + i2s_dev->config.samplebits = caps->udata.config.samplebits; + i2s_set_word_length(i2s_dev, caps->udata.config.samplebits); + + break; + + case AUDIO_DSP_CHANNELS: + /* TODO */ + break; + + default: + break; + } + FI2sClkOutDiv(&i2s_dev->i2s_ctrl, i2s_dev->config.samplerate); + } - ret = FI2sRxInit(i2s_dev, word_length); - if (FI2S_SUCCESS != ret) + else if (caps->main_type == AUDIO_TYPE_MIXER) { - printf("Init the I2S failed.\r\n"); - return ret; + if (caps->sub_type == AUDIO_MIXER_VOLUME) + { + /* TODO */ + } } - FDdmaSetupInterrupt(&i2s_dev->ddmac); - - FDdmaRegisterChanEvtHandler(&i2s_dev->ddmac, i2s_dev->rx_channel, FDDMA_CHAN_EVT_REQ_DONE, dma_transfer_callback, (void *)i2s_dev); - - return ret; + return RT_EOK; } static rt_err_t i2s_start(struct rt_audio_device *audio, int stream) @@ -391,31 +434,117 @@ static rt_err_t i2s_start(struct rt_audio_device *audio, int stream) struct phytium_i2s_device *i2s_dev; RT_ASSERT(audio != RT_NULL); i2s_dev = (struct phytium_i2s_device *)audio->parent.user_data; + i2s_ddma_init(i2s_dev, FI2S_PCM_STREAM_WORD_LENGTH_16, FI2S_SAMPLE_RATE_CD); + i2s_dev->rx_channel = 1; + i2s_dev->tx_channel = 0; + FI2sTxRxEnable(&i2s_dev->i2s_ctrl, TRUE); /* 模块使能 */ + audio_running = RT_TRUE; if (stream == AUDIO_STREAM_REPLAY) { + FDdmaRegisterChanEvtHandler(&i2s_dev->ddmac, i2s_dev->tx_channel, FDDMA_CHAN_EVT_REQ_DONE, dma_tx_channel_transfer_callback, i2s_dev); } else if(stream == AUDIO_STREAM_RECORD) { - FI2sDdmaDeviceRX(i2s_dev, AUDIO_PCM_STREAM_CAPTURE, &i2s_dev->rx_fifo[0], TX_RX_BUF_LEN, PER_BUFFER_SIZE); + rt_uint8_t *rx_buf = trans_buf[i2s_dev->rx_channel]; + FI2sDdmaDeviceRX(i2s_dev, (uintptr)rx_buf, TX_RX_BUF_LEN, TX_RX_BUF_LEN); + FDdmaRegisterChanEvtHandler(&i2s_dev->ddmac, i2s_dev->rx_channel, FDDMA_CHAN_EVT_REQ_DONE, dma_rx_channel_transfer_callback, i2s_dev); FDdmaChanActive(&i2s_dev->ddmac, i2s_dev->rx_channel); + FDdmaStart(&i2s_dev->ddmac); + } + return RT_EOK; +} + +static rt_err_t i2s_stop(struct rt_audio_device *audio, int stream) +{ + struct phytium_i2s_device *i2s_dev; + RT_ASSERT(audio != RT_NULL); + i2s_dev = (struct phytium_i2s_device *)audio->parent.user_data; + audio_running = RT_FALSE; + if (i2s_dev->i2s_ctrl.is_ready == FT_COMPONENT_IS_READY) + { + FI2sStopWork(&i2s_dev->i2s_ctrl); + FI2sDeInitialize(&i2s_dev->i2s_ctrl); + } + if (i2s_dev->ddmac.is_ready == FT_COMPONENT_IS_READY) + { + FDdmaStop(&i2s_dev->ddmac); + FDdmaDisableChanIrq(i2s_dev->ddmac.config.base_addr, i2s_dev->rx_channel, i2s_dev->ddmac.config.caps); + FDdmaDisableChanIrq(i2s_dev->ddmac.config.base_addr, i2s_dev->tx_channel, i2s_dev->ddmac.config.caps); + FDdmaDeInitialize(&i2s_dev->ddmac); } - FDdmaStart(&i2s_dev->ddmac); + if (bdl_desc_list_tx) + { + rt_free(bdl_desc_list_tx); + bdl_desc_list_tx = NULL; + } + if (bdl_desc_list_rx) + { + rt_free(bdl_desc_list_rx); + bdl_desc_list_rx = NULL; + } + rt_data_queue_reset(&audio->replay->queue); return RT_EOK; } -static rt_err_t i2s_stop(struct rt_audio_device *audio, int stream) +static rt_err_t i2s_init(struct rt_audio_device* audio) { struct phytium_i2s_device *i2s_dev; RT_ASSERT(audio != RT_NULL); i2s_dev = (struct phytium_i2s_device *)audio->parent.user_data; + i2s_ddma_init(i2s_dev, FI2S_PCM_STREAM_WORD_LENGTH_16, FI2S_SAMPLE_RATE_CD); return RT_EOK; } +static void audio_tx_thread_entry(void *parameter) +{ + struct rt_audio_device *audio = parameter; + struct phytium_i2s_device *i2s_dev; + RT_ASSERT(audio != RT_NULL); + i2s_dev = (struct phytium_i2s_device *)audio->parent.user_data; + while (1) + { + if (!audio_running) + { + rt_thread_mdelay(20); + continue; + } + rt_uint8_t *data = RT_NULL; + rt_size_t size = 0; + if (rt_data_queue_pop(&audio->replay->queue, (const void **)&data, &size, 100) == RT_EOK) + { + rt_memcpy(trans_buf[i2s_dev->tx_channel], data, size); + FI2sDdmaDeviceTX(i2s_dev, (uintptr)trans_buf[i2s_dev->tx_channel], size, size); + FDdmaChanActive(&i2s_dev->ddmac, i2s_dev->tx_channel); + FDdmaStart(&i2s_dev->ddmac); + rt_sem_take(tx_done_sem, 100); + rt_mp_free(data); + } + } +} + +static void audio_wdg_thread_entry(void *p) +{ + struct rt_audio_device *audio = p; + while (1) + { + if (!audio_running) + { + rt_thread_mdelay(20); + continue; + } + rt_thread_mdelay(10); + if (audio->replay->event & 0x02) + { + rt_completion_done(&audio->replay->cmp); + } + } +} + static struct rt_audio_ops i2s_ops = { .getcaps = i2s_getcaps, @@ -430,29 +559,52 @@ static struct rt_audio_ops i2s_ops = static int i2s_controller_init(struct phytium_i2s_device *i2s_dev) { struct rt_audio_device *audio = &i2s_dev->audio; - - i2s_dev->rx_fifo = rt_calloc(1, TX_RX_BUF_LEN); - if (i2s_dev->rx_fifo == RT_NULL) + i2s_dev->audio.ops = &i2s_ops; + if (audio_tx_thread == RT_NULL) { - return -RT_ENOMEM; + audio_tx_thread = rt_thread_create("audio_tx", + audio_tx_thread_entry, + audio, // parameter + 4096, // stack size + 20, // priority + 10); // tick + if (audio_tx_thread) + rt_thread_startup(audio_tx_thread); } + if (audio_wdg_thread == RT_NULL) + { + audio_wdg_thread = rt_thread_create( + "audio_wdg", + audio_wdg_thread_entry, + audio, + 2048, + 15, + 10); + if (audio_wdg_thread) + rt_thread_startup(audio_wdg_thread); + } + tx_done_sem = rt_sem_create("tx_done", 0, RT_IPC_FLAG_FIFO); - i2s_dev->audio.ops = &i2s_ops; - int ret = rt_audio_register(audio, i2s_dev->name, RT_DEVICE_FLAG_RDONLY, (void *)i2s_dev); + int ret = rt_audio_register(audio, i2s_dev->name, RT_DEVICE_FLAG_RDWR, (void *)i2s_dev); RT_ASSERT(RT_EOK == ret); LOG_D("i2s_controller_init i2s bus reg success. \n"); return ret; } +#if defined(RT_USING_I2S0) + static struct phytium_i2s_device i2s_dev0; +#endif + int rt_hw_i2s_init(void) { #if defined(RT_USING_I2S0) i2s_dev0.name = "I2S0"; - i2s_dev0.i2s_ctrl.config.instance_id = FI2S0_ID; i2s_dev0.config.channels = 1; - i2s_dev0.config.samplerate = RT_I2S_SAMPLERATE; - i2s_dev0.config.samplebits = RT_I2S_SAMPLEBITS; + i2s_dev0.config.samplerate = FI2S_SAMPLE_RATE_CD; + i2s_dev0.config.samplebits = FI2S_PCM_STREAM_WORD_LENGTH_16; + i2s_dev0.ddma_ctrl_id = FDDMA2_I2S_ID; + i2s_dev0.i2s_ctrl_id = FI2S0_ID; i2s_controller_init(&i2s_dev0); #endif diff --git a/bsp/phytium/libraries/drivers/drv_i2s_msg.c b/bsp/phytium/libraries/drivers/drv_i2s_msg.c new file mode 100644 index 0000000000..95192ba4f8 --- /dev/null +++ b/bsp/phytium/libraries/drivers/drv_i2s_msg.c @@ -0,0 +1,613 @@ +/* + * Copyright (c) 2006-2025, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Email: [email protected] + * + * Change Logs: + * Date Author Notes + * 2025-01-21 zhangyan first version + * + */ + +#include <rtthread.h> +#include <rtdevice.h> +#include <drv_i2s.h> + +#include "fi2s_msg.h" +#include "fi2s_msg_hw.h" +#include "fddma.h" +#include "fddma_hw.h" +#include "fddma_bdl.h" +#include "interrupt.h" +#include "fio_mux.h" +#include "cache.h" +#define DBG_TAG "drv.i2s" +#define DBG_LVL DBG_INFO +#include <rtdbg.h> + +#ifdef RT_USING_SMART + #include "ioremap.h" +#endif + +#define TX_RX_BUF_LEN RT_AUDIO_REPLAY_MP_BLOCK_SIZE +static rt_uint8_t trans_buf[2][TX_RX_BUF_LEN * 4] __attribute__((aligned(FDDMA_DDR_ADDR_ALIGNMENT))) = {0}; +static FDdmaBdlDesc *bdl_desc_list_tx = NULL; +static FDdmaBdlDesc *bdl_desc_list_rx = NULL; +static rt_sem_t tx_done_sem = RT_NULL; +static rt_thread_t audio_tx_thread = RT_NULL; +static rt_thread_t audio_wdg_thread = RT_NULL; +static volatile rt_bool_t audio_running = RT_FALSE; + +struct phytium_i2s_device +{ + const char *name; + struct rt_audio_device audio; + struct rt_audio_configure config; + + u32 i2s_msg_ctrl_id; + FI2sMsgCtrl i2s_msg_ctrl; + FI2sMsgConfig i2s_msg_config; + + u32 ddma_ctrl_id; + FDdma ddmac; + FDdmaConfig ddmac_config; + FDdmaChanConfig rx_config; + FDdmaChanConfig tx_config; + + rt_uint8_t rx_channel; /* 接收通道为DDMA通道1 */ + rt_uint8_t tx_channel; /* 接收通道为DDMA通道1 */ +}; + +static void FDdmaSetupInterrupt(FDdma *const instance) +{ + FASSERT(instance); + FDdmaConfig *config = &instance->config; + + rt_uint32_t cpu_id = rt_hw_cpu_id(); + rt_hw_interrupt_set_target_cpus(config->irq_num, cpu_id); + rt_hw_interrupt_set_priority(config->irq_num, config->irq_priority); + rt_hw_interrupt_install(config->irq_num, FDdmaIrqHandler, instance, NULL); + rt_hw_interrupt_umask(config->irq_num); + + return; +} + +static FError i2s_ddma_init(struct phytium_i2s_device *i2s_dev) +{ + FError ret = FI2S_MSG_SUCCESS; + /*Init i2s*/ + if (i2s_dev->i2s_msg_ctrl.is_ready != FT_COMPONENT_IS_READY) + { + i2s_dev->i2s_msg_config = *FI2sMsgLookupConfig(i2s_dev->i2s_msg_ctrl_id); +#ifdef RT_USING_SMART + i2s_dev->i2s_msg_config.msg.shmem = (uintptr)rt_ioremap((void *)i2s_dev->i2s_msg_config.msg.shmem, 0x1000); + i2s_dev->i2s_msg_config.msg.regfile= (uintptr)rt_ioremap((void *)i2s_dev->i2s_msg_config.msg.regfile, 0x1000); +#endif + ret = FI2sMsgCfgInitialize(&i2s_dev->i2s_msg_ctrl, &i2s_dev->i2s_msg_config); + if (FI2S_MSG_SUCCESS != ret) + { + printf("Init the i2s failed.\r\n"); + return ret; + } + FI2sMsgHwSetParams(&i2s_dev->i2s_msg_ctrl, FI2S_DIRECTION_PLAYBACK, FI2S_SAMPLE_RATE_CD, 2, TRUE); + FI2sMsgHwSetParams(&i2s_dev->i2s_msg_ctrl, FI2S_DIRECTION_CAPTURE, FI2S_SAMPLE_RATE_CD, 2, TRUE); + } + if (i2s_dev->ddmac.is_ready != FT_COMPONENT_IS_READY) + { + /*Init ddma*/ + i2s_dev->ddmac_config = *FDdmaLookupConfig(i2s_dev->ddma_ctrl_id); +#ifdef RT_USING_SMART + i2s_dev->ddmac_config.base_addr = (uintptr)rt_ioremap((void *)i2s_dev->ddmac_config.base_addr, 0x1000); +#endif + ret = FDdmaCfgInitialize(&i2s_dev->ddmac, &i2s_dev->ddmac_config); + + if (FI2S_MSG_SUCCESS != ret) + { + printf("DDMA config initialization failed.\r\n"); + return ret; + } + FDdmaSetupInterrupt(&i2s_dev->ddmac); + } + return ret; +} + +static FError FI2sDdmaDeviceRX(struct phytium_i2s_device *i2s_dev, uintptr src, fsize_t total_bytes, fsize_t per_buff_len) +{ + FError ret = FI2S_MSG_SUCCESS; + fsize_t bdl_num = total_bytes / per_buff_len; + + rt_hw_cpu_dcache_invalidate((void *)src, total_bytes); +#ifdef RT_USING_SMART + src = (uintptr)rt_kmem_v2p((void *)src); +#endif + for (u32 chan = FDDMA_CHAN_0; chan < FDDMA_NUM_OF_CHAN; chan++) + { + FDdmaClearChanIrq(i2s_dev->ddmac_config.base_addr, chan, i2s_dev->ddmac_config.caps); + } + + if (bdl_desc_list_rx == NULL) + { + bdl_desc_list_rx = rt_malloc_align(bdl_num * sizeof(FDdmaBdlDesc), FDDMA_BDL_ADDR_ALIGNMENT); + } + rt_memset(bdl_desc_list_rx, 0, bdl_num * sizeof(FDdmaBdlDesc)); + + FDdmaBdlDescConfig *bdl_desc_config = rt_calloc(1, bdl_num * sizeof(FDdmaBdlDescConfig)); + if ((NULL == bdl_desc_config)) + { + printf("FDdmaBdlDescConfig allocate failed.\r\n"); + return FDDMA_ERR_IS_USED; + } + + for (fsize_t loop = 0; loop < bdl_num; loop++) + { + bdl_desc_config[loop].current_desc_num = loop; + bdl_desc_config[loop].src_addr = (uintptr)(src + per_buff_len * loop); + bdl_desc_config[loop].trans_length = per_buff_len; + } + bdl_desc_config[bdl_num - 1].ioc = TRUE; + + for (fsize_t loop = 0; loop < bdl_num; loop++) + { + FDdmaBDLSetDesc(bdl_desc_list_rx, &bdl_desc_config[loop]); + } + + i2s_dev->rx_config.slave_id = 0U; + i2s_dev->rx_config.req_mode = FI2S_PCM_STREAM_CAPTURE; + i2s_dev->rx_config.ddr_addr = src; + i2s_dev->rx_config.dev_addr = FI2S_LSD_BASE + FI2S_CAPTURE_ADDRESS_OFFSET; + i2s_dev->rx_config.trans_len = total_bytes; + i2s_dev->rx_config.timeout = 0xffff; +#ifdef RT_USING_SMART + i2s_dev->rx_config.first_desc_paddr = (uintptr)rt_kmem_v2p(bdl_desc_list_rx); +#else + i2s_dev->rx_config.first_desc_paddr = (uintptr)bdl_desc_list_rx; +#endif + i2s_dev->rx_config.first_desc_vaddr = (uintptr)bdl_desc_list_rx; + i2s_dev->rx_config.valid_desc_num = bdl_num; + ret = FDdmaChanBdlConfigure(&i2s_dev->ddmac, i2s_dev->rx_channel, &i2s_dev->rx_config); + + if (ret != FI2S_MSG_SUCCESS) + { + printf("DDMA BDL configure failer.\r\n"); + return ret; + } + + rt_free(bdl_desc_config); + + return ret; +} + +static FError FI2sDdmaDeviceTX(struct phytium_i2s_device *i2s_dev, uintptr src, fsize_t total_bytes, fsize_t per_buff_len) +{ + FError ret = FI2S_MSG_SUCCESS; + fsize_t bdl_num = total_bytes / per_buff_len; + + rt_hw_cpu_dcache_invalidate((void *)src, total_bytes); + +#ifdef RT_USING_SMART + src = (uintptr)rt_kmem_v2p((void *)src); +#endif + for (u32 chan = FDDMA_CHAN_0; chan < FDDMA_NUM_OF_CHAN; chan++) + { + FDdmaClearChanIrq(i2s_dev->ddmac_config.base_addr, chan, i2s_dev->ddmac_config.caps); + } + + if (bdl_desc_list_tx == NULL) + { + bdl_desc_list_tx = rt_malloc_align(bdl_num * sizeof(FDdmaBdlDesc), FDDMA_BDL_ADDR_ALIGNMENT); + } + rt_memset(bdl_desc_list_tx, 0, bdl_num * sizeof(FDdmaBdlDesc)); + + FDdmaBdlDescConfig *bdl_desc_config = rt_calloc(1, bdl_num * sizeof(FDdmaBdlDescConfig)); + if ((NULL == bdl_desc_config)) + { + printf("FDdmaBdlDescConfig allocate failed.\r\n"); + return FDDMA_ERR_IS_USED; + } + + for (fsize_t loop = 0; loop < bdl_num; loop++) + { + bdl_desc_config[loop].current_desc_num = loop; + bdl_desc_config[loop].src_addr = (uintptr)(src + per_buff_len * loop); + bdl_desc_config[loop].trans_length = per_buff_len; + } + bdl_desc_config[bdl_num - 1].ioc = TRUE; + + for (fsize_t loop = 0; loop < bdl_num; loop++) + { + FDdmaBDLSetDesc(bdl_desc_list_tx, &bdl_desc_config[loop]); + } + + i2s_dev->tx_config.slave_id = 0U; + i2s_dev->tx_config.req_mode = FI2S_PCM_STREAM_PLAYBACK; + i2s_dev->tx_config.ddr_addr = src; + i2s_dev->tx_config.dev_addr = FI2S_LSD_BASE + FI2S_PLAYBACK_ADDRESS_OFFSET; + i2s_dev->tx_config.trans_len = total_bytes; + i2s_dev->tx_config.timeout = 0xffff; + +#ifdef RT_USING_SMART + i2s_dev->tx_config.first_desc_paddr = (uintptr)rt_kmem_v2p(bdl_desc_list_tx); +#else + i2s_dev->tx_config.first_desc_paddr = (uintptr)bdl_desc_list_tx; +#endif + i2s_dev->tx_config.first_desc_vaddr = (uintptr)bdl_desc_list_tx; + i2s_dev->tx_config.valid_desc_num = bdl_num; + ret = FDdmaChanBdlConfigure(&i2s_dev->ddmac, i2s_dev->tx_channel, &i2s_dev->tx_config); + + if (ret != FI2S_MSG_SUCCESS) + { + printf("DDMA BDL configure failer.\r\n"); + return ret; + } + rt_free(bdl_desc_config); + + return ret; +} + +void dma_rx_channel_transfer_callback(FDdmaChanIrq *irq, void *args) +{ + struct phytium_i2s_device *i2s_dev = (struct phytium_i2s_device *)args; + + rt_audio_rx_done(&i2s_dev->audio, + trans_buf[i2s_dev->rx_channel], + TX_RX_BUF_LEN); + + FI2sDdmaDeviceRX(i2s_dev, + (uintptr)trans_buf[i2s_dev->rx_channel], + TX_RX_BUF_LEN, + TX_RX_BUF_LEN); +} + +void dma_tx_channel_transfer_callback(FDdmaChanIrq *irq, void *args) +{ + rt_sem_release(tx_done_sem); +} + +static rt_err_t i2s_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps) +{ + rt_err_t result = RT_EOK; + struct phytium_i2s_device *i2s_dev; + RT_ASSERT(audio != RT_NULL); + i2s_dev = (struct phytium_i2s_device *)audio->parent.user_data; + + switch (caps->main_type) + { + case AUDIO_TYPE_QUERY: /* qurey the types of hw_codec device */ + { + switch (caps->sub_type) + { + case AUDIO_TYPE_QUERY: + caps->udata.mask = AUDIO_TYPE_OUTPUT | AUDIO_TYPE_MIXER; + break; + + default: + result = -RT_ERROR; + break; + } + + break; + } + + case AUDIO_TYPE_OUTPUT: /* Provide capabilities of OUTPUT unit */ + { + switch (caps->sub_type) + { + case AUDIO_DSP_PARAM: + caps->udata.config.samplerate = i2s_dev->config.samplerate; + caps->udata.config.channels = i2s_dev->config.channels; + caps->udata.config.samplebits = i2s_dev->config.samplebits; + break; + + case AUDIO_DSP_SAMPLERATE: + caps->udata.config.samplerate = caps->udata.config.samplerate; + break; + + case AUDIO_DSP_CHANNELS: + caps->udata.config.channels = caps->udata.config.channels; + break; + + case AUDIO_DSP_SAMPLEBITS: + caps->udata.config.samplebits = caps->udata.config.samplebits; + break; + + default: + result = -RT_ERROR; + break; + } + + break; + } + + case AUDIO_TYPE_MIXER: /* report the Mixer Units */ + { + switch (caps->sub_type) + { + case AUDIO_MIXER_QUERY: + caps->udata.mask = AUDIO_MIXER_VOLUME; + break; + + case AUDIO_MIXER_VOLUME: + break; + + default: + result = -RT_ERROR; + break; + } + + break; + } + + default: + result = -RT_ERROR; + break; + } + + return result; +} + +static void i2s_set_word_length(struct phytium_i2s_device *dev, rt_uint32_t bits) +{ + switch (bits) + { + case 16: + dev->i2s_msg_ctrl.data_width = + FI2S_PCM_STREAM_WORD_LENGTH_16; + break; + + case 24: + dev->i2s_msg_ctrl.data_width = + FI2S_PCM_STREAM_WORD_LENGTH_24; + break; + + case 32: + dev->i2s_msg_ctrl.data_width = + FI2S_PCM_STREAM_WORD_LENGTH_32; + break; + + default: + dev->i2s_msg_ctrl.data_width = + FI2S_PCM_STREAM_WORD_LENGTH_16; + break; + } +} + +static rt_err_t i2s_configure(struct rt_audio_device *audio, + struct rt_audio_caps *caps) +{ + struct phytium_i2s_device *i2s_dev; + RT_ASSERT(audio != RT_NULL); + i2s_dev = (struct phytium_i2s_device *)audio->parent.user_data; + if (caps->main_type == AUDIO_TYPE_OUTPUT || caps->main_type == AUDIO_TYPE_INPUT) + { + switch (caps->sub_type) + { + case AUDIO_DSP_PARAM: + i2s_dev->config.samplerate = caps->udata.config.samplerate; + i2s_dev->config.samplebits = caps->udata.config.samplebits; + i2s_dev->config.channels = caps->udata.config.channels; + i2s_set_word_length(i2s_dev, caps->udata.config.samplebits); + break; + + case AUDIO_DSP_SAMPLERATE: + i2s_dev->config.samplerate = caps->udata.config.samplerate; + break; + + case AUDIO_DSP_SAMPLEBITS: + i2s_dev->config.samplebits = caps->udata.config.samplebits; + i2s_set_word_length(i2s_dev, caps->udata.config.samplebits); + break; + + case AUDIO_DSP_CHANNELS: + /* TODO */ + break; + + default: + break; + } + if (caps->main_type == AUDIO_TYPE_OUTPUT) + { + FI2sMsgHwSetParams(&i2s_dev->i2s_msg_ctrl, FI2S_DIRECTION_PLAYBACK, i2s_dev->config.samplerate, i2s_dev->config.channels, TRUE); + } + else + { + FI2sMsgHwSetParams(&i2s_dev->i2s_msg_ctrl, FI2S_DIRECTION_CAPTURE, i2s_dev->config.samplerate, i2s_dev->config.channels, TRUE); + } + } + else if (caps->main_type == AUDIO_TYPE_MIXER) + { + if (caps->sub_type == AUDIO_MIXER_VOLUME) + { + /* TODO */ + } + } + + return RT_EOK; +} + +static rt_err_t i2s_start(struct rt_audio_device *audio, int stream) +{ + struct phytium_i2s_device *i2s_dev; + RT_ASSERT(audio != RT_NULL); + i2s_dev = (struct phytium_i2s_device *)audio->parent.user_data; + i2s_ddma_init(i2s_dev); + i2s_dev->rx_channel = 1; + i2s_dev->tx_channel = 0; + audio_running = RT_TRUE; + + if (stream == AUDIO_STREAM_REPLAY) + { + FDdmaRegisterChanEvtHandler(&i2s_dev->ddmac, i2s_dev->tx_channel, FDDMA_CHAN_EVT_REQ_DONE, dma_tx_channel_transfer_callback, i2s_dev); + FI2sMsgStart(&i2s_dev->i2s_msg_ctrl, FI2S_DIRECTION_PLAYBACK, TRUE); + } + else if(stream == AUDIO_STREAM_RECORD) + { + FI2sMsgStart(&i2s_dev->i2s_msg_ctrl, FI2S_DIRECTION_CAPTURE, TRUE); + rt_uint8_t *rx_buf = trans_buf[i2s_dev->rx_channel]; + FI2sDdmaDeviceRX(i2s_dev, (uintptr)rx_buf, TX_RX_BUF_LEN, TX_RX_BUF_LEN); + FDdmaRegisterChanEvtHandler(&i2s_dev->ddmac, i2s_dev->rx_channel, FDDMA_CHAN_EVT_REQ_DONE, dma_rx_channel_transfer_callback, i2s_dev); + FDdmaChanActive(&i2s_dev->ddmac, i2s_dev->rx_channel); + FDdmaStart(&i2s_dev->ddmac); + } + return RT_EOK; +} + +static rt_err_t i2s_stop(struct rt_audio_device *audio, int stream) +{ + struct phytium_i2s_device *i2s_dev; + RT_ASSERT(audio != RT_NULL); + i2s_dev = (struct phytium_i2s_device *)audio->parent.user_data; + audio_running = RT_FALSE; + if (i2s_dev->i2s_msg_ctrl.is_ready == FT_COMPONENT_IS_READY) + { + FI2sMsgStart(&i2s_dev->i2s_msg_ctrl, FI2S_DIRECTION_PLAYBACK, FALSE); + FI2sMsgStart(&i2s_dev->i2s_msg_ctrl, FI2S_DIRECTION_CAPTURE, FALSE); + FI2sMsgDeInitialize(&i2s_dev->i2s_msg_ctrl); + } + if (i2s_dev->ddmac.is_ready == FT_COMPONENT_IS_READY) + { + FDdmaStop(&i2s_dev->ddmac); + FDdmaDisableChanIrq(i2s_dev->ddmac.config.base_addr, i2s_dev->rx_channel, i2s_dev->ddmac.config.caps); + FDdmaDisableChanIrq(i2s_dev->ddmac.config.base_addr, i2s_dev->tx_channel, i2s_dev->ddmac.config.caps); + FDdmaDeInitialize(&i2s_dev->ddmac); + } + + if (bdl_desc_list_tx) + { + rt_free(bdl_desc_list_tx); + bdl_desc_list_tx = NULL; + } + if (bdl_desc_list_rx) + { + rt_free(bdl_desc_list_rx); + bdl_desc_list_rx = NULL; + } + + rt_data_queue_reset(&audio->replay->queue); + return RT_EOK; +} + +static rt_err_t i2s_init(struct rt_audio_device* audio) +{ + struct phytium_i2s_device *i2s_dev; + RT_ASSERT(audio != RT_NULL); + i2s_dev = (struct phytium_i2s_device *)audio->parent.user_data; + i2s_ddma_init(i2s_dev); + + return RT_EOK; +} + +static void audio_tx_thread_entry(void *parameter) +{ + struct rt_audio_device *audio = parameter; + struct phytium_i2s_device *i2s_dev; + RT_ASSERT(audio != RT_NULL); + i2s_dev = (struct phytium_i2s_device *)audio->parent.user_data; + tx_done_sem = rt_sem_create("tx_done", 0, RT_IPC_FLAG_FIFO); + while (1) + { + if (!audio_running) + { + rt_thread_mdelay(20); + continue; + } + rt_uint8_t *data = RT_NULL; + rt_size_t size = 0; + if (rt_data_queue_pop(&audio->replay->queue, (const void **)&data, &size, 100) == RT_EOK) + { + rt_memcpy(trans_buf[i2s_dev->tx_channel], data, size); + FI2sDdmaDeviceTX(i2s_dev, (uintptr)trans_buf[i2s_dev->tx_channel], size, size); + FDdmaChanActive(&i2s_dev->ddmac, i2s_dev->tx_channel); + FDdmaStart(&i2s_dev->ddmac); + rt_sem_take(tx_done_sem, 100); + rt_mp_free(data); + } + } +} + +static void audio_wdg_thread_entry(void *p) +{ + struct rt_audio_device *audio = p; + while (1) + { + if (!audio_running) + { + rt_thread_mdelay(20); + continue; + } + rt_thread_mdelay(10); + if (audio->replay->event & 0x02) + { + rt_completion_done(&audio->replay->cmp); + } + } +} + +static struct rt_audio_ops i2s_ops = +{ + .getcaps = i2s_getcaps, + .configure = i2s_configure, + .init = i2s_init, + .start = i2s_start, + .stop = i2s_stop, + .transmit = NULL, + .buffer_info = NULL, +}; + +static int i2s_controller_init(struct phytium_i2s_device *i2s_dev) +{ + struct rt_audio_device *audio = &i2s_dev->audio; + i2s_dev->audio.ops = &i2s_ops; + if (audio_tx_thread == RT_NULL) + { + audio_tx_thread = rt_thread_create("audio_tx", + audio_tx_thread_entry, + audio, // parameter + 4096, // stack size + 20, // priority + 10); // tick + if (audio_tx_thread) + rt_thread_startup(audio_tx_thread); + } + if (audio_wdg_thread == RT_NULL) + { + audio_wdg_thread = rt_thread_create( + "audio_wdg", + audio_wdg_thread_entry, + audio, + 2048, + 15, + 10); + if (audio_wdg_thread) + rt_thread_startup(audio_wdg_thread); + } + + int ret = rt_audio_register(audio, i2s_dev->name, RT_DEVICE_FLAG_RDWR, (void *)i2s_dev); + RT_ASSERT(RT_EOK == ret); + LOG_D("i2s_controller_init i2s bus reg success. \n"); + return ret; +} + +#if defined(RT_USING_I2S0_MSG) + static struct phytium_i2s_device i2s_dev0; +#endif + +int rt_hw_i2s_init(void) +{ + +#if defined(RT_USING_I2S0_MSG) + i2s_dev0.name = "I2S0_MSG"; + i2s_dev0.config.channels = 1; + i2s_dev0.config.samplerate = FI2S_SAMPLE_RATE_CD; + i2s_dev0.config.samplebits = FI2S_PCM_STREAM_WORD_LENGTH_16; + i2s_dev0.ddma_ctrl_id = FDDMA0_ID; + i2s_dev0.i2s_msg_ctrl_id = FI2S0_MSG_ID; + + i2s_controller_init(&i2s_dev0); +#endif + + return RT_EOK; +} + +INIT_DEVICE_EXPORT(rt_hw_i2s_init);
\ No newline at end of file diff --git a/bsp/phytium/libraries/drivers/drv_i2s_msg.h b/bsp/phytium/libraries/drivers/drv_i2s_msg.h new file mode 100644 index 0000000000..539d2e7d81 --- /dev/null +++ b/bsp/phytium/libraries/drivers/drv_i2s_msg.h @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2006-2023, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Email: [email protected] + * + * Change Logs: + * Date Author Notes + * 2025-01-21 zhangyan first version + * + */ +#ifndef __DRV_SOUND_H__ +#define __DRV_SOUND_H__ + +#include <rtdevice.h> + +#ifdef __cplusplus +extern "C" +{ +#endif + +int rt_hw_audio_init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __DRV_CAN_H__ */ diff --git a/bsp/phytium/libraries/drivers/drv_spi.c b/bsp/phytium/libraries/drivers/drv_spi.c index 6efbae9837..e0a2e7ed4d 100644 --- a/bsp/phytium/libraries/drivers/drv_spi.c +++ b/bsp/phytium/libraries/drivers/drv_spi.c @@ -57,9 +57,9 @@ static FError FSpimSetupInterrupt(FSpim *instance_p) rt_uint32_t cpu_id = rt_hw_cpu_id(); LOG_D("cpu_id is %d, irq_num is %d\n", cpu_id, config_p->irq_num); - config_p->irq_prority = 0xd0; + config_p->irq_priority = 0xd0; rt_hw_interrupt_set_target_cpus(config_p->irq_num, cpu_id); - rt_hw_interrupt_set_priority(config_p->irq_num, config_p->irq_prority); + rt_hw_interrupt_set_priority(config_p->irq_num, config_p->irq_priority); /* register intr callback */ rt_hw_interrupt_install(config_p->irq_num, diff --git a/bsp/phytium/libraries/drivers_example/auto_test.c b/bsp/phytium/libraries/drivers_example/auto_test.c index dcfda2cba2..c4e22f0eab 100644 --- a/bsp/phytium/libraries/drivers_example/auto_test.c +++ b/bsp/phytium/libraries/drivers_example/auto_test.c @@ -77,13 +77,9 @@ int auto_test() { #if defined BSP_USING_GPIO register_test("gpio_sample", gpio_toggle_sample); #endif -#if defined BSP_USING_I2C -#if defined (PD2408_TEST_A_BOARD) || defined (PD2408_TEST_B_BOARD) - register_test("i2c_msg_sample", i2c_msg_sample); -#else +#if defined(BSP_USING_I2C) || defined(BSP_USING_I2C_MSG) register_test("i2c_sample", i2c_sample); #endif -#endif #if defined BSP_USING_QSPI #if !defined(TARGET_PD2408) register_test("qspi_sample", qspi_sample); diff --git a/bsp/phytium/libraries/drivers_example/auto_test.h b/bsp/phytium/libraries/drivers_example/auto_test.h index a6296c3b14..2d5cf4e689 100644 --- a/bsp/phytium/libraries/drivers_example/auto_test.h +++ b/bsp/phytium/libraries/drivers_example/auto_test.h @@ -4,13 +4,14 @@ #include <rtdevice.h> #include "rtconfig.h" +int auto_test(); #if defined BSP_USING_CAN rt_err_t can_loopback_sample(); #endif #if defined BSP_USING_GPIO rt_err_t gpio_toggle_sample(); #endif -#if defined BSP_USING_I2C +#if defined(BSP_USING_I2C) || defined(BSP_USING_I2C_MSG) rt_err_t i2c_sample(); #endif #if defined BSP_USING_SPI diff --git a/bsp/phytium/libraries/drivers_example/can_loopback_sample.c b/bsp/phytium/libraries/drivers_example/can_loopback_sample.c index bd747840db..3f2a2c56b5 100644 --- a/bsp/phytium/libraries/drivers_example/can_loopback_sample.c +++ b/bsp/phytium/libraries/drivers_example/can_loopback_sample.c @@ -82,13 +82,13 @@ static void can1_rx_thread(void *parameter) } } -rt_err_t can_loopback_sample() +rt_err_t can_loopback_sample(void) { struct rt_can_msg msg = {0}; - rt_err_t res = RT_EOK;; - rt_thread_t thread; + rt_err_t res = RT_EOK; + rt_thread_t can0_rx_tid = RT_NULL; + rt_thread_t can1_rx_tid = RT_NULL; - /* Find CAN device */ can0_dev = rt_device_find("CAN0"); if (!can0_dev) { @@ -96,7 +96,6 @@ rt_err_t can_loopback_sample() return -RT_ERROR; } - /* Find CAN device */ can1_dev = rt_device_find("CAN1"); if (!can1_dev) { @@ -104,105 +103,177 @@ rt_err_t can_loopback_sample() return -RT_ERROR; } - /* Initialize CAN receive signal quantity */ res = rt_sem_init(&can0_rx_sem, "can0_rx_sem", 0, RT_IPC_FLAG_FIFO); RT_ASSERT(res == RT_EOK); res = rt_sem_init(&can1_rx_sem, "can1_rx_sem", 0, RT_IPC_FLAG_FIFO); RT_ASSERT(res == RT_EOK); - /* Open the CAN device in the way of interrupt reception and transmission */ - res = rt_device_open(can0_dev, RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_INT_RX); - rt_device_control(can0_dev, RT_CAN_CMD_SET_BAUD, CAN800kBaud); + res = rt_device_open(can0_dev, + RT_DEVICE_FLAG_INT_TX | + RT_DEVICE_FLAG_INT_RX); RT_ASSERT(res == RT_EOK); - res = rt_device_open(can1_dev, RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_INT_RX); - rt_device_control(can1_dev, RT_CAN_CMD_SET_BAUD, CAN800kBaud); + rt_device_control(can0_dev, + RT_CAN_CMD_SET_BAUD, + CAN800kBaud); + + res = rt_device_open(can1_dev, + RT_DEVICE_FLAG_INT_TX | + RT_DEVICE_FLAG_INT_RX); RT_ASSERT(res == RT_EOK); - /* Create data receiving thread */ - thread = rt_thread_create("can0_rx", can0_rx_thread, RT_NULL, 4096, 10, 10); - if (thread != RT_NULL) - { - res = rt_thread_startup(thread); - RT_ASSERT(res == RT_EOK); - } - else + rt_device_control(can1_dev, + RT_CAN_CMD_SET_BAUD, + CAN800kBaud); + + can0_rx_tid = rt_thread_create("can0_rx", + can0_rx_thread, + RT_NULL, + 4096, + 10, + 10); + + if (can0_rx_tid == RT_NULL) { rt_kprintf("Create can0_rx thread failed.\n"); + res = -RT_ERROR; + goto exit; } - thread = rt_thread_create("can1_rx", can1_rx_thread, RT_NULL, 4096, 10, 10); - if (thread != RT_NULL) - { - res = rt_thread_startup(thread); - RT_ASSERT(res == RT_EOK); - } - else + + rt_thread_startup(can0_rx_tid); + + can1_rx_tid = rt_thread_create("can1_rx", + can1_rx_thread, + RT_NULL, + 4096, + 10, + 10); + + if (can1_rx_tid == RT_NULL) { rt_kprintf("Create can1_rx thread failed.\n"); + res = -RT_ERROR; + goto exit; } + rt_thread_startup(can1_rx_tid); - msg.id = 0x78; /* ID = 0x78 */ - msg.ide = RT_CAN_STDID; /* Standard format */ - msg.rtr = RT_CAN_DTR; /* Data frame */ - msg.len = 8; /* Data length is 8 */ - /* Send CAN data */ - for (int i = 0; i < 5; i++) + msg.id = 0x78; + msg.ide = RT_CAN_STDID; + msg.rtr = RT_CAN_DTR; + msg.len = 8; + + for (int cnt = 0; cnt < 5; cnt++) { - /* 8-byte data to be sent */ - msg.data[0] = 0x0; - msg.data[1] = 0x1; - msg.data[2] = 0x2; - msg.data[3] = 0x3; - msg.data[4] = 0x4; - msg.data[5] = 0x5; - msg.data[6] = 0x6; - msg.data[7] = 0x7; + for (int i = 0; i < 8; i++) + { + msg.data[i] = i; + } + rt_device_write(can0_dev, 0, &msg, sizeof(msg)); + rt_thread_mdelay(100); + for (int i = 0; i < 8; i++) { if (msg.data[i] != rxmsg.data[i]) { - res = RT_ERROR; + rt_kprintf("\nCAN0 compare failed at byte[%d]\n", i); + + rt_kprintf("TX DATA: "); + for (int j = 0; j < 8; j++) + { + rt_kprintf("%02X ", msg.data[j]); + } + + rt_kprintf("\nRX DATA: "); + for (int j = 0; j < 8; j++) + { + rt_kprintf("%02X ", rxmsg.data[j]); + } + + rt_kprintf("\n"); + + res = -RT_ERROR; goto exit; } } } - /* Send CAN data */ - for (int i = 0; i < 5; i++) + for (int cnt = 0; cnt < 5; cnt++) { - /* 8-byte data to be sent */ - msg.data[0] = 0x0; - msg.data[1] = 0x1; - msg.data[2] = 0x2; - msg.data[3] = 0x3; - msg.data[4] = 0x4; - msg.data[5] = 0x5; - msg.data[6] = 0x6; - msg.data[7] = 0x7; + for (int i = 0; i < 8; i++) + { + msg.data[i] = i; + } + rt_device_write(can1_dev, 0, &msg, sizeof(msg)); + rt_thread_mdelay(100); + for (int i = 0; i < 8; i++) { if (msg.data[i] != rxmsg.data[i]) { - res = RT_ERROR; + rt_kprintf("\nCAN1 compare failed at byte[%d]\n", i); + + rt_kprintf("TX DATA: "); + for (int j = 0; j < 8; j++) + { + rt_kprintf("%02X ", msg.data[j]); + } + + rt_kprintf("\nRX DATA: "); + for (int j = 0; j < 8; j++) + { + rt_kprintf("%02X ", rxmsg.data[j]); + } + + rt_kprintf("\n"); + + res = -RT_ERROR; goto exit; } } } + exit: - /* print message on example run result */ + + if (can0_rx_tid) + { + rt_thread_delete(can0_rx_tid); + can0_rx_tid = RT_NULL; + } + + if (can1_rx_tid) + { + rt_thread_delete(can1_rx_tid); + can1_rx_tid = RT_NULL; + } + + if (can0_dev) + { + rt_device_set_rx_indicate(can0_dev, RT_NULL); + rt_device_close(can0_dev); + } + + if (can1_dev) + { + rt_device_set_rx_indicate(can1_dev, RT_NULL); + rt_device_close(can1_dev); + } + + rt_sem_detach(&can0_rx_sem); + rt_sem_detach(&can1_rx_sem); + if (res == RT_EOK) { - rt_kprintf("%s@%d:Can loopback test example [success].\r\n", __func__, __LINE__); + rt_kprintf("%s: CAN loopback test [success].\n", __func__); } else { - rt_kprintf("%s@%d:Can loopback test example [failure], res = %d\r\n", __func__, __LINE__, res); + rt_kprintf("%s: CAN loopback test [failure], res=%d\n", __func__, res); } return res; diff --git a/bsp/phytium/libraries/drivers_example/i2c_msg_sample.c b/bsp/phytium/libraries/drivers_example/i2c_msg_sample.c deleted file mode 100644 index 94110daf41..0000000000 --- a/bsp/phytium/libraries/drivers_example/i2c_msg_sample.c +++ /dev/null @@ -1,57 +0,0 @@ - -#include "rtconfig.h" -#if defined BSP_USING_I2C_MSG -#include "drv_log.h" -#include "drv_i2c.h" -#define TEST_DEVICE_ADDR 0x53 -static struct rt_i2c_bus_device *i2c_test_bus = RT_NULL; -int i2c_msg_sample(int argc, char *argv[]) -{ - rt_uint8_t write_content[] = {"Phytium Rt-thread I2C Msg Driver Test Successfully !!"}; - rt_uint8_t write_addr[2] = {0x0, 0x0}; - rt_uint8_t write_buf[2 + sizeof(write_content)]; - rt_memcpy(write_buf, write_addr, 2); - rt_memcpy(write_buf + 2, write_content, sizeof(write_content)); - - rt_uint8_t read_buf[2 + sizeof(write_content)]; - rt_memcpy(read_buf, write_addr, 2); - - char name[RT_NAME_MAX]; - rt_strncpy(name, "I2C3_MSG", RT_NAME_MAX); - i2c_test_bus = (struct rt_i2c_bus_device *)rt_device_find(name); - if (i2c_test_bus == RT_NULL) - { - rt_kprintf("can't find %s device!\n", name); - } - else - { - rt_kprintf("find %s device!!!!\n", name); - } - - struct rt_i2c_msg write_msgs; - write_msgs.addr = TEST_DEVICE_ADDR; - write_msgs.flags = RT_I2C_WR; - write_msgs.buf = write_buf; - write_msgs.len = sizeof(write_buf); - rt_i2c_transfer(i2c_test_bus, &write_msgs, 1); - - struct rt_i2c_msg read_msgs; - read_msgs.addr = TEST_DEVICE_ADDR; - read_msgs.flags = RT_I2C_RD; - read_msgs.buf = read_buf; - read_msgs.len = sizeof(read_buf); - rt_i2c_transfer(i2c_test_bus, &read_msgs, 1); - - for (rt_uint8_t i = 0; i < sizeof(write_content); i++) - { - if (read_buf[i] != write_content[i]) - { - return -RT_ERROR; - } - } - printf("%s\n", read_buf); - return RT_EOK; -} -MSH_CMD_EXPORT(i2c_msg_sample, i2c msg device sample); - -#endif
\ No newline at end of file diff --git a/bsp/phytium/libraries/drivers_example/i2c_sample.c b/bsp/phytium/libraries/drivers_example/i2c_sample.c index 3aaa5bbf69..9aed0804f5 100644 --- a/bsp/phytium/libraries/drivers_example/i2c_sample.c +++ b/bsp/phytium/libraries/drivers_example/i2c_sample.c @@ -1,29 +1,29 @@ #include "rtconfig.h" -#if defined BSP_USING_I2C +#if defined(BSP_USING_I2C) || defined(BSP_USING_I2C_MSG) #include "drv_log.h" #include "drv_i2c.h" -#define TEST_DEVICE_ADDR 0x53 +#define TEST_DEVICE_ADDR 0x57 static struct rt_i2c_bus_device *i2c_test_bus = RT_NULL; -rt_err_t i2c_sample() + +rt_err_t i2c_sample(void) { - rt_uint8_t write_content[] = {"Phytium Rt-thread I2C Driver Test Successfully !!"}; + rt_uint8_t write_content[] = {"write successfully"}; rt_uint8_t write_addr[2] = {0x0, 0x0}; rt_uint8_t write_buf[2 + sizeof(write_content)]; rt_memcpy(write_buf, write_addr, 2); rt_memcpy(write_buf + 2, write_content, sizeof(write_content)); - rt_uint8_t read_buf[2 + sizeof(write_content)]; - rt_memcpy(read_buf, write_addr, 2); + rt_uint8_t read_buf[sizeof(write_content)]; char name[RT_NAME_MAX]; -#if defined(FIREFLY_DEMO_BOARD) +#if defined(PHYTIUMPI_FIREFLY_BOARD) rt_strncpy(name, "MIO1", RT_NAME_MAX); #endif #if defined(E2000D_DEMO_BOARD)||defined(E2000Q_DEMO_BOARD) rt_strncpy(name, "MIO15", RT_NAME_MAX); #endif #if defined(TARGET_PD2408) - rt_strncpy(name, "I2C3", RT_NAME_MAX); + rt_strncpy(name, "I2C3_MSG", RT_NAME_MAX); #endif i2c_test_bus = (struct rt_i2c_bus_device *)rt_device_find(name); if (i2c_test_bus == RT_NULL) @@ -42,6 +42,12 @@ rt_err_t i2c_sample() write_msgs.len = sizeof(write_buf); rt_i2c_transfer(i2c_test_bus, &write_msgs, 1); + write_msgs.addr = TEST_DEVICE_ADDR; + write_msgs.flags = RT_I2C_WR; + write_msgs.buf = write_addr; + write_msgs.len = 2; + rt_i2c_transfer(i2c_test_bus, &write_msgs, 1); + struct rt_i2c_msg read_msgs; read_msgs.addr = TEST_DEVICE_ADDR; read_msgs.flags = RT_I2C_RD; @@ -53,6 +59,11 @@ rt_err_t i2c_sample() { if (read_buf[i] != write_content[i]) { + rt_kprintf("[i2c] compare failed at index %d: read=0x%02X expect=0x%02X\n", + i, + read_buf[i], + write_content[i]); + return -RT_ERROR; } } diff --git a/bsp/phytium/libraries/drivers_example/i2s_example.c b/bsp/phytium/libraries/drivers_example/i2s_example.c new file mode 100644 index 0000000000..12e9b5e3fd --- /dev/null +++ b/bsp/phytium/libraries/drivers_example/i2s_example.c @@ -0,0 +1,225 @@ +#include <rtconfig.h> +#ifdef BSP_USING_I2S_LAYER +#include <rtthread.h> +#include <rtdevice.h> + +#if defined(E2000D_DEMO_BOARD)||defined(E2000Q_DEMO_BOARD) + #define AUDIO_DEVICE_NAME "I2S0" +#endif +#if defined(PD2408_TEST_B_BOARD) + #define AUDIO_DEVICE_NAME "I2S0_MSG" +#endif + +#define AUDIO_SAMPLERATE 16000 +#define AUDIO_CHANNELS 2 +#define AUDIO_SAMPLEBITS 16 +#define RECORD_SECONDS 5 +#define RECORD_TOTAL_SIZE \ + (AUDIO_SAMPLERATE * AUDIO_CHANNELS * \ + (AUDIO_SAMPLEBITS / 8) * RECORD_SECONDS) + +/* 每次读20ms */ +#define AUDIO_BUF_SIZE RT_AUDIO_REPLAY_MP_BLOCK_SIZE + +static rt_device_t audio_dev = RT_NULL; + +static int i2s_record_play_test(int argc, char **argv) +{ + struct rt_audio_caps caps; + + rt_uint8_t *record_buf = RT_NULL; + rt_uint8_t *tmp_buf = RT_NULL; + + int read_len; + int write_len; + + int offset = 0; + + rt_kprintf("\n"); + rt_kprintf("=================================\n"); + rt_kprintf(" I2S Record And Playback Test\n"); + rt_kprintf("=================================\n"); + + /****************************************************** + * 分配录音总buffer + ******************************************************/ + record_buf = rt_malloc(RECORD_TOTAL_SIZE); + + if (record_buf == RT_NULL) + { + rt_kprintf("malloc record_buf failed\n"); + return -1; + } + + rt_memset(record_buf, 0, RECORD_TOTAL_SIZE); + + /****************************************************** + * 分配临时buffer + ******************************************************/ + tmp_buf = rt_malloc(AUDIO_BUF_SIZE); + + if (tmp_buf == RT_NULL) + { + rt_kprintf("malloc tmp_buf failed\n"); + + rt_free(record_buf); + + return -1; + } + + /****************************************************** + * 查找设备 + ******************************************************/ + audio_dev = rt_device_find(AUDIO_DEVICE_NAME); + + if (audio_dev == RT_NULL) + { + rt_kprintf("can't find %s\n", AUDIO_DEVICE_NAME); + + goto __exit; + } + + rt_kprintf("find device: %s\n", AUDIO_DEVICE_NAME); + + /****************************************************** + * 打开设备 + ******************************************************/ + if (rt_device_open(audio_dev, RT_DEVICE_OFLAG_RDWR) != RT_EOK) + { + rt_kprintf("open device failed\n"); + + goto __exit; + } + + rt_kprintf("open success\n"); + + /****************************************************** + * 配置输入 + ******************************************************/ + caps.main_type = AUDIO_TYPE_INPUT; + caps.sub_type = AUDIO_DSP_PARAM; + + caps.udata.config.samplerate = AUDIO_SAMPLERATE; + caps.udata.config.channels = AUDIO_CHANNELS; + caps.udata.config.samplebits = AUDIO_SAMPLEBITS; + + if (rt_device_control(audio_dev, + AUDIO_CTL_CONFIGURE, + &caps) != RT_EOK) + { + rt_kprintf("input configure failed\n"); + + goto __close; + } + + /****************************************************** + * 配置输出 + ******************************************************/ + caps.main_type = AUDIO_TYPE_OUTPUT; + caps.sub_type = AUDIO_DSP_PARAM; + + caps.udata.config.samplerate = AUDIO_SAMPLERATE; + caps.udata.config.channels = AUDIO_CHANNELS; + caps.udata.config.samplebits = AUDIO_SAMPLEBITS; + + if (rt_device_control(audio_dev, + AUDIO_CTL_CONFIGURE, + &caps) != RT_EOK) + { + rt_kprintf("output configure failed\n"); + + goto __close; + } + + /****************************************************** + * 开始录音 + ******************************************************/ + rt_kprintf("\n"); + rt_kprintf("Start recording %d seconds...\n", + RECORD_SECONDS); + + offset = 0; + + while (offset < RECORD_TOTAL_SIZE) + { + read_len = rt_device_read(audio_dev, + 0, + tmp_buf, + AUDIO_BUF_SIZE); + + if (read_len > 0) + { + rt_memcpy(record_buf + offset, + tmp_buf, + read_len); + + offset += read_len; + } + else + { + rt_thread_mdelay(10); + } + + } + + rt_kprintf("\n"); + rt_kprintf("Record finished.\n"); + + /****************************************************** + * 等待1秒 + ******************************************************/ + rt_thread_mdelay(1000); + + /****************************************************** + * 开始播放 + ******************************************************/ + rt_kprintf("Start playback...\n"); + + offset = 0; + + while (offset < RECORD_TOTAL_SIZE) + { + + write_len = AUDIO_BUF_SIZE; + + if ((offset + write_len) > RECORD_TOTAL_SIZE) + { + write_len = RECORD_TOTAL_SIZE - offset; + } + + write_len = rt_device_write(audio_dev, + 0, + record_buf + offset, + write_len); + + if (write_len > 0) + { + offset += write_len; + } + } + + rt_kprintf("\n"); + rt_kprintf("Playback finished.\n"); + +__close: + + rt_device_close(audio_dev); + +__exit: + + if (record_buf) + { + rt_free(record_buf); + } + + if (tmp_buf) + { + rt_free(tmp_buf); + } + + return 0; +} + +MSH_CMD_EXPORT(i2s_record_play_test, + i2s record 5s and playback 5s test); +#endif
\ No newline at end of file diff --git a/bsp/phytium/libraries/drivers_example/i2s_mic_example.c b/bsp/phytium/libraries/drivers_example/i2s_mic_example.c deleted file mode 100644 index 33627348c7..0000000000 --- a/bsp/phytium/libraries/drivers_example/i2s_mic_example.c +++ /dev/null @@ -1,62 +0,0 @@ -// /* pcm_record.c */ -// #include "rtconfig.h" -// #if defined(BSP_USING_I2S)||defined(BSP_USING_SDIF) -// #include <rtthread.h> -// #include <rtdevice.h> -// #include <dfs_posix.h> - -// #define RECORD_TIME_MS 5000 -// #define RT_I2S_SAMPLERATE 8000 -// #define RECORD_CHANNEL 2 -// #define RECORD_CHUNK_SZ ((RT_I2S_SAMPLERATE * RECORD_CHANNEL * 2) * 20 / 1000) - -// #define SOUND_DEVICE_NAME "I2S0" /* Audio 设备名称 */ -// static rt_device_t mic_dev; /* Audio 设备句柄 */ - -// int pcm_record() -// { -// int fd = -1; -// uint8_t *buffer = NULL; -// int length, total_length = 0; - -// fd = open("file.pcm", O_WRONLY | O_CREAT); -// if (fd < 0) -// { -// rt_kprintf("open file for recording failed!\n"); -// return -1; -// } -// buffer = rt_malloc(RECORD_CHUNK_SZ); -// if (buffer == RT_NULL) -// goto __exit; -// mic_dev = rt_device_find(SOUND_DEVICE_NAME); -// if (mic_dev == RT_NULL) -// goto __exit; -// rt_device_open(mic_dev, RT_DEVICE_OFLAG_RDONLY); -// while (1) -// { -// length = rt_device_read(mic_dev, 0, buffer, RECORD_CHUNK_SZ); -// if (length) -// { -// write(fd, buffer, length); -// total_length += length; -// } - -// if ((total_length / RECORD_CHUNK_SZ) > (RECORD_TIME_MS / 20)) -// break; -// } - -// close(fd); - -// rt_device_close(mic_dev); - -// __exit: -// if (fd >= 0) -// close(fd); - -// if (buffer) -// rt_free(buffer); - -// return 0; -// } -// MSH_CMD_EXPORT(pcm_record, record voice to a pcm file); // 修改命令描述 -// #endif
\ No newline at end of file diff --git a/bsp/phytium/libraries/drivers_example/qspi_sample.c b/bsp/phytium/libraries/drivers_example/qspi_sample.c index a28f96c1cf..ddffc37c08 100644 --- a/bsp/phytium/libraries/drivers_example/qspi_sample.c +++ b/bsp/phytium/libraries/drivers_example/qspi_sample.c @@ -6,6 +6,7 @@ #include <ioremap.h> #endif #include "auto_test.h" +#include <string.h> #include "rtdevice.h" #include "drv_qspi.h" #include "fqspi_flash.h" diff --git a/bsp/phytium/libraries/phytium_standalone_sdk_install.py b/bsp/phytium/libraries/phytium_standalone_sdk_install.py index 567ae2fb14..2c5824f820 100644 --- a/bsp/phytium/libraries/phytium_standalone_sdk_install.py +++ b/bsp/phytium/libraries/phytium_standalone_sdk_install.py @@ -19,6 +19,6 @@ def clone_repository(branch, commit_hash): if __name__ == "__main__": branch_to_clone = "master" - commit_to_clone = "20d40083fb3b1b328a2b750938123999d6c12262" + commit_to_clone = "8d6aefa63f4b38e72f9a3bd6e62a3ec30da50ae9" clone_repository(branch_to_clone, commit_to_clone) diff --git a/bsp/phytium/libraries/port/fdriver_port/fdrivers_port.c b/bsp/phytium/libraries/port/fdriver_port/fdrivers_port.c index b418bedc93..6963902004 100644 --- a/bsp/phytium/libraries/port/fdriver_port/fdrivers_port.c +++ b/bsp/phytium/libraries/port/fdriver_port/fdrivers_port.c @@ -42,6 +42,16 @@ void FDriverICacheRangeInvalidate(uintptr_t adr, size_t len) __asm_invalidate_icache_all(); } +void FDriverICacheInvalidate(void) +{ + __asm_invalidate_icache_all(); +} + +void FDriverDCacheInvalidate(void) +{ + __asm_invalidate_dcache_all(); +} + #else #include "rthw.h" /* cache */ diff --git a/bsp/phytium/libraries/port/fdriver_port/fdrivers_port.h b/bsp/phytium/libraries/port/fdriver_port/fdrivers_port.h index 2d8f8f9856..5e910fa377 100644 --- a/bsp/phytium/libraries/port/fdriver_port/fdrivers_port.h +++ b/bsp/phytium/libraries/port/fdriver_port/fdrivers_port.h @@ -48,7 +48,9 @@ void FDriverDCacheRangeInvalidate(uintptr_t adr, size_t len); void FDriverICacheRangeInvalidate(uintptr_t adr, size_t len); +void FDriverICacheInvalidate(void); +void FDriverDCacheInvalidate(void); /* memory barrier */ #define FDRIVER_DSB() DSB() diff --git a/bsp/phytium/libraries/port/fdriver_port/sdkconfig.h b/bsp/phytium/libraries/port/fdriver_port/sdkconfig.h deleted file mode 100644 index 99d07ead10..0000000000 --- a/bsp/phytium/libraries/port/fdriver_port/sdkconfig.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifndef SDK_CONFIG_H__ -#define SDK_CONFIG_H__ - -/* CONFIG_FXMAC_PHY_YT is not set */ -#endif
\ No newline at end of file diff --git a/bsp/phytium/libraries/port/libmetal_port/sys.c b/bsp/phytium/libraries/port/libmetal_port/sys.c new file mode 100644 index 0000000000..06e59d24df --- /dev/null +++ b/bsp/phytium/libraries/port/libmetal_port/sys.c @@ -0,0 +1,111 @@ +/* + * Copyright : (C) 2025 Phytium Information Technology, Inc. + * All Rights Reserved. + * + * This program is OPEN SOURCE software: you can redistribute it and/or modify it + * under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd, + * either version 1.0 of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY; + * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * See the Phytium Public License for more details. + * + * + * FilePath: sys.c + * Created Date: 2025-04-30 15:18:08 + * Last Modified: 2025-05-07 14:53:21 + * Description: This file is for + * + * Modify History: + * Ver Who Date Changes + * ----- ---------- -------- --------------------------------- + * 1.0 LiuSM 2025-04-30 15:18:08 First version + */ + +#include <metal/compiler.h> +#include <metal/io.h> +#include <metal/sys.h> +#include <stdint.h> +#include "faarch.h" +#include "mmu.h" +#include "cache.h" +#include "rtthread.h" + +#define _DISABLE_INTERRUPTS() \ + __asm volatile("MSR DAIFSET, #2" :: \ + : "memory"); \ + __asm volatile("DSB SY"); \ + __asm volatile("ISB SY"); + +#define _ENABLE_INTERRUPTS() \ + __asm volatile("MSR DAIFCLR, #2" :: \ + : "memory"); \ + __asm volatile("DSB SY"); \ + __asm volatile("ISB SY"); + +void sys_irq_restore_enable(unsigned int flags) +{ +#ifdef __aarch64__ + _ENABLE_INTERRUPTS(); +#else + MTCPSR(flags); +#endif +} + +unsigned int sys_irq_save_disable(void) +{ + unsigned int state = 0; + +#ifdef __aarch64__ + _DISABLE_INTERRUPTS(); +#else + state = MFCPSR(); + MTCPSR(state | 0xc0); +#endif + + return state; +} + +void metal_machine_cache_flush(void *addr, unsigned int len) +{ + rt_hw_cpu_dcache_ops(RT_HW_CACHE_FLUSH, (void *)addr, len);; +} + +void metal_machine_cache_invalidate(void *addr, unsigned int len) +{ + rt_hw_cpu_dcache_ops(RT_HW_CACHE_INVALIDATE, (void *)addr, len); +} + +/** + * @brief poll function until some event happens + */ +void metal_weak metal_generic_default_poll(void) +{ + metal_asm volatile("wfi"); +} + + + + void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa, + size_t size, unsigned int flags) +{ + // rt_aspace_t aspace = NULL; + // aspace = (rt_aspace_t)rt_malloc(sizeof(*aspace)); + // printf("sys_io_mem_map: va=%p, pa=0x%lx, size=0x%lx, flags=0x%x\n", va, pa, size, flags); + // printf("sys_io_mem_map: aspace=0x%p\n", aspace); + // int err = RT_EOK; + // void *ret; + // ret = rt_hw_mmu_map(aspace, va, pa, size, flags); + // if (ret == RT_NULL) + // { + // err = -RT_ERROR; + // } + // return err; + (void)va; + (void)pa; + (void)size; + (void)flags; + + return va; +} + diff --git a/bsp/phytium/libraries/port/libmetal_port/sys.h b/bsp/phytium/libraries/port/libmetal_port/sys.h new file mode 100644 index 0000000000..9fbbecaad1 --- /dev/null +++ b/bsp/phytium/libraries/port/libmetal_port/sys.h @@ -0,0 +1,54 @@ +/* + * Copyright : (C) 2025 Phytium Information Technology, Inc. + * All Rights Reserved. + * + * This program is OPEN SOURCE software: you can redistribute it and/or modify it + * under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd, + * either version 1.0 of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY; + * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * See the Phytium Public License for more details. + * + * + * FilePath: sys.h + * Created Date: 2025-04-30 15:19:21 + * Last Modified: 2025-04-30 15:20:05 + * Description: This file is for + * + * Modify History: + * Ver Who Date Changes + * ----- ---------- -------- --------------------------------- + * 1.0 LiuSM 2025-04-30 15:19:21 file creation + */ + + #ifndef __METAL_SYS__H__ + #define __METAL_SYS__H__ + + #ifdef __cplusplus + extern "C" { + #endif + + #define METAL_INTERNAL + + #if 1 + + #define XLNX_MAXIRQS XSCUGIC_MAX_NUM_INTR_INPUTS + + static inline void sys_irq_enable(unsigned int vector) + { + InterruptUmask(vector); + } + + static inline void sys_irq_disable(unsigned int vector) + { + InterruptMask(vector); + } + + #endif /* METAL_INTERNAL */ + + #ifdef __cplusplus + } + #endif + +#endif /* */ diff --git a/bsp/phytium/libraries/port/openamp_port/README.md b/bsp/phytium/libraries/port/openamp_port/README.md new file mode 100644 index 0000000000..a527981c21 --- /dev/null +++ b/bsp/phytium/libraries/port/openamp_port/README.md @@ -0,0 +1,66 @@ +# Summary + +This directory contains legacy applications and tests examples. +These applications were moved from open-amp repository. + + +# Initialization + +The first step is to initialize the workspace folder (``my-workspace``) where +the examples and all Zephyr modules will be cloned. You can do +that by running: + +```shell +# initialize my-workspace for the example-application (main branch) +west init -m https://github.com/OpenAMP/openamp-system-reference --mf examples/legacy_apps/west.yml --mr main my-workspace +# update modules +cd my-workspace +west update +``` + +# Build + +Following steps to build legacy apps on host machine. + +``` +export PROJECT_ROOT=$PWD +``` + +## Build libmetal +```shell + $ cd $PROJECT_ROOT/libmetal + $ cmake . -Bbuild -DCMAKE_INSTALL_PREFIX=$PROJECT_ROOT/target + $ make -C build VERBOSE=1 install +``` + +## Build open_amp +```shell + $ cd $PROJECT_ROOT/open-amp + $ cmake . -Bbuild -DCMAKE_INCLUDE_PATH=$PROJECT_ROOT/libmetal/build/lib/include/ -DCMAKE_LIBRARY_PATH=$PROJECT_ROOT/libmetal/build/lib/ -DCMAKE_INSTALL_PREFIX=$PROJECT_ROOT/target + $ make -C build VERBOSE=1 install +``` +## Build legacy Apps +```shell + $ cd $PROJECT_ROOT/openamp-system-reference/examples/legacy_apps + $ cmake -Bbuild \ +-DCMAKE_INCLUDE_PATH="$PROJECT_ROOT/libmetal/build/lib/include/;$PROJECT_ROOT/open-amp/build/lib/include/" \ +-DCMAKE_LIBRARY_PATH="$PROJECT_ROOT/libmetal/build/lib/;$PROJECT_ROOT/open-amp/build/lib/" \ +-DCMAKE_INSTALL_PREFIX=$PROJECT_ROOT/target + $ make -C build VERBOSE=1 install +``` + +## Run application on a Linux PC +It is possible to run application on a Linux PC to communicate between two Linux processes. + +```shell + $ cd $PROJECT_ROOT/target + $ echo "################### run ping test #####################" + $ LD_LIBRARY_PATH=./lib ./bin/rpmsg-echo-static & + $ sleep 1 + $ LD_LIBRARY_PATH=./lib ./bin//msg-test-rpmsg-ping-static 1 + + $ echo "################### run ping test #####################" + $ LD_LIBRARY_PATH=./lib ./bin/rpmsg-nocopy-echo-static & + $ sleep 1 + $ LD_LIBRARY_PATH=./lib ./bin//rpmsg-nocopy-ping-static 1 +``` diff --git a/bsp/phytium/libraries/port/openamp_port/include/platform_info_common.h b/bsp/phytium/libraries/port/openamp_port/include/platform_info_common.h new file mode 100644 index 0000000000..1184a9bf2e --- /dev/null +++ b/bsp/phytium/libraries/port/openamp_port/include/platform_info_common.h @@ -0,0 +1,79 @@ +/* + * Copyright (C) 2024 Texas Instruments, Inc. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef PLATFORM_INFO_COMMON_H +#define PLATFORM_INFO_COMMON_H + +#include <openamp/remoteproc.h> +#include <openamp/virtio.h> +#include <openamp/rpmsg.h> + +#if defined __cplusplus +extern "C" { +#endif + +/** + * platform_init - initialize the platform + * + * Initialize the platform. + * + * @argc: number of arguments + * @argv: array of the input arguments + * @platform: pointer to store the platform data pointer + * + * return 0 for success or negative value for failure + */ +int platform_init(int argc, char *argv[], void **platform); + +/** + * platform_create_rpmsg_vdev - create rpmsg vdev + * + * Create rpmsg virtio device, and return the rpmsg virtio + * device pointer. + * + * @platform: pointer to the private data + * @vdev_index: index of the virtio device, there can more than one vdev + * on the platform. + * @role: virtio driver or virtio device of the vdev + * @rst_cb: virtio device reset callback + * @ns_bind_cb: rpmsg name service bind callback + * + * return pointer to the rpmsg virtio device + */ +struct rpmsg_device * +platform_create_rpmsg_vdev(void *platform, unsigned int vdev_index, + unsigned int role, + void (*rst_cb)(struct virtio_device *vdev), + rpmsg_ns_bind_cb ns_bind_cb); + +/** + * platform_poll - platform poll function + * + * @platform: pointer to the platform + * + * return negative value for errors, otherwise 0. + */ +int platform_poll(void *platform); + +/** + * platform_release_rpmsg_vdev - release rpmsg virtio device + * + * @rpdev: pointer to the rpmsg device + */ +void platform_release_rpmsg_vdev(struct rpmsg_device *rpdev, void *platform); + +/** + * platform_cleanup - clean up the platform resource + * + * @platform: pointer to the platform + */ +void platform_cleanup(void *platform); + +#if defined __cplusplus +} +#endif + +#endif /* PLATFORM_INFO_COMMON_H */ diff --git a/bsp/phytium/libraries/port/openamp_port/machine/phytium/phytium_rproc.c b/bsp/phytium/libraries/port/openamp_port/machine/phytium/phytium_rproc.c new file mode 100644 index 0000000000..27c11512f7 --- /dev/null +++ b/bsp/phytium/libraries/port/openamp_port/machine/phytium/phytium_rproc.c @@ -0,0 +1,333 @@ +/* + * Copyright (C) 2022, Phytium Technology Co., Ltd. All Rights Reserved. + * + * Licensed under the BSD 3-Clause License (the "License"); you may not use + * this file except in compliance with the License. You may obtain a copy of + * the License at + * + * https://opensource.org/licenses/BSD-3-Clause + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * + * FilePath: phytium_rproc.c + * Date: 2022-03-08 22:26:17 + * LastEditTime: 2022-03-09 13:16:04 + * Description: This file define phytium platform specific remoteproc + * implementation. + * + * Modify History: + * Ver Who Date Changes + * ----- ------ -------- -------------------------------------- + * 1.0 huanghe 2022/03/06 first release + */ + +/***************************** Include Files *********************************/ + +#include <metal/atomic.h> +#include <metal/assert.h> +#include <metal/device.h> +#include <metal/irq.h> +#include <metal/utilities.h> +#include <openamp/rpmsg_virtio.h> +#include "platform_info.h" +#include "sdkconfig.h" +#include "fdebug.h" +#include "interrupt.h" +#include "gicv3.h" +#include "stdio.h" +#include "fmmu.h" +#include "ftypes.h" +#include "fcpu_info.h" +#include "fpsci.h" +#include "cache.h" +#include "phytium_interrupt.h" +#include "rtconfig.h" + +/************************** Constant Definitions *****************************/ + +/**************************** Type Definitions *******************************/ +#define IRQ_PRIORITY_VALUE_1 0x1 +/**************************** Type Definitions *******************************/ +#if defined(TARGET_PE2204) +#define CORE0_INTR(INTR_ID) (0x1 | ((INTR_ID & 0xFULL) << 24)) +#define CORE1_INTR(INTR_ID) (0x10001 | ((INTR_ID & 0xFULL) << 24)) +#define CORE2_INTR(INTR_ID) (0x20001 | ((INTR_ID & 0xFULL) << 24)) +#define CORE3_INTR(INTR_ID) (0x20002 | ((INTR_ID & 0xFULL) << 24)) + +#define CORE_INTR_SEND(intr, core_mask) \ + do { \ + if (core_mask & 0x1) \ + SET_GICV3_REG(ICC_SGI1R_EL1, CORE0_INTR(intr)); \ + if (core_mask & 0x2) \ + SET_GICV3_REG(ICC_SGI1R_EL1, CORE1_INTR(intr)); \ + if (core_mask & 0x4) \ + SET_GICV3_REG(ICC_SGI1R_EL1, CORE2_INTR(intr)); \ + if (core_mask & 0x8) \ + SET_GICV3_REG(ICC_SGI1R_EL1, CORE3_INTR(intr)); \ + } while (0) +#endif +/************************** Variable Definitions *****************************/ + +/***************** Macros (Inline Functions) Definitions *********************/ + +#define PHYTIUM_RPROC_MAIN_DEBUG_TAG " PHYTIUM_RPROC_MAIN" +#define PHYTIUM_RPROC_MAIN_DEBUG_I(format, ...) FT_DEBUG_PRINT_I( PHYTIUM_RPROC_MAIN_DEBUG_TAG, format, ##__VA_ARGS__) +#define PHYTIUM_RPROC_MAIN_DEBUG_W(format, ...) FT_DEBUG_PRINT_W( PHYTIUM_RPROC_MAIN_DEBUG_TAG, format, ##__VA_ARGS__) +#define PHYTIUM_RPROC_MAIN_DEBUG_E(format, ...) FT_DEBUG_PRINT_E( PHYTIUM_RPROC_MAIN_DEBUG_TAG, format, ##__VA_ARGS__) + +/************************** Function Prototypes ******************************/ + +#ifdef CONFIG_USE_OPENAMP_IPI + +static void PhytiumIrqhandler(s32 vector, void *param) +{ + struct remoteproc *rproc = param; + struct remoteproc_priv *prproc; + prproc = rproc->priv; + (void)vector; + + if(!rproc) + { + printf("rproc is empty.") ; + return ; + } + + if (prproc->src_table_ready_flag != 1) + { + goto exit; + } + + if (rproc_check_rsc_table_stop(rproc)) + { + printf("stop flag found, cpu down!.\n\r") ; + rproc_set_stop_flag(); + FPsciCpuOff(); + return; + } + +exit: + atomic_flag_clear(&prproc->ipi_nokick); +} + +#endif + +static struct remoteproc * +PhytiumProcInit(struct remoteproc *rproc,const struct remoteproc_ops *ops, + void *arg) +{ + struct remoteproc_priv *prproc = arg; + struct metal_device *kick_dev; + unsigned int irq_vect; + int ret; + + if (!rproc || !prproc || !ops) + return NULL; + + ret = metal_device_open(prproc->kick_dev_bus_name, + prproc->kick_dev_name, + &kick_dev); + if (ret) { + PHYTIUM_RPROC_MAIN_DEBUG_E("Failed to open polling device: %d.", ret); + return NULL; + } + rproc->priv = prproc; + prproc->kick_dev = kick_dev; + + +#ifdef CONFIG_USE_OPENAMP_IPI + u32 cpu_id; + atomic_store(&prproc->ipi_nokick, 1); + GetCpuId(&cpu_id); + /* Register interrupt handler and enable interrupt */ + irq_vect = (uintptr_t)kick_dev->irq_info; + printf("current %d \n",cpu_id) ; + rt_hw_interrupt_set_priority(irq_vect, IRQ_PRIORITY_VALUE_1) ; + rt_hw_interrupt_install(irq_vect,PhytiumIrqhandler,rproc,"phytium_rproc") ; + printf("irq_vect is %d \n",irq_vect) ; + rt_hw_interrupt_umask(irq_vect) ; +#else + prproc->kick_io = metal_device_io_region(kick_dev, 0); + if (!prproc->kick_io) + goto err1; + (void)irq_vect; + metal_io_write32(prproc->kick_io, 0, !POLL_STOP); +#endif /* !CONFIG_USE_OPENAMP_IPI */ + + rproc->ops = ops; + + return rproc; +err1: + metal_device_close(kick_dev); + return NULL; +} + + +static void PhytiumProcRemove(struct remoteproc *rproc) +{ + struct remoteproc_priv *prproc; + struct metal_device *dev; + + if (!rproc) + { + return; + } + + prproc = rproc->priv; +#ifdef CONFIG_USE_OPENAMP_IPI + dev = prproc->kick_dev; + if (dev) { + PHYTIUM_RPROC_MAIN_DEBUG_E("Start to remove.") ; + rt_hw_interrupt_mask((uintptr_t)dev->irq_info); + } +#else /* RPMSG_NO_IPI */ + (void)dev; +#endif /* !RPMSG_NO_IPI */ + metal_device_close(prproc->kick_dev); +} + +static void * +PhytiumProcMmap(struct remoteproc *rproc, metal_phys_addr_t *pa, + metal_phys_addr_t *da, size_t size, + unsigned int attribute, struct metal_io_region **io) +{ + struct remoteproc_mem *mem; + metal_phys_addr_t lpa, lda; + struct metal_io_region *tmpio; + + lpa = *pa; + lda = *da; + + if (lpa == METAL_BAD_PHYS && lda == METAL_BAD_PHYS) + return NULL; + if (lpa == METAL_BAD_PHYS) + lpa = lda; + if (lda == METAL_BAD_PHYS) + lda = lpa; + + if (!attribute) + attribute = (MT_NORMAL|MT_P_RW_U_NA);/* default attribute */ + + mem = metal_allocate_memory(sizeof(*mem)); + if (!mem) + return NULL; + tmpio = metal_allocate_memory(sizeof(*tmpio)); + if (!tmpio) { + metal_free_memory(mem); + return NULL; + } + /* + mem->pa = lpa; + mem->da = lda; + mem->io = tmpio; + mem->size = size; + */ + remoteproc_init_mem(mem, NULL, lpa, lda, size, tmpio); + /* + va is the same as pa in this platform, + tmpio->virt = lpa; + tmpio->physmap = &mem->pa; + tmpio->size = size; + tmpio->page_shift = -1; + tmpio->mem_flags = attribute; + tmpio->ops = ops ? *ops : nops; const struct metal_io_ops nops = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL }; + */ + metal_io_init(tmpio, (void *)lpa, &mem->pa, size, -1, attribute, NULL); + /* + Add remoteproc memory + &rproc->mems, add &mem->node + */ + remoteproc_add_mem(rproc, mem); + *pa = lpa; + *da = lda; + if (io) + *io = tmpio; + return metal_io_phys_to_virt(tmpio, mem->pa); + +} + +static int PhytiumProcNotify(struct remoteproc *rproc, uint32_t id) +{ + struct remoteproc_priv *prproc; + + (void)id; + if (!rproc) + return -1; + prproc = rproc->priv; + +#ifndef CONFIG_USE_OPENAMP_IPI + metal_io_write32(prproc->kick_io, 0, POLL_STOP); +#else +#ifdef CONFIG_USE_MASTER_VRING_DEFINE + printf("irq_vect is %d,cpu_id is %d.\r\n",(uintptr)(prproc->kick_dev->irq_info), prproc->cpu_id); + CORE_INTR_SEND((uintptr)(prproc->kick_dev->irq_info), prproc->cpu_id); +#else + CORE_INTR_SEND((uintptr)(prproc->kick_dev->irq_info), 1 << prproc->cpu_id); +#endif +#endif /* RPMSG_NO_IPI */ + return 0; +} + +static int Phytium_rproc_start(struct remoteproc *rproc) +{ + struct remoteproc_priv *priv; + FError ret; + + priv = rproc->priv; + // FCacheDCacheFlush(); + ret = FPsciCpuMaskOn(1 << priv->cpu_id , (uintptr_t)rproc->bootaddr); + if (ret != 0) { + PHYTIUM_RPROC_MAIN_DEBUG_E("Failed to start core id 0x%x, ret=0x%x\n\r", priv->cpu_id, ret); + return -1; + } + + return 0; +} + +static int PhytiumProcStop(struct remoteproc *rproc) +{ + /* It is lacking a stop operation in the libPM */ + (void)rproc; + return 0; +} + +static int PhytiumProcShutdown(struct remoteproc *rproc) +{ + struct remoteproc_mem *mem; + struct metal_list *node; + + /* Delete all the registered remoteproc memories */ + metal_list_for_each(&rproc->mems, node) { + struct metal_list *tmpnode; + metal_phys_addr_t pa, pa_end; + + mem = metal_container_of(node, struct remoteproc_mem, node); + tmpnode = node; + node = tmpnode->prev; + metal_list_del(tmpnode); + metal_free_memory(mem->io); + metal_free_memory(mem); + } +/* + if (rproc->state == RPROC_RUNNING) + { + return -1; + } +*/ + return 0; +} + +const struct remoteproc_ops phytium_proc_ops = { + .init = PhytiumProcInit, + .remove = PhytiumProcRemove, + .mmap = PhytiumProcMmap, + .notify = PhytiumProcNotify, + .start = Phytium_rproc_start, + .stop = PhytiumProcStop, + .shutdown = PhytiumProcShutdown, +}; + diff --git a/bsp/phytium/libraries/port/openamp_port/machine/phytium/platform_info.c b/bsp/phytium/libraries/port/openamp_port/machine/phytium/platform_info.c new file mode 100644 index 0000000000..07e89b8275 --- /dev/null +++ b/bsp/phytium/libraries/port/openamp_port/machine/phytium/platform_info.c @@ -0,0 +1,280 @@ +/* + * Copyright (C) 2024, Phytium Technology Co., Ltd. All Rights Reserved. + * + * Licensed under the BSD 3-Clause License (the "License"); you may not use + * this file except in compliance with the License. You may obtain a copy of + * the License at + * + * https://opensource.org/licenses/BSD-3-Clause + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * + * FilePath: platform_info.c + * Created Date: 2024-04-28 17:13:10 + * Last Modified: 2025-02-28 09:57:15 + * Description: This file is for + * + * Modify History: + * Ver Who Date Changes + * ----- ---------- -------- --------------------------------- + */ + + +#include "platform_info.h" +#include "ftypes.h" +#include <openamp/rpmsg_virtio.h> +#include <metal/device.h> +#include <metal/irq.h> +#include <errno.h> +#include "platform_info.h" +#include "remoteproc.h" +#include "rsc_table.h" +#include "sdkconfig.h" +#include "fdebug.h" +#include "helper.h" + +#define FT_PLAT_INFO_MAIN_DEBUG_TAG "FT_PLAT_INFO_MAIN" +#define FT_PLAT_INFO_MAIN_DEBUG_I(format, ...) FT_DEBUG_PRINT_I( FT_PLAT_INFO_MAIN_DEBUG_TAG, format, ##__VA_ARGS__) +#define FT_PLAT_INFO_MAIN_DEBUG_W(format, ...) FT_DEBUG_PRINT_W( FT_PLAT_INFO_MAIN_DEBUG_TAG, format, ##__VA_ARGS__) +#define FT_PLAT_INFO_MAIN_DEBUG_E(format, ...) FT_DEBUG_PRINT_E( FT_PLAT_INFO_MAIN_DEBUG_TAG, format, ##__VA_ARGS__) + +#ifdef CONFIG_USE_OPENAMP_IPI +#define _rproc_wait() asm volatile("wfi") +#endif /* !RPMSG_NO_IPI */ + +/************************** Variable Definitions *****************************/ +static volatile unsigned int stop_flag = 0; +extern struct remoteproc_ops phytium_proc_ops ; + +#ifdef CONFIG_USE_MASTER_VRING_DEFINE +static metal_phys_addr_t linux_share_buffer; +#endif +/************************** Function Prototypes ******************************/ +#ifdef CONFIG_USE_OPENAMP_IPI +unsigned int rproc_check_rsc_table_stop(struct remoteproc *rproc) +{ + if (!rproc) { + FT_PLAT_INFO_MAIN_DEBUG_E("rproc NULL! \r\n"); + return 0; + } + struct remote_resource_table *table_ptr = rproc->rsc_table; + unsigned int *flag = table_ptr->reserved; + + if (*flag & REMOTE_PROC_STOP) { + return 1; + } else { + return 0; + } +} +#endif + +unsigned int rproc_get_stop_flag(void) +{ + return stop_flag; +} + +void rproc_set_stop_flag(void) +{ + stop_flag |= REMOTE_PROC_STOP; +} + +void rproc_clear_stop_flag(void) +{ + stop_flag &= ~REMOTE_PROC_STOP; +} + +struct remoteproc *platform_create_proc(struct remoteproc * rproc_inst,struct remoteproc_priv *priv ,struct metal_device *kick_dev) +{ + struct remoteproc * rproc; + + if (metal_register_generic_device(kick_dev)) + { + return NULL; + } + + /* Initialize remoteproc instance */ + /* metal_device_open(KICK_BUS_NAME,KICK_DEV_NAME,rproc_inst->priv->kick_dev) */ + /* rproc_inst->priv->kick_io = metal_device_io_region(rproc_inst->priv->kick_dev, 0); */ + rproc = remoteproc_init(rproc_inst, &phytium_proc_ops, priv) ; + + return rproc; +} + + +int platform_setup_src_table(struct remoteproc *rproc_inst,metal_phys_addr_t *rsc_table) +{ + metal_phys_addr_t pa; + struct remoteproc_priv *priv = rproc_inst->priv; + int ret; + // metal_phys_addr_t *rsc_table = priv->src_table_va ; + size_t rsc_size = sizeof(struct remote_resource_table); + unsigned int attribute = priv->src_table_attribute; + + pa = (metal_phys_addr_t)rsc_table; + /* rproc_inst.mems rproc_inst.rsc_io*/ + /* 在OpenAMP应用中，通常需要通过remoteproc_mmap()函数将远程处理器中的共享内存映射到本地主机中，以便应用程序进行读写操作。*/ + (void *)remoteproc_mmap(rproc_inst, &pa, NULL, rsc_size, attribute, &rproc_inst->rsc_io); + + ret = remoteproc_set_rsc_table(rproc_inst, (struct resource_table *)rsc_table, rsc_size); + if (ret) + { + FT_PLAT_INFO_MAIN_DEBUG_E("Failed to intialize remoteproc %d \r\n",ret); + remoteproc_remove(rproc_inst); + return -1; + } + priv->src_table_ready_flag = 1;/* 标记src_table已经准备好了 */ + return 0 ; +} + + +int platform_setup_share_mems(struct remoteproc *rproc_inst) +{ + int ret; + struct remoteproc_priv *priv = rproc_inst->priv; +#ifdef CONFIG_USE_MASTER_VRING_DEFINE /*获取资源表中的共享内存地址*/ + struct remote_resource_table *table_ptr = rproc_inst->rsc_table; + FT_PLAT_INFO_MAIN_DEBUG_I("da is %p ~ %p \r\n",table_ptr->rpmsg_vdev.vring[0].da,table_ptr->rpmsg_vdev.vring[0].da + priv->share_mem_size); + priv->share_mem_pa = table_ptr->rpmsg_vdev.vring[0].da;/* 默认kernel vring[0].da 的首地址是整个sharememory的起始位置*/ + priv->share_mem_va = priv->share_mem_pa; +#endif + (void *)remoteproc_mmap(rproc_inst, &priv->share_mem_pa, &priv->share_mem_va, priv->share_mem_size, priv->share_mem_attribute, NULL); + return 0 ; +} + +struct rpmsg_device *platform_create_rpmsg_vdev(void *platform, unsigned int vdev_index, unsigned int role, + void (*rst_cb)(struct virtio_device *vdev), rpmsg_ns_bind_cb ns_bind_cb) +{ + struct remoteproc *rproc = platform; + struct rpmsg_virtio_device *rpmsg_vdev; + struct virtio_device *vdev; + void *shbuf; + struct metal_io_region *shbuf_io; + struct remoteproc_priv *priv = rproc->priv; + int ret; + + rpmsg_vdev = metal_allocate_memory(sizeof(*rpmsg_vdev)); + if (!rpmsg_vdev) + return NULL; + + shbuf_io = remoteproc_get_io_with_pa(rproc, priv->share_mem_pa); + if (!shbuf_io) + goto err1; + FT_PLAT_INFO_MAIN_DEBUG_I("share_mem_pa is %p \r\n",priv->share_mem_pa); + shbuf = metal_io_phys_to_virt(shbuf_io, priv->share_mem_pa + priv->share_buffer_offset); + /* TODO: can we have a wrapper for the following two functions? */ + vdev = remoteproc_create_virtio(rproc, vdev_index, role, rst_cb); + if (!vdev) { + FT_PLAT_INFO_MAIN_DEBUG_E("failed remoteproc_create_virtio\r\n"); + goto err1; + } + + /* Only RPMsg virtio master needs to initialize the shared buffers pool */ + rpmsg_virtio_init_shm_pool(&priv->shpool, shbuf, priv->share_mem_size - priv->share_buffer_offset); + + /* RPMsg virtio slave can set shared buffers pool argument to NULL */ + ret = rpmsg_init_vdev(rpmsg_vdev, vdev, ns_bind_cb, shbuf_io, &priv->shpool); + if (ret) { + FT_PLAT_INFO_MAIN_DEBUG_E("failed rpmsg_init_vdev ret is %d \r\n",ret); + goto err2; + } + FT_PLAT_INFO_MAIN_DEBUG_I("initializing rpmsg vdev\r\n"); + return rpmsg_virtio_get_rpmsg_device(rpmsg_vdev); + +err2: + remoteproc_remove_virtio(rproc, vdev); +err1: + metal_free_memory(rpmsg_vdev); + return NULL; +} + +int platform_poll(void *priv) +{ + struct remoteproc *rproc = priv; + struct remoteproc_priv *prproc; + unsigned int flags; + int ret; + + + prproc = rproc->priv; + while(1) { +#ifndef CONFIG_USE_OPENAMP_IPI + if (metal_io_read32(prproc->kick_io, 0) & POLL_STOP) { //RPROC_M2S_SHIFT + ret = remoteproc_get_notification(rproc, RSC_NOTIFY_ID_ANY); + if (ret) + return ret; + break; + } + (void)flags; +#else /* !RPMSG_NO_IPI */ + flags = metal_irq_save_disable(); + if (!(atomic_flag_test_and_set(&prproc->ipi_nokick))) + { + metal_irq_restore_enable(flags); + ret = remoteproc_get_notification(rproc, RSC_NOTIFY_ID_ANY); + if (ret) + return ret; + break; + } + _rproc_wait() ; + metal_irq_restore_enable(flags); +#endif /* RPMSG_NO_IPI */ + } + return 0; +} + +int platform_poll_nonblocking(void *priv) +{ + struct remoteproc *rproc = priv; + struct remoteproc_priv *prproc; + unsigned int flags; + int ret; + + + prproc = rproc->priv; + +#ifndef CONFIG_USE_OPENAMP_IPI + if (metal_io_read32(prproc->kick_io, 0) & POLL_STOP) { //RPROC_M2S_SHIFT + ret = remoteproc_get_notification(rproc, RSC_NOTIFY_ID_ANY); + if (ret) + return ret; + } + (void)flags; +#else /* !RPMSG_NO_IPI */ + flags = metal_irq_save_disable(); + if (!(atomic_flag_test_and_set(&prproc->ipi_nokick))) + { + metal_irq_restore_enable(flags); + ret = remoteproc_get_notification(rproc, RSC_NOTIFY_ID_ANY); + if (ret) + return ret; + } + metal_irq_restore_enable(flags); +#endif /* RPMSG_NO_IPI */ + return 0; +} + +void platform_release_rpmsg_vdev(struct rpmsg_device *rpdev, void *platform) +{ + struct rpmsg_virtio_device *rpvdev; + struct remoteproc *rproc; + + rpvdev = metal_container_of(rpdev, struct rpmsg_virtio_device, rdev); + rproc = platform; + + rpmsg_deinit_vdev(rpvdev); + remoteproc_remove_virtio(rproc, rpvdev->vdev); +} + +void platform_cleanup(void *platform) +{ + struct remoteproc *rproc = platform; + + if (rproc) + remoteproc_remove(rproc); + cleanup_system(); +}
\ No newline at end of file diff --git a/bsp/phytium/libraries/port/openamp_port/machine/phytium/platform_info.h b/bsp/phytium/libraries/port/openamp_port/machine/phytium/platform_info.h new file mode 100644 index 0000000000..5cb062b66b --- /dev/null +++ b/bsp/phytium/libraries/port/openamp_port/machine/phytium/platform_info.h @@ -0,0 +1,100 @@ +/* + * Copyright (C) 2024, Phytium Technology Co., Ltd. All Rights Reserved. + * + * Licensed under the BSD 3-Clause License (the "License"); you may not use + * this file except in compliance with the License. You may obtain a copy of + * the License at + * + * https://opensource.org/licenses/BSD-3-Clause + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * + * FilePath: platform_info.h + * Created Date: 2024-04-28 17:13:17 + * Last Modified: 2024-06-26 14:47:43 + * Description: This file is for + * + * Modify History: + * Ver Who Date Changes + * ----- ---------- -------- --------------------------------- + */ +#ifndef PLATFORM_INFO_H_ +#define PLATFORM_INFO_H_ + +/***************************** Include Files *********************************/ +#include <openamp/remoteproc.h> +#include <openamp/virtio.h> +#include <openamp/rpmsg.h> +#include <openamp/rpmsg_virtio.h> +#include "sdkconfig.h" +#include "ftypes.h" +#include "platform_info_common.h" + +/************************** Constant Definitions *****************************/ + +/************************** Variable Definitions *****************************/ + +#if defined __cplusplus +extern "C" { +#endif + +/***************** Macros (Inline Functions) Definitions *********************/ +/* 需要宇linux 进行沟通 */ +#define POLL_STOP 0x1U +#define REMOTE_PROC_STOP 0x0001U +/**************************** Type Definitions *******************************/ + +struct remoteproc_priv { + const char *kick_dev_name; + const char *kick_dev_bus_name; + struct metal_device *kick_dev; + struct metal_io_region *kick_io; +#ifdef CONFIG_USE_OPENAMP_IPI + atomic_int ipi_nokick; +#endif /* !RPMSG_NO_IPI */ + unsigned int cpu_id ; + /* remoteproc elf address */ + metal_phys_addr_t elf_addr; + unsigned int src_table_ready_flag ; + /* src_table memory */ + u32 src_table_attribute ; + /* share_mem_size = |tx vring|rx vring|share buffer| */ + metal_phys_addr_t share_mem_va ; + metal_phys_addr_t share_mem_pa ; + u32 share_mem_size ; + u32 share_buffer_offset ; + u32 share_mem_attribute ; + struct rpmsg_virtio_shm_pool shpool; +}; + +/************************** Function Prototypes ******************************/ + +struct remoteproc *platform_create_proc(struct remoteproc * rproc_inst,struct remoteproc_priv *priv ,struct metal_device *kick_dev) ; + +int platform_setup_src_table(struct remoteproc *rproc_inst,metal_phys_addr_t *rsc_table) ; + +int platform_setup_share_mems(struct remoteproc *rproc_inst); + +int platform_poll_nonblocking(void *priv) ; + +#ifdef CONFIG_USE_OPENAMP_IPI +unsigned int rproc_check_rsc_table_stop(struct remoteproc *rproc); +#endif + +unsigned int rproc_get_stop_flag(void); + +void rproc_set_stop_flag(void); + +void rproc_clear_stop_flag(void); + +#if defined __cplusplus +} +#endif + + +#endif diff --git a/bsp/phytium/libraries/port/openamp_port/machine/phytium/rsc_table.h b/bsp/phytium/libraries/port/openamp_port/machine/phytium/rsc_table.h new file mode 100644 index 0000000000..c0f645a05b --- /dev/null +++ b/bsp/phytium/libraries/port/openamp_port/machine/phytium/rsc_table.h @@ -0,0 +1,83 @@ +/* + * Copyright (C) 2022, Phytium Technology Co., Ltd. All Rights Reserved. + * + * Licensed under the BSD 3-Clause License (the "License"); you may not use + * this file except in compliance with the License. You may obtain a copy of + * the License at + * + * https://opensource.org/licenses/BSD-3-Clause + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * + * FilePath: rsc_table.h + * Date: 2022-02-23 11:24:12 + * LastEditTime: 2022-02-23 11:44:06 + * Description: This file populates resource table for BM remote + * + * Modify History: + * Ver Who Date Changes + * ----- ------ -------- -------------------------------------- + * 1.0 huanghe 2022/03/06 first release + */ + + +#ifndef RSC_TABLE_H +#define RSC_TABLE_H + +/***************************** Include Files *********************************/ + +#include <stddef.h> +#include <openamp/open_amp.h> + +#if defined __cplusplus +extern "C" { +#endif + +#define NO_RESOURCE_ENTRIES 8 + +#define __section_t(S) __attribute__((__section__(#S))) +#define __resource __section_t(.resource_table) + +#define RPMSG_IPU_C0_FEATURES 1 + +/* VirtIO rpmsg device id */ +#define VIRTIO_ID_RPMSG_ 7 + +/* notifyid is a unique rproc-wide notify index for this vdev */ +#define VDEV_NOTIFYID 0 +/* Remote supports Name Service announcement */ +#define VIRTIO_RPMSG_F_NS 0 + +#define NUM_VRINGS 0x02 +#define VRING_ALIGN 0x1000 +#define RING_TX CONFIG_VRING_TX_ADDR +#define RING_RX CONFIG_VRING_RX_ADDR + + +#define NUM_TABLE_ENTRIES 1 + + +/**************************** Type Definitions *******************************/ + +/* Resource table for the given remote */ +struct remote_resource_table { + unsigned int version; + unsigned int num; + unsigned int reserved[2]; + unsigned int offset[NO_RESOURCE_ENTRIES]; + /* rpmsg vdev entry */ + struct fw_rsc_vdev rpmsg_vdev; + struct fw_rsc_vdev_vring rpmsg_vring0; + struct fw_rsc_vdev_vring rpmsg_vring1; +}__attribute__((packed, aligned(0x1000))); + +#if defined __cplusplus +} +#endif + +#endif /* RSC_TABLE_H */ diff --git a/bsp/phytium/libraries/port/openamp_port/system/generic/machine/phytium/helper.c b/bsp/phytium/libraries/port/openamp_port/system/generic/machine/phytium/helper.c new file mode 100644 index 0000000000..dc32e86817 --- /dev/null +++ b/bsp/phytium/libraries/port/openamp_port/system/generic/machine/phytium/helper.c @@ -0,0 +1,78 @@ +/* + * Copyright (C) 2022, Phytium Technology Co., Ltd. All Rights Reserved. + * + * Licensed under the BSD 3-Clause License (the "License"); you may not use + * this file except in compliance with the License. You may obtain a copy of + * the License at + * + * https://opensource.org/licenses/BSD-3-Clause + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * + * FilePath: helper.c + * Date: 2022-01-03 13:04:02 + * LastEditTime: 2022-01-06 21:51:08 + * Description: This file is for helper + * + * Modify History: + * Ver Who Date Changes + * ----- ------ -------- -------------------------------------- + * 1.0 huanghe 2022/03/06 first release + */ + +#include <metal/sys.h> +#include "platform_info.h" +#include "stdio.h" +#include "fcache.h" + +static void system_metal_logger(enum metal_log_level level, + const char *format, ...) +{ + char msg[1024]; + va_list args; + static const char * const level_strs[] = { + "metal: emergency: ", + "metal: alert: ", + "metal: critical: ", + "metal: error: ", + "metal: warning: ", + "metal: notice: ", + "metal: info: ", + "metal: debug: ", + }; + + va_start(args, format); + vsnprintf(msg, sizeof(msg), format, args); + va_end(args); + + if (level <= METAL_LOG_EMERGENCY || level > METAL_LOG_DEBUG) + level = METAL_LOG_EMERGENCY; + + printf("%s%s", level_strs[level], msg); +} + +/* Main hw machinery initialization entry point, called from main()*/ +/* return 0 on success */ +int init_system(void) +{ + int ret; + struct metal_init_params metal_param = { + .log_handler = system_metal_logger, + .log_level = METAL_LOG_INFO, + }; + + /* Low level abstraction layer for openamp initialization */ + ret = metal_init(&metal_param); + return ret; +} + +void cleanup_system(void) +{ + metal_finish(); + __asm_invalidate_icache_all(); +} diff --git a/bsp/phytium/libraries/port/openamp_port/system/generic/machine/phytium/helper.h b/bsp/phytium/libraries/port/openamp_port/system/generic/machine/phytium/helper.h new file mode 100644 index 0000000000..5a7428e371 --- /dev/null +++ b/bsp/phytium/libraries/port/openamp_port/system/generic/machine/phytium/helper.h @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2024, Phytium Technology Co., Ltd. All Rights Reserved. + * + * Licensed under the BSD 3-Clause License (the "License"); you may not use + * this file except in compliance with the License. You may obtain a copy of + * the License at + * + * https://opensource.org/licenses/BSD-3-Clause + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * + * FilePath: helper.h + * Created Date: 2024-05-14 10:51:06 + * Last Modified: 2024-07-03 11:21:58 + * Description: This file is for helper functions. + * + * Modify History: + * Ver Who Date Changes + * ----- ---------- -------- --------------------------------- + * 1.0 liusm 2024-05-14 10:51:06 First version. + */ + +#ifndef HELPER_H_ +#define HELPER_H_ + +#include "ftypes.h" + +#if defined __cplusplus +extern "C" { +#endif + +int init_system(void); +void cleanup_system(void); + +#if defined __cplusplus +} +#endif + +#endif /* */ diff --git a/bsp/phytium/libraries/port/soc_port/pe220x/memory_map.c b/bsp/phytium/libraries/port/soc_port/pe220x/memory_map.c index 80d41ad3ae..63c24a8504 100644 --- a/bsp/phytium/libraries/port/soc_port/pe220x/memory_map.c +++ b/bsp/phytium/libraries/port/soc_port/pe220x/memory_map.c @@ -51,6 +51,14 @@ struct mem_desc platform_mem_desc[] = 0x80000000, NORMAL_MEM }, +#if defined(USE_OPENAMP) + { + 0xb0000000, + (0xb0000000 + 0x20000000 - 1), + 0xb0000000, + NORMAL_MEM + }, +#endif { 0x00080000U, 0x32B36FFFU, diff --git a/bsp/phytium/libraries/system_example/Kconfig b/bsp/phytium/libraries/system_example/Kconfig new file mode 100644 index 0000000000..8f1d276c96 --- /dev/null +++ b/bsp/phytium/libraries/system_example/Kconfig @@ -0,0 +1,10 @@ +menu "System Example" + config BSP_USING_SYSTEM_EXAMPLE + bool "Enable system example" + default n + if BSP_USING_SYSTEM_EXAMPLE + config BSP_USING_OPENAMP_EXAMPLE + bool "Enable OpenAMP Example" + default n + endif +endmenu
\ No newline at end of file diff --git a/bsp/phytium/libraries/system_example/openamp/README.md b/bsp/phytium/libraries/system_example/openamp/README.md new file mode 100644 index 0000000000..4d29faff6b --- /dev/null +++ b/bsp/phytium/libraries/system_example/openamp/README.md @@ -0,0 +1,84 @@ +# 飞腾E2000Q开发板上运行RT-Thread OpenAMP应用（方案采用3个核心运行Linux + 1个核心运行RT-Thread） + +## 1. 前提条件 + +### master core(linux端) + +- 关于飞腾嵌入式linux的内核配置和测试代码，请参考[open-amp](https://gitee.com/phytium_embedded/phytium-embedded-docs/tree/master/open-amp) + +1. 编译Linux内核文档参考《飞腾嵌入式OpenAMP技术解决方案与用户操作手册v1.7.1.pdf》 + +### slaver core(rt-thread端) + +- 实现方式为linux端通过动态加载elf文件的方法，将编译出含rt-thread的elf文件加载到指定核心中运行，实现rt-thread与linux在飞腾E2000Q上同时运行并且实现信息交互，其中linux可以动态控制rt-thread核心运行和停止等操作，并且可以重复加载elf文件实现核心功能的热插拔，无需断电烧录。 + +1. 异构核rt-thread的编译依赖，依据本例程文档，替换《飞腾嵌入式OpenAMP技术解决方案与用户操作手册v1.7.1.pdf》中描述的裸机standalone的源码，编译生成rtthread_a64.elf文件。 + +> 注：因为rt-thread的openamp的版本与飞腾嵌入式linux内核已经适配的openamp版本存在差异问题，考虑到飞腾后续修改适配工作量和可维护性，本例程并未采用rt-thread的第三方openamp版本，而是采用飞腾裸机standalone使用openamp移植版本。具体参阅[多元异构系统部署 V1.1](https://gitee.com/phytium_embedded/phytium-standalone-sdk/tree/master/example/system/amp) + +## 2. 运行效果 + +- 编译完成后，将编译生成的rtthread_a64.elf（目前rt-thread只进行了aarch64适配）文件拷贝到linux端的/lib/firmware目录下并改名为openamp_core0.elf文件，使用命令将其加载到slaver core中运行。 + +如下图(串口工具打印)： + + + +- 通过网络ssh登录linux端(rt-thread会占用串口)，使用命令强制停止rt-thread的核心运行： + + + + + +- 停止后我们再次运行加载elf文件运行rt-thread，此时我们通过ssh登录linux端，使用命令查看是否创建rpmsg设备： + +```bash +ls /sys/bus/rpmsg/devices/ +``` + +如果存在`virtio0.rpmsg-openamp-demo-channel.-1.0`文件，则表示建立了rpmsg设备,再使用命令绑定。 + +```bash +echo rpmsg_chrdev > /sys/bus/rpmsg/devices/virtio0.rpmsg-openamp-demo-channel.-1.0/driver_override +modprobe rpmsg_char +``` + +### 交互测试： + +- 绑定成功后，我们可以使用[open-amp](https://gitee.com/phytium_embedded/phytium-embedded-docs/tree/master/open-amp)目录下的例子程序进行测试，以rpmsg-demo-single.c为例(通过gcc编译出rpmsg-demo-single文件，目前暂时只支持rt-thread单核,aarch64架构)测试结果如下图： + +1.交互消息测试 + +```bash +./rpmsg-demo-single +``` + +linux端： + + + +rt-thread端： + + + +2.停止消息测试 + +```bash +./rpmsg-demo-single stop 0 +``` + +linux端： + + + +rt-thread端： + + + +> 注：通过发送消息使rt-thread的核心停止运行后，linux端仍然需要使用命令回收资源： + +```bash +echo stop > /sys/class/remoteproc/remoteproc0/state +``` + +- 可以重复加载elf文件实现核心功能的热插拔，无需断电烧录。 diff --git a/bsp/phytium/libraries/system_example/openamp/image/README/1748426302793.png b/bsp/phytium/libraries/system_example/openamp/image/README/1748426302793.png Binary files differnew file mode 100644 index 0000000000..5f746a11ad --- /dev/null +++ b/bsp/phytium/libraries/system_example/openamp/image/README/1748426302793.png diff --git a/bsp/phytium/libraries/system_example/openamp/image/README/1748428941459.png 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SLAVE_01_SGI KICK_SGI_NUM_10 + +#if defined __cplusplus +} +#endif + +#endif /* LIBMETAL_CONFIGS_H */ diff --git a/bsp/phytium/libraries/system_example/openamp/memory_layout.h b/bsp/phytium/libraries/system_example/openamp/memory_layout.h new file mode 100644 index 0000000000..5195497b25 --- /dev/null +++ b/bsp/phytium/libraries/system_example/openamp/memory_layout.h @@ -0,0 +1,28 @@ +#ifndef MEMORY_LAYOUT_H +#define MEMORY_LAYOUT_H + +#if defined __cplusplus +extern "C" { +#endif + +/*slave core0*/ +/* 与linux共享的内存 */ +#define SLAVE00_SOURCE_TABLE_ADDR 0xc0000000 /*与linux协商好的地址*/ +#define SLAVE00_KICK_IO_ADDR 0xc0224000 + +/* MEM = |tx vring|rx vring|share buffer| */ +#define SLAVE00_SHARE_MEM_ADDR 0xffffffff /*全F表示等待linux分配*/ +#define SLAVE00_SHARE_MEM_SIZE 0x100000 /*共享内存大小*/ +#define SLAVE00_VRING_SIZE 0x8000UL +#define SLAVE00_VRING_NUM 0x100 +#define SLAVE00_TX_VRING_ADDR 0xffffffff /*全F表示等待linux分配*/ +#define SLAVE00_RX_VRING_ADDR 0xffffffff /*全F表示等待linux分配*/ + +#define SLAVE00_SOURCE_TABLE_ATTRIBUTE (MT_NORMAL|MT_P_RW_U_NA) +#define SLAVE00_SHARE_BUFFER_ATTRIBUTE (MT_NORMAL|MT_P_RW_U_NA) + +#if defined __cplusplus +} +#endif + +#endif /* MEMORY_LAYOUT_H */ diff --git a/bsp/phytium/libraries/system_example/openamp/openamp_configs.h b/bsp/phytium/libraries/system_example/openamp/openamp_configs.h new file mode 100644 index 0000000000..9f972b64ab --- /dev/null +++ b/bsp/phytium/libraries/system_example/openamp/openamp_configs.h @@ -0,0 +1,20 @@ +#ifndef OPENAMP_CONFIGS_H +#define OPENAMP_CONFIGS_H + +#include "fmmu.h" +#include "memory_layout.h" +#include "board.h" + +#if defined __cplusplus +extern "C" { +#endif + +/* 从核发送消息时，需要指定发送的cpu的核号，用来确定软件中断的发送到哪个核上 */ + +#define MASTER_CORE_MASK 255 /* 采用协商好的方式，给所有核心都发送中断，注意：裸机接口层PhytiumProcNotify()做了区分 */ + +#if defined __cplusplus +} +#endif + +#endif /* OPENAMP_CONFIGS_H */ diff --git a/bsp/phytium/libraries/system_example/openamp/openamp_for_linux_sample.c b/bsp/phytium/libraries/system_example/openamp/openamp_for_linux_sample.c new file mode 100644 index 0000000000..fe03780127 --- /dev/null +++ b/bsp/phytium/libraries/system_example/openamp/openamp_for_linux_sample.c @@ -0,0 +1,361 @@ +#include "rtconfig.h" + +#ifdef BSP_USING_SYSTEM_EXAMPLE + +#include <openamp/open_amp.h> +#include <openamp/version.h> +#include <metal/alloc.h> +#include <metal/version.h> +#include <metal/sleep.h> +#include "platform_info.h" +#include "rpmsg_service.h" +#include "rsc_table.h" +#include "helper.h" +#include "fpsci.h" +#include "openamp_configs.h" +#include "libmetal_configs.h" +#include "fdrivers_port.h" +#include "openamp_for_linux_sample.h" + +#define OPENAMP_SLAVE_DEBUG_TAG "OPENAMP_SLAVE" +#define OPENAMP_SLAVE_ERROR(format, ...) FT_DEBUG_PRINT_E(OPENAMP_SLAVE_DEBUG_TAG, format, ##__VA_ARGS__) +#define OPENAMP_SLAVE_WARN(format, ...) FT_DEBUG_PRINT_W(OPENAMP_SLAVE_DEBUG_TAG, format, ##__VA_ARGS__) +#define OPENAMP_SLAVE_INFO(format, ...) FT_DEBUG_PRINT_I(OPENAMP_SLAVE_DEBUG_TAG, format, ##__VA_ARGS__) +#define OPENAMP_SLAVE_DEBUG(format, ...) FT_DEBUG_PRINT_D(OPENAMP_SLAVE_DEBUG_TAG, format, ##__VA_ARGS__) + +#define OPENAMP_THREAD_STACK_SIZE 2048 +#define OPENAMP_THREAD_PRIORITY 5 +#define OPENAMP_THREAD_TIMESLICE 10 + +#define MAX_DATA_LENGTH (RPMSG_BUFFER_SIZE / 2) + +#define DEVICE_CORE_START 0x0001U /* 开始任务 */ +#define DEVICE_CORE_SHUTDOWN 0x0002U /* 关闭核心 */ +#define DEVICE_CORE_CHECK 0x0003U /* 检查消息 */ + +/************************** Variable Definitions *****************************/ +static volatile int shutdown_req = 0; + +/*******************例程全局变量***********************************************/ +struct remoteproc remoteproc_slave_00; +static struct rpmsg_device *rpdev_slave_00 = NULL; + +/* 协议数据结构 */ +typedef struct { + uint32_t command; /* 命令字，占4个字节 */ + uint16_t length; /* 数据长度，占2个字节 */ + char data[MAX_DATA_LENGTH]; /* 数据内容，动态长度 */ +} ProtocolData; + +static ProtocolData protocol_data; + +/************************** 资源表定义，与linux协商一致 **********/ +static struct remote_resource_table __resource resources __attribute__((used)) = { + /* Version */ + 1, + + /* NUmber of table entries */ + NUM_TABLE_ENTRIES, + /* reserved fields */ + {0, 0,}, + + /* Offsets of rsc entries */ + { + offsetof(struct remote_resource_table, rpmsg_vdev), + }, + + /* Virtio device entry */ + { + RSC_VDEV, VIRTIO_ID_RPMSG_, VDEV_NOTIFYID, RPMSG_IPU_C0_FEATURES, 0, 0, 0, + NUM_VRINGS, {0, 0}, + }, + + /* Vring rsc entry - part of vdev rsc entry */ + {SLAVE00_TX_VRING_ADDR, VRING_ALIGN, SLAVE00_VRING_NUM, 1, 0}, + {SLAVE00_RX_VRING_ADDR, VRING_ALIGN, SLAVE00_VRING_NUM, 2, 0}, +}; + +/********** 共享内存定义，与linux协商一致 **********/ +static metal_phys_addr_t poll_phys_addr = SLAVE00_KICK_IO_ADDR; +struct metal_device kick_driver_00 = { + .name = SLAVE_00_KICK_DEV_NAME, + .bus = NULL, + .num_regions = 1, + .regions = { + { + .virt = (void *)SLAVE00_KICK_IO_ADDR, + .physmap = &poll_phys_addr, + .size = 0x1000, + .page_shift = -1UL, + .page_mask = -1UL, + .mem_flags = SLAVE00_SOURCE_TABLE_ATTRIBUTE, + .ops = {NULL}, + } + }, + .irq_num = 1,/* Number of IRQs per device */ + .irq_info = (void *)SLAVE_00_SGI, +}; + +struct remoteproc_priv slave_00_priv = { + .kick_dev_name = SLAVE_00_KICK_DEV_NAME , + .kick_dev_bus_name = KICK_BUS_NAME , + .cpu_id = MASTER_CORE_MASK,/* 给所有core发送中断 */ + + .src_table_attribute = SLAVE00_SOURCE_TABLE_ATTRIBUTE , + + /* |rx vring|tx vring|share buffer| */ + .share_mem_va = SLAVE00_SHARE_MEM_ADDR , + .share_mem_pa = SLAVE00_SHARE_MEM_ADDR , + .share_buffer_offset = SLAVE00_VRING_SIZE , + .share_mem_size = SLAVE00_SHARE_MEM_SIZE , + .share_mem_attribute = SLAVE00_SHARE_BUFFER_ATTRIBUTE +}; + +/************************** Function Prototypes ******************************/ +/*协议解析接口*/ +int parse_protocol_data(const char* input, size_t input_size, ProtocolData* output) +{ + + if (input_size < 6) { /* 确保最小长度（命令字+数据长度）*/ + return -1; /* 数据太短 */ + } + + /* 提取命令字 */ + output->command = *((uint32_t*)input); + input += 4; + + /* 提取数据长度 */ + output->length = *((uint16_t*)input); + input += 2; + + /* 检查数据长度是否超出预定义最大长度 */ + if (output->length > MAX_DATA_LENGTH) { + return -2; // 数据长度超出限制 + } + + /* 复制数据内容 */ + memcpy(output->data, input, output->length); + + return 0; /* 解析成功 */ +} + +/*协议组装接口*/ +int assemble_protocol_data(const ProtocolData* input, char* output, size_t* output_size) +{ + /* 检查预期的输出大小是否超出最大长度 */ + if (6 + input->length > MAX_DATA_LENGTH) { + return -1; /* 数据长度超出限制 */ + } + + *output_size = 6 + input->length; /* 命令字+长度+数据 */ + + /* 组装命令字 */ + *((uint32_t*)output) = input->command; + + /* 组装数据长度 */ + *((uint16_t*)(output + 4)) = input->length; + + /* 复制数据内容 */ + memcpy(output + 6, input->data, input->length); + + return 0; /* 组装成功 */ +} + +/*-----------------------------------------------------------------------------* + * RPMSG endpoint callbacks + *-----------------------------------------------------------------------------*/ +static int rpmsg_endpoint_cb(struct rpmsg_endpoint *ept, void *data, size_t len, uint32_t src, void *priv) +{ + (void)priv; + (void)src; + + int ret; + (void)priv; + printf("src:0x%x",src); + ept->dest_addr = src; + + ret = parse_protocol_data((char *)data, len, &protocol_data); + if(ret != 0) + { + OPENAMP_SLAVE_ERROR("parse protocol data error,ret:%d",ret); + return RPMSG_SUCCESS;/* 解析失败，忽略数据 */ + } + printf("command:0x%x,length:%d.",protocol_data.command,protocol_data.length); + switch (protocol_data.command) + { + case DEVICE_CORE_START: + { + break; + } + case DEVICE_CORE_SHUTDOWN: + { + shutdown_req = 1; + break; + } + case DEVICE_CORE_CHECK: + { + /* Send temp_data back to master */ + /* 请勿直接对data指针对应的内存进行写操作，操作vring中remoteproc发送通道分配的内存，引发错误的问题*/ + ret = rpmsg_send(ept, &protocol_data, len); + if (ret < 0) + { + OPENAMP_SLAVE_ERROR("rpmsg_send failed.\r\n"); + return ret; + } + break; + } + default: + break; + } + + return RPMSG_SUCCESS; +} + +static void rpmsg_service_unbind(struct rpmsg_endpoint *ept) +{ + (void)ept; + printf("unexpected Remote endpoint destroy."); + shutdown_req = 1; +} + +/*-----------------------------------------------------------------------------* + * Application + *-----------------------------------------------------------------------------*/ +static int FRpmsgEchoApp(struct rpmsg_device *rdev, void *priv) +{ + int ret = 0; + struct rpmsg_endpoint lept; + memset(&lept, 0, sizeof(lept)); + shutdown_req = 0; + /* Initialize RPMSG framework */ + printf("Try to create rpmsg endpoint.\r\n"); + + ret = rpmsg_create_ept(&lept, rdev, RPMSG_SERVICE_NAME, 0, RPMSG_ADDR_ANY, rpmsg_endpoint_cb, rpmsg_service_unbind); + if (ret) + { + OPENAMP_SLAVE_ERROR("Failed to create endpoint. %d \r\n", ret); + return -1; + } + + printf("Successfully created rpmsg endpoint.\r\n"); + + while (1) + { + platform_poll(priv); + /* we got a shutdown request, exit */ + if (shutdown_req || rproc_get_stop_flag()) + { + rproc_clear_stop_flag(); + break; + } + } + + rpmsg_destroy_ept(&lept); + + return ret; +} + + +/*-----------------------------------------------------------------------------* + * Application entry point + *-----------------------------------------------------------------------------*/ +int slave_init(void) +{ + init_system(); // Initialize the system resources and environment + //打印remoteproc_slave_00地址，slave_00_priv地址，kick_driver_00地址 + printf("remoteproc slave 00 address: 0x%x,0x%x,0x%x\r\n",&remoteproc_slave_00,&slave_00_priv,&kick_driver_00); + + if (!platform_create_proc(&remoteproc_slave_00, &slave_00_priv, &kick_driver_00)) + { + OPENAMP_SLAVE_ERROR("Failed to create remoteproc instance for slave 00\r\n"); + return -1; // Return with an error if creation fails + } + remoteproc_slave_00.rsc_table = &resources; + printf("remoteproc slave 00 rsc_table address: 0x%x\r\n",remoteproc_slave_00.rsc_table); + if (platform_setup_src_table(&remoteproc_slave_00,remoteproc_slave_00.rsc_table)) + { + OPENAMP_SLAVE_ERROR("Failed to setup src table for slave 00\r\n"); + return -1; // Return with an error if setup fails + } + + printf("Setup resource tables for the created remoteproc instances is over \r\n"); + + if (platform_setup_share_mems(&remoteproc_slave_00)) + { + OPENAMP_SLAVE_ERROR("Failed to setup shared memory for slave 00\r\n"); + return -1; // Return with an error if setup fails + } + + printf("Setup shared memory regions for both remoteproc instances is over \r\n"); + + rpdev_slave_00 = platform_create_rpmsg_vdev(&remoteproc_slave_00, 0, VIRTIO_DEV_DEVICE, NULL, NULL); + if (!rpdev_slave_00) + { + OPENAMP_SLAVE_ERROR("Failed to create rpmsg vdev for slave 00\r\n"); + return -1; // Return with an error if creation fails + } + printf("platform_create_rpmsg_vdev for slave 00 is over\r\n "); + return 0; +} + +static void RpmsgEchoTask(void * args) +{ + int ret; + printf("openamp lib version: %s (", openamp_version()); + printf("Major: %d, ", openamp_version_major()); + printf("Minor: %d, ", openamp_version_minor()); + printf("Patch: %d)\r\n", openamp_version_patch()); + + printf("libmetal lib version: %s (", metal_ver()); + printf("Major: %d, ", metal_ver_major()); + printf("Minor: %d, ", metal_ver_minor()); + printf("Patch: %d)\r\n", metal_ver_patch()); + + /* Initialize platform */ + printf("start application..."); + if(!slave_init()) + { + ret = FRpmsgEchoApp(rpdev_slave_00,&remoteproc_slave_00); + if (ret) + { + OPENAMP_SLAVE_ERROR("Failed to running echoapp"); + platform_cleanup(&remoteproc_slave_00); + } + platform_release_rpmsg_vdev(rpdev_slave_00, &remoteproc_slave_00); + printf("Stopping application...\r\n"); + platform_cleanup(&remoteproc_slave_00); + } + else + { + platform_cleanup(&remoteproc_slave_00); + OPENAMP_SLAVE_ERROR("Failed to init remoteproc.\r\n"); + } + FPsciCpuOff(); + +} + +int creat_openamp_thread(void) +{ + rt_thread_t tid = RT_NULL; + + tid = rt_thread_create("OpenAMP", + RpmsgEchoTask, + RT_NULL, + OPENAMP_THREAD_STACK_SIZE, + OPENAMP_THREAD_PRIORITY, + OPENAMP_THREAD_TIMESLICE); + + if (tid == RT_NULL) + { + LOG_E("openamp thread create failed!"); + return -RT_ERROR; + } + + rt_thread_startup(tid); + + return RT_EOK; +} + +// INIT_PREV_EXPORT(creat_openamp_thread); + +#endif diff --git a/bsp/phytium/libraries/system_example/openamp/openamp_for_linux_sample.h b/bsp/phytium/libraries/system_example/openamp/openamp_for_linux_sample.h new file mode 100644 index 0000000000..37b3799fe0 --- /dev/null +++ b/bsp/phytium/libraries/system_example/openamp/openamp_for_linux_sample.h @@ -0,0 +1,6 @@ +#ifndef OPENAMP_FOR_LINUX_SAMPLE_H_ +#define OPENAMP_FOR_LINUX_SAMPLE_H_ + +int creat_openamp_thread(void); + +#endif /* OPENAMP_FOR_LINUX_SAMPLE_H_ */ |
