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path: root/bsp/at32/at32f435-start/board/src/at32_msp.c
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Diffstat (limited to 'bsp/at32/at32f435-start/board/src/at32_msp.c')
-rw-r--r--bsp/at32/at32f435-start/board/src/at32_msp.c95
1 files changed, 95 insertions, 0 deletions
diff --git a/bsp/at32/at32f435-start/board/src/at32_msp.c b/bsp/at32/at32f435-start/board/src/at32_msp.c
index 19f46b27fd..d8f0fa6ebf 100644
--- a/bsp/at32/at32f435-start/board/src/at32_msp.c
+++ b/bsp/at32/at32f435-start/board/src/at32_msp.c
@@ -477,3 +477,98 @@ void at32_msp_sdram_init(void *instance)
}
#endif /* BSP_USING_SDRAM */
+
+#ifdef BSP_USING_USBFS
+void at32_msp_usb_init(void *instance)
+{
+ /* defalut usb clock from hick */
+ usb_clk48_s clk_s = USB_CLK_HICK;
+
+#if defined (BSP_USING_HOST_USBFS1) || defined (BSP_USING_DEVICE_USBFS1)
+ crm_periph_clock_enable(CRM_OTGFS1_PERIPH_CLOCK, TRUE);
+#endif
+
+#if defined (BSP_USING_HOST_USBFS2) || defined (BSP_USING_DEVICE_USBFS2)
+ crm_periph_clock_enable(CRM_OTGFS2_PERIPH_CLOCK, TRUE);
+#endif
+
+ if(clk_s == USB_CLK_HICK)
+ {
+ crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
+ /* enable the acc calibration ready interrupt */
+ crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
+
+ /* update the c1\c2\c3 value */
+ acc_write_c1(7980);
+ acc_write_c2(8000);
+ acc_write_c3(8020);
+
+ /* open acc calibration */
+ acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
+ }
+ else
+ {
+ switch(system_core_clock)
+ {
+ /* 48MHz */
+ case 48000000:
+ crm_usb_clock_div_set(CRM_USB_DIV_1);
+ break;
+
+ /* 72MHz */
+ case 72000000:
+ crm_usb_clock_div_set(CRM_USB_DIV_1_5);
+ break;
+
+ /* 96MHz */
+ case 96000000:
+ crm_usb_clock_div_set(CRM_USB_DIV_2);
+ break;
+
+ /* 120MHz */
+ case 120000000:
+ crm_usb_clock_div_set(CRM_USB_DIV_2_5);
+ break;
+
+ /* 144MHz */
+ case 144000000:
+ crm_usb_clock_div_set(CRM_USB_DIV_3);
+ break;
+
+ /* 168MHz */
+ case 168000000:
+ crm_usb_clock_div_set(CRM_USB_DIV_3_5);
+ break;
+
+ /* 192MHz */
+ case 192000000:
+ crm_usb_clock_div_set(CRM_USB_DIV_4);
+ break;
+
+ /* 216MHz */
+ case 216000000:
+ crm_usb_clock_div_set(CRM_USB_DIV_4_5);
+ break;
+
+ /* 240MHz */
+ case 240000000:
+ crm_usb_clock_div_set(CRM_USB_DIV_5);
+ break;
+
+ /* 264MHz */
+ case 264000000:
+ crm_usb_clock_div_set(CRM_USB_DIV_5_5);
+ break;
+
+ /* 288MHz */
+ case 288000000:
+ crm_usb_clock_div_set(CRM_USB_DIV_6);
+ break;
+
+ default:
+ break;
+ }
+ }
+}
+
+#endif /* BSP_USING_USBFS */