diff options
Diffstat (limited to 'bsp/efm32')
35 files changed, 4849 insertions, 4849 deletions
diff --git a/bsp/efm32/application.c b/bsp/efm32/application.c index 12949a39c8..4ca58fe6ec 100644 --- a/bsp/efm32/application.c +++ b/bsp/efm32/application.c @@ -77,8 +77,8 @@ struct photo_event { struct rtgui_event_win win; rt_uint32_t cmd; - rt_uint8_t* path; - rt_uint8_t* format; + rt_uint8_t* path; + rt_uint8_t* format; }; /* Private defines -----------------------------------------------------------*/ @@ -95,10 +95,10 @@ volatile rt_uint32_t rt_system_status = 0; #if defined(RT_USING_RTGUI) static rt_bool_t pic_view_event_handler(rtgui_object_t *object, rtgui_event_t *event) { - rt_bool_t result; + rt_bool_t result; rt_bool_t load = RT_FALSE; - result = rtgui_container_event_handler(object, event); + result = rtgui_container_event_handler(object, event); switch(event->type) { @@ -108,27 +108,27 @@ static rt_bool_t pic_view_event_handler(rtgui_object_t *object, rtgui_event_t *e case RTGUI_EVENT_MOUSE_BUTTON: { - struct rtgui_event_mouse *mouse = (struct rtgui_event_mouse *)event; + struct rtgui_event_mouse *mouse = (struct rtgui_event_mouse *)event; - if (mouse->button == RTGUI_MOUSE_BUTTON_LEFT | RTGUI_MOUSE_BUTTON_UP) - { + if (mouse->button == RTGUI_MOUSE_BUTTON_LEFT | RTGUI_MOUSE_BUTTON_UP) + { rt_kprintf("APP: left click (%x)\n", mouse->button); - } + } } break; } if (load) - { - struct rtgui_dc* dc; - rtgui_rect_t rect; + { + struct rtgui_dc* dc; + rtgui_rect_t rect; rtgui_image_t* image; image = rtgui_image_create_from_file("jpg", "/test9.jpg", RT_FALSE); // image = rtgui_image_create_from_file("bmp", "/test_565.bmp", RT_FALSE); - dc = rtgui_dc_begin_drawing(RTGUI_WIDGET(object)); - if (dc == RT_NULL) + dc = rtgui_dc_begin_drawing(RTGUI_WIDGET(object)); + if (dc == RT_NULL) { return result; } @@ -138,9 +138,9 @@ static rt_bool_t pic_view_event_handler(rtgui_object_t *object, rtgui_event_t *e rect.x1 +=10; rect.y1 +=10; - if (image != RT_NULL) + if (image != RT_NULL) { - rtgui_image_blit(image, dc, &rect); + rtgui_image_blit(image, dc, &rect); rtgui_image_destroy(image); } else @@ -148,10 +148,10 @@ static rt_bool_t pic_view_event_handler(rtgui_object_t *object, rtgui_event_t *e rt_kprintf("APP err: no image found!\n"); } - rtgui_dc_end_drawing(dc, RT_TRUE); - } + rtgui_dc_end_drawing(dc, RT_TRUE); + } - return result; + return result; } static void app_main(void *parameter) @@ -169,21 +169,21 @@ static void app_main(void *parameter) lcd->control(lcd, RTGRAPHIC_CTRL_GET_INFO, (void *)&lcd_info); rt_kprintf("LCD size: %dX%d\n", lcd_info.width, lcd_info.height); - /* create application */ - struct rtgui_app *app; - app = rtgui_app_create("gui_app"); - if (app == RT_NULL) + /* create application */ + struct rtgui_app *app; + app = rtgui_app_create("gui_app"); + if (app == RT_NULL) { rt_kprintf("Create application \"gui_app\" failed!\n"); return; } - struct rtgui_rect rect1, rect2, rect3; + struct rtgui_rect rect1, rect2, rect3; struct rtgui_win *win_info, *win_main, *win_hello; - struct rtgui_container *container; + struct rtgui_container *container; struct rtgui_label* label; - rtgui_graphic_driver_get_rect(rtgui_graphic_driver_get_default(), &rect1); + rtgui_graphic_driver_get_rect(rtgui_graphic_driver_get_default(), &rect1); rect2.x1 = rect1.x1; rect2.y1 = 25; rect2.x2 = rect1.x2; @@ -191,106 +191,106 @@ static void app_main(void *parameter) rect1.y2 = 25; /* create info window */ - win_info = rtgui_win_create(RT_NULL, "info", + win_info = rtgui_win_create(RT_NULL, "info", &rect1, RTGUI_WIN_STYLE_NO_BORDER | RTGUI_WIN_STYLE_NO_TITLE); - if (win_info == RT_NULL) - { + if (win_info == RT_NULL) + { rt_kprintf("Create window \"info\" failed!\n"); - rtgui_app_destroy(app); + rtgui_app_destroy(app); return; - } + } /* create container in info window */ - container = rtgui_container_create(); - if (container == RT_NULL) - { + container = rtgui_container_create(); + if (container == RT_NULL) + { rt_kprintf("Create container failed!\n"); - return; - } - rtgui_widget_set_rect(RTGUI_WIDGET(container), &rect1); + return; + } + rtgui_widget_set_rect(RTGUI_WIDGET(container), &rect1); rtgui_container_add_child(RTGUI_CONTAINER(win_info), RTGUI_WIDGET(container)); /* create lable in info window */ - label = rtgui_label_create("RT-Thread & RTGUI"); + label = rtgui_label_create("RT-Thread & RTGUI"); if (label == RT_NULL) { rt_kprintf("Create lable failed!\n"); return; } - RTGUI_WIDGET_TEXTALIGN(RTGUI_WIDGET(label)) = RTGUI_ALIGN_LEFT; - RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(label)) = red; + RTGUI_WIDGET_TEXTALIGN(RTGUI_WIDGET(label)) = RTGUI_ALIGN_LEFT; + RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(label)) = red; RTGUI_WIDGET_FOREGROUND(RTGUI_WIDGET(label)) = white; - rect3.x1 = rect1.x1 + 5; - rect3.y1 = rect1.y1 + 5; - rect3.x2 = rect1.x2 - 5; - rect3.y2 = rect1.y2 - 5; - rtgui_widget_set_rect(RTGUI_WIDGET(label), &rect3); - rtgui_container_add_child(container, RTGUI_WIDGET(label)); + rect3.x1 = rect1.x1 + 5; + rect3.y1 = rect1.y1 + 5; + rect3.x2 = rect1.x2 - 5; + rect3.y2 = rect1.y2 - 5; + rtgui_widget_set_rect(RTGUI_WIDGET(label), &rect3); + rtgui_container_add_child(container, RTGUI_WIDGET(label)); /* create main window */ - win_main = rtgui_win_create(RT_NULL, "main", + win_main = rtgui_win_create(RT_NULL, "main", &rect2, RTGUI_WIN_STYLE_NO_BORDER | RTGUI_WIN_STYLE_NO_TITLE); - if (win_main == RT_NULL) - { + if (win_main == RT_NULL) + { rt_kprintf("Create window \"main\" failed!\n"); - rtgui_app_destroy(app); + rtgui_app_destroy(app); return; - } + } /* create container in main window */ - container = rtgui_container_create(); - if (container == RT_NULL) - { + container = rtgui_container_create(); + if (container == RT_NULL) + { rt_kprintf("Create container failed!\n"); - return; - } + return; + } - rtgui_widget_set_rect(RTGUI_WIDGET(container), &rect2); + rtgui_widget_set_rect(RTGUI_WIDGET(container), &rect2); rtgui_object_set_event_handler(RTGUI_OBJECT(container), pic_view_event_handler); rtgui_container_add_child(RTGUI_CONTAINER(win_main), RTGUI_WIDGET(container)); /* create lable in main window */ - label = rtgui_label_create("EFM32GG_DK3750 Kit"); + label = rtgui_label_create("EFM32GG_DK3750 Kit"); if (label == RT_NULL) { rt_kprintf("Create lable failed!\n"); return; } - RTGUI_WIDGET_TEXTALIGN(RTGUI_WIDGET(label)) = RTGUI_ALIGN_LEFT; - RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(label)) = white; + RTGUI_WIDGET_TEXTALIGN(RTGUI_WIDGET(label)) = RTGUI_ALIGN_LEFT; + RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(label)) = white; RTGUI_WIDGET_FOREGROUND(RTGUI_WIDGET(label)) = blue; - rect3.x1 = rect2.x1 + 5; - rect3.y1 = rect2.y1 + 5; - rect3.x2 = rect2.x2 - 5; - rect3.y2 = rect2.y1 + 20; - rtgui_widget_set_rect(RTGUI_WIDGET(label), &rect3); - rtgui_container_add_child(container, RTGUI_WIDGET(label)); + rect3.x1 = rect2.x1 + 5; + rect3.y1 = rect2.y1 + 5; + rect3.x2 = rect2.x2 - 5; + rect3.y2 = rect2.y1 + 20; + rtgui_widget_set_rect(RTGUI_WIDGET(label), &rect3); + rtgui_container_add_child(container, RTGUI_WIDGET(label)); /* create hello window */ - rect3.x1 = 80; - rect3.y1 = 50; - rect3.x2 = 320 - 80; - rect3.y2 = 240 - 50; - win_hello = rtgui_win_create(RT_NULL, "hello", + rect3.x1 = 80; + rect3.y1 = 50; + rect3.x2 = 320 - 80; + rect3.y2 = 240 - 50; + win_hello = rtgui_win_create(RT_NULL, "hello", &rect3, RTGUI_WIN_STYLE_DEFAULT); - if (win_hello == RT_NULL) - { + if (win_hello == RT_NULL) + { rt_kprintf("Create window \"hello\" failed!\n"); - rtgui_app_destroy(app); + rtgui_app_destroy(app); return; - } + } /* create a box */ rtgui_box_t *box = rtgui_box_create(RTGUI_VERTICAL, RT_NULL); - if(box == RT_NULL) + if(box == RT_NULL) { rt_kprintf("Create box failed!\n"); return; @@ -298,12 +298,12 @@ static void app_main(void *parameter) // rtgui_win_set_box(win_hello, box); label = rtgui_label_create("εη½,ηΉθ!"); - if(label == RT_NULL) + if(label == RT_NULL) { rt_kprintf("Create lable failed!\n"); return; } - RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(label)) = white; + RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(label)) = white; RTGUI_WIDGET_FOREGROUND(RTGUI_WIDGET(label)) = black; RTGUI_WIDGET(label)->align = RTGUI_ALIGN_CENTER_HORIZONTAL | RTGUI_ALIGN_CENTER_VERTICAL; rtgui_widget_set_miniwidth(RTGUI_WIDGET(label),130); @@ -322,18 +322,18 @@ static void app_main(void *parameter) static rt_bool_t photo_view_event_handler(rtgui_object_t *object, rtgui_event_t *event) { - rt_bool_t result = RT_FALSE; + rt_bool_t result = RT_FALSE; struct photo_event *photo_event = (struct photo_event *)event; - result = rtgui_container_event_handler(object, event); + result = rtgui_container_event_handler(object, event); rt_kprintf("container event %x\n", event->type); - struct rtgui_event_win* wevent = (struct rtgui_event_win*)event; + struct rtgui_event_win* wevent = (struct rtgui_event_win*)event; rt_kprintf("wevent->wid %x\n", wevent->wid); if ((event->type == RTGUI_EVENT_COMMAND) && \ (photo_event->cmd == APP_CMD_PHOTO_FRAME)) - { + { rtgui_rect_t rect; rtgui_image_t* image; struct rtgui_dc* dc; @@ -361,25 +361,25 @@ static rt_bool_t photo_view_event_handler(rtgui_object_t *object, rtgui_event_t return RT_TRUE; } - return result; + return result; } static rt_bool_t photo_lable_event_handler(rtgui_object_t *object, rtgui_event_t *event) { - rt_bool_t result = RT_FALSE; + rt_bool_t result = RT_FALSE; - result = rtgui_label_event_handler(object, event); + result = rtgui_label_event_handler(object, event); rt_kprintf("lable event %x\n", event->type); if (event->type == RTGUI_EVENT_COMMAND) - { + { struct photo_event *photo = (struct photo_event *)event; rtgui_label_set_text((rtgui_label_t *)object, photo->path); rt_kprintf("path %s\n", photo->path); } - return result; + return result; } static void app_photo(void *parameter) @@ -399,64 +399,64 @@ static void app_photo(void *parameter) lcd->control(lcd, RTGRAPHIC_CTRL_GET_INFO, (void *)&lcd_info); rt_kprintf("LCD size: %dX%d\n", lcd_info.width, lcd_info.height); - /* create application */ - struct rtgui_app *app; - app = rtgui_app_create("pho_app"); - if (app == RT_NULL) + /* create application */ + struct rtgui_app *app; + app = rtgui_app_create("pho_app"); + if (app == RT_NULL) { rt_kprintf("Create application \"pho_app\" failed!\n"); return; } - struct rtgui_rect rect1, rect2; + struct rtgui_rect rect1, rect2; struct rtgui_win *window; - struct rtgui_container *container; + struct rtgui_container *container; struct rtgui_label* label; - rtgui_graphic_driver_get_rect(rtgui_graphic_driver_get_default(), &rect1); + rtgui_graphic_driver_get_rect(rtgui_graphic_driver_get_default(), &rect1); /* create window */ - window = rtgui_win_create(RT_NULL, "photo", + window = rtgui_win_create(RT_NULL, "photo", &rect1, RTGUI_WIN_STYLE_NO_BORDER | RTGUI_WIN_STYLE_NO_TITLE); - if (window == RT_NULL) - { + if (window == RT_NULL) + { rt_kprintf("Create window \"photo\" failed!\n"); - rtgui_app_destroy(app); + rtgui_app_destroy(app); return; - } + } event->win.wid = window; /* create container */ - container = rtgui_container_create(); - if (container == RT_NULL) - { + container = rtgui_container_create(); + if (container == RT_NULL) + { rt_kprintf("Create container failed!\n"); - return; - } - rtgui_widget_set_rect(RTGUI_WIDGET(container), &rect1); + return; + } + rtgui_widget_set_rect(RTGUI_WIDGET(container), &rect1); rtgui_object_set_event_handler(RTGUI_OBJECT(container), photo_view_event_handler); rtgui_container_add_child(RTGUI_CONTAINER(window), RTGUI_WIDGET(container)); /* create lable in info window */ - label = rtgui_label_create("Photo Frame Demo"); + label = rtgui_label_create("Photo Frame Demo"); if (label == RT_NULL) { rt_kprintf("Create lable failed!\n"); return; } - RTGUI_WIDGET_TEXTALIGN(RTGUI_WIDGET(label)) = RTGUI_ALIGN_LEFT; - RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(label)) = white; + RTGUI_WIDGET_TEXTALIGN(RTGUI_WIDGET(label)) = RTGUI_ALIGN_LEFT; + RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(label)) = white; RTGUI_WIDGET_FOREGROUND(RTGUI_WIDGET(label)) = blue; rect2.x1 = rect1.x1; rect2.y1 = rect1.y1; rect2.x2 = rect1.x2; rect2.y2 = 15; - rtgui_widget_set_rect(RTGUI_WIDGET(label), &rect2); + rtgui_widget_set_rect(RTGUI_WIDGET(label), &rect2); rtgui_object_set_event_handler(RTGUI_OBJECT(label), photo_lable_event_handler); - rtgui_container_add_child(container, RTGUI_WIDGET(label)); + rtgui_container_add_child(container, RTGUI_WIDGET(label)); rtgui_win_show(window, RT_FALSE); diff --git a/bsp/efm32/board.c b/bsp/efm32/board.c index cdd44767f1..ea8b0640d2 100644 --- a/bsp/efm32/board.c +++ b/bsp/efm32/board.c @@ -1,8 +1,8 @@ /***************************************************************************//** - * @file board.c - * @brief Board support of RT-Thread RTOS for EFM32 + * @file board.c + * @brief Board support of RT-Thread RTOS for EFM32 * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -10,12 +10,12 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes - * 2010-12-21 onelife Initial creation for EFM32 - * 2011-05-06 onelife Add EFM32 development kit and SPI Flash support - * 2011-07-12 onelife Add SWO output enable function - * 2011-12-08 onelife Add giant gecko development kit support - * 2011-12-09 onelife Add giant gecko support + * Date Author Notes + * 2010-12-21 onelife Initial creation for EFM32 + * 2011-05-06 onelife Add EFM32 development kit and SPI Flash support + * 2011-07-12 onelife Add SWO output enable function + * 2011-12-08 onelife Add giant gecko development kit support + * 2011-12-09 onelife Add giant gecko support * 2011-12-09 onelife Add LEUART module support * 2011-12-14 onelife Add LFXO enabling routine in driver initialization * function @@ -37,19 +37,19 @@ /* Private typedef -----------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/ -#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == RAM_MEM_BASE) || \ - ((VECTTAB) == FLASH_MEM_BASE)) -#define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) +#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == RAM_MEM_BASE) || \ + ((VECTTAB) == FLASH_MEM_BASE)) +#define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) /***************************************************************************//** * @addtogroup SysTick_clock_source * @{ ******************************************************************************/ #define SysTick_CLKSource_MASK ((rt_uint32_t)0x00000004) -#define SysTick_CLKSource_RTC ((rt_uint32_t)0x00000000) -#define SysTick_CLKSource_HFCORECLK ((rt_uint32_t)0x00000004) -#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_RTC) || \ - ((SOURCE) == SysTick_CLKSource_HFCORECLK)) +#define SysTick_CLKSource_RTC ((rt_uint32_t)0x00000000) +#define SysTick_CLKSource_HFCORECLK ((rt_uint32_t)0x00000004) +#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_RTC) || \ + ((SOURCE) == SysTick_CLKSource_HFCORECLK)) /***************************************************************************//** * @} ******************************************************************************/ @@ -67,20 +67,20 @@ * @note * * @param[in] NVIC_VectTab - * Indicate the vector table is allocated in RAM or ROM + * Indicate the vector table is allocated in RAM or ROM * * @param[in] Offset * The vector table offset ******************************************************************************/ static void NVIC_SetVectorTable( - rt_uint32_t NVIC_VectTab, - rt_uint32_t Offset) + rt_uint32_t NVIC_VectTab, + rt_uint32_t Offset) { - /* Check the parameters */ - RT_ASSERT(IS_NVIC_VECTTAB(NVIC_VectTab)); - RT_ASSERT(IS_NVIC_OFFSET(Offset)); + /* Check the parameters */ + RT_ASSERT(IS_NVIC_VECTTAB(NVIC_VectTab)); + RT_ASSERT(IS_NVIC_OFFSET(Offset)); - SCB->VTOR = NVIC_VectTab | (Offset & (rt_uint32_t)0x1FFFFF80); + SCB->VTOR = NVIC_VectTab | (Offset & (rt_uint32_t)0x1FFFFF80); } /***************************************************************************//** @@ -95,19 +95,19 @@ static void NVIC_SetVectorTable( static void NVIC_Configuration(void) { #ifdef VECT_TAB_RAM - /* Set the vector table allocated at 0x20000000 */ - NVIC_SetVectorTable(RAM_MEM_BASE, 0x0); + /* Set the vector table allocated at 0x20000000 */ + NVIC_SetVectorTable(RAM_MEM_BASE, 0x0); #else /* VECT_TAB_FLASH */ - /* Set the vector table allocated at 0x00000000 */ - NVIC_SetVectorTable(FLASH_MEM_BASE, 0x0); + /* Set the vector table allocated at 0x00000000 */ + NVIC_SetVectorTable(FLASH_MEM_BASE, 0x0); #endif - /* Set NVIC Preemption Priority Bits: 0 bit for pre-emption, 4 bits for - subpriority */ - NVIC_SetPriorityGrouping(0x7UL); + /* Set NVIC Preemption Priority Bits: 0 bit for pre-emption, 4 bits for + subpriority */ + NVIC_SetPriorityGrouping(0x7UL); - /* Set Base Priority Mask Register */ - __set_BASEPRI(EFM32_BASE_PRI_DEFAULT); + /* Set Base Priority Mask Register */ + __set_BASEPRI(EFM32_BASE_PRI_DEFAULT); } /***************************************************************************//** @@ -119,13 +119,13 @@ static void NVIC_Configuration(void) * @note * * @param[in] SysTick_CLKSource - * Specifies the SysTick clock source. + * Specifies the SysTick clock source. * * @arg SysTick_CLKSource_HCLK_Div8 - * AHB clock divided by 8 selected as SysTick clock source. + * AHB clock divided by 8 selected as SysTick clock source. * * @arg SysTick_CLKSource_HCLK - * AHB clock selected as SysTick clock source. + * AHB clock selected as SysTick clock source. ******************************************************************************/ static void SysTick_CLKSourceConfig(rt_uint32_t SysTick_CLKSource) { @@ -184,14 +184,14 @@ static void SysTick_Configuration(void) /* Start LETIMER0 */ LETIMER_Init(LETIMER0, &letimerInit); #else - rt_uint32_t coreClk; - rt_uint32_t cnts; + rt_uint32_t coreClk; + rt_uint32_t cnts; - coreClk = SystemCoreClockGet(); - cnts = coreClk / RT_TICK_PER_SECOND; + coreClk = SystemCoreClockGet(); + cnts = coreClk / RT_TICK_PER_SECOND; - SysTick_Config(cnts); - SysTick_CLKSourceConfig(SysTick_CLKSource_HFCORECLK); + SysTick_Config(cnts); + SysTick_CLKSourceConfig(SysTick_CLKSource_HFCORECLK); #endif } @@ -206,9 +206,9 @@ static void SysTick_Configuration(void) ******************************************************************************/ void Swo_Configuration(void) { - rt_uint32_t *dwt_ctrl = (rt_uint32_t *) 0xE0001000; - rt_uint32_t *tpiu_prescaler = (rt_uint32_t *) 0xE0040010; - rt_uint32_t *tpiu_protocol = (rt_uint32_t *) 0xE00400F0; + rt_uint32_t *dwt_ctrl = (rt_uint32_t *) 0xE0001000; + rt_uint32_t *tpiu_prescaler = (rt_uint32_t *) 0xE0040010; + rt_uint32_t *tpiu_protocol = (rt_uint32_t *) 0xE00400F0; CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_GPIO; /* Enable Serial wire output pin */ @@ -258,12 +258,12 @@ void Swo_Configuration(void) ******************************************************************************/ void rt_hw_board_init(void) { - /* Chip errata */ - CHIP_Init(); + /* Chip errata */ + CHIP_Init(); /* Initialize DVK board register access */ #if defined(EFM32_GXXX_DK) - DVK_init(); + DVK_init(); #elif defined(EFM32GG_DK3750) DVK_init(DVK_Init_EBI); @@ -272,12 +272,12 @@ void rt_hw_board_init(void) DVK_clearInterruptFlags(BC_INTFLAG_MASK); #endif - /* config NVIC Configuration */ - NVIC_Configuration(); + /* config NVIC Configuration */ + NVIC_Configuration(); #if defined(EFM32_USING_HFXO) - /* Configure external oscillator */ - SystemHFXOClockSet(EFM32_HFXO_FREQUENCY); + /* Configure external oscillator */ + SystemHFXOClockSet(EFM32_HFXO_FREQUENCY); /* Switching the CPU clock source to HFXO */ CMU_ClockSelectSet(cmuClock_HF, cmuSelect_HFXO); @@ -293,15 +293,15 @@ void rt_hw_board_init(void) #if defined(EFM32_SWO_ENABLE) /* Enable SWO */ - Swo_Configuration(); + Swo_Configuration(); #endif - /* Enable high frequency peripheral clock */ - CMU_ClockEnable(cmuClock_HFPER, true); - /* Enabling clock to the interface of the low energy modules */ - CMU_ClockEnable(cmuClock_CORELE, true); + /* Enable high frequency peripheral clock */ + CMU_ClockEnable(cmuClock_HFPER, true); + /* Enabling clock to the interface of the low energy modules */ + CMU_ClockEnable(cmuClock_CORELE, true); /* Enable GPIO clock */ - CMU_ClockEnable(cmuClock_GPIO, true); + CMU_ClockEnable(cmuClock_GPIO, true); /* Configure the SysTick */ SysTick_Configuration(); @@ -318,8 +318,8 @@ void rt_hw_board_init(void) ******************************************************************************/ void rt_hw_driver_init(void) { - /* Initialize DMA */ - rt_hw_dma_init(); + /* Initialize DMA */ + rt_hw_dma_init(); /* Select LFXO for specified module (and wait for it to stabilize) */ #if (!defined(EFM32_USING_LFXO) && defined(RT_USING_RTC)) @@ -331,11 +331,11 @@ void rt_hw_driver_init(void) #error "Low frequency clock source is needed for using LEUART" #endif - /* Initialize USART */ + /* Initialize USART */ #if (defined(RT_USING_USART0) || defined(RT_USING_USART1) || \ defined(RT_USING_USART2) || defined(RT_USING_UART0) || \ defined(RT_USING_UART1)) - rt_hw_usart_init(); + rt_hw_usart_init(); #endif /* Initialize LEUART */ @@ -343,7 +343,7 @@ void rt_hw_driver_init(void) rt_hw_leuart_init(); #endif - /* Setup Console */ + /* Setup Console */ #if defined(EFM32_GXXX_DK) DVK_enablePeripheral(DVK_RS232A); DVK_enablePeripheral(DVK_SPI); @@ -354,31 +354,31 @@ void rt_hw_driver_init(void) DVK_enablePeripheral(DVK_RS232_LEUART); #endif #endif - rt_console_set_device(CONSOLE_DEVICE); + rt_console_set_device(CONSOLE_DEVICE); - /* Initialize Timer */ + /* Initialize Timer */ #if (defined(RT_USING_TIMER0) || defined(RT_USING_TIMER1) || defined(RT_USING_TIMER2)) - rt_hw_timer_init(); + rt_hw_timer_init(); #endif - /* Initialize ADC */ + /* Initialize ADC */ #if defined(RT_USING_ADC0) - rt_hw_adc_init(); + rt_hw_adc_init(); #endif - /* Initialize ACMP */ + /* Initialize ACMP */ #if (defined(RT_USING_ACMP0) || defined(RT_USING_ACMP1)) - rt_hw_acmp_init(); + rt_hw_acmp_init(); #endif - /* Initialize IIC */ + /* Initialize IIC */ #if (defined(RT_USING_IIC0) || defined(RT_USING_IIC1)) - rt_hw_iic_init(); + rt_hw_iic_init(); #endif - /* Initialize RTC */ + /* Initialize RTC */ #if defined(RT_USING_RTC) - rt_hw_rtc_init(); + rt_hw_rtc_init(); #endif /* Enable SPI access to MicroSD card */ diff --git a/bsp/efm32/board.h b/bsp/efm32/board.h index a97b0d9bc0..b92e10194b 100644 --- a/bsp/efm32/board.h +++ b/bsp/efm32/board.h @@ -1,8 +1,8 @@ /***************************************************************************//** - * @file board.h - * @brief Board support of RT-Thread RTOS for EFM32 + * @file board.h + * @brief Board support of RT-Thread RTOS for EFM32 * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -10,18 +10,18 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes - * 2010-12-21 onelife Initial creation for EFM32 - * 2011-05-06 onelife Add EFM32 development kit and SPI Flash support - * 2011-07-12 onelife Add prototype for SWO output enable and interrupt + * Date Author Notes + * 2010-12-21 onelife Initial creation for EFM32 + * 2011-05-06 onelife Add EFM32 development kit and SPI Flash support + * 2011-07-12 onelife Add prototype for SWO output enable and interrupt * context check functions - * 2011-12-08 onelife Add giant gecko development kit support - * 2011-12-09 onelife Add giant gecko support + * 2011-12-08 onelife Add giant gecko development kit support + * 2011-12-09 onelife Add giant gecko support * 2011-12-09 onelife Add LEUART module support * 2011-12-14 onelife Add LFXO enabling routine in driver initialization * function * 2011-12-20 onelife Move SPI Auto-CS setting to "rtconfig.h" - * 2012-05-15 onelife Modified to compatible with CMSIS v3 + * 2012-05-15 onelife Modified to compatible with CMSIS v3 ******************************************************************************/ #ifndef __BOARD_H__ #define __BOARD_H__ @@ -72,15 +72,15 @@ extern volatile rt_uint32_t rt_system_status; #define EFM32_SWO_ENABLE #endif -#define EFM32_NO_DATA (0) -#define EFM32_NO_POINTER (RT_NULL) -#define EFM32_NO_OFFSET (-1) -#define EFM32_NO_DMA (-1) +#define EFM32_NO_DATA (0) +#define EFM32_NO_POINTER (RT_NULL) +#define EFM32_NO_OFFSET (-1) +#define EFM32_NO_DMA (-1) /* SECTION: SPI Flash */ #if defined(EFM32_USING_SFLASH) -#define SFLASH_CS_PORT (gpioPortC) -#define SFLASH_CS_PIN (8) +#define SFLASH_CS_PORT (gpioPortC) +#define SFLASH_CS_PIN (8) #endif /* SECTION: Micro SD */ @@ -114,9 +114,9 @@ extern volatile rt_uint32_t rt_system_status; #endif /* SECTION: SYSTEM */ -#define EFM32_SRAM_END (SRAM_BASE + SRAM_SIZE) -#define EFM32_BASE_PRI_DEFAULT (0x0UL << 5) -#define EFM32_IRQ_PRI_DEFAULT (0x4UL << 5) +#define EFM32_SRAM_END (SRAM_BASE + SRAM_SIZE) +#define EFM32_BASE_PRI_DEFAULT (0x0UL << 5) +#define EFM32_IRQ_PRI_DEFAULT (0x4UL << 5) /* SECTION: CLOCK */ #define EFM32_USING_HFXO @@ -125,9 +125,9 @@ extern volatile rt_uint32_t rt_system_status; #if (defined(EFM32_G8XX_STK) || defined(EFM32_GXXX_DK)) #define EFM32_HFXO_FREQUENCY (32000000) #elif defined(EFM32GG_DK3750) - #define EFM32_HFXO_FREQUENCY (48000000) + #define EFM32_HFXO_FREQUENCY (48000000) #else - #define EFM32_HFXO_FREQUENCY (00000000) + #define EFM32_HFXO_FREQUENCY (00000000) #endif #endif #if defined(EFM32_USING_LFXO) @@ -141,8 +141,8 @@ extern volatile rt_uint32_t rt_system_status; #endif /* SECTION: USART */ -#define USART_RX_BUFFER_SIZE (64) -#define LEUART_RX_BUFFER_SIZE (64) +#define USART_RX_BUFFER_SIZE (64) +#define LEUART_RX_BUFFER_SIZE (64) /* Location count (start from 0) */ #if defined(_EFM32_GECKO_FAMILY) #define EFM32_USART_LOCATION_COUNT (3) @@ -155,14 +155,14 @@ extern volatile rt_uint32_t rt_system_status; #endif /* SUBSECTION: UART */ -#define UART_BAUDRATE (115200) +#define UART_BAUDRATE (115200) /* SUBSECTION: SPI */ /* Max SPI clock: HFPERCLK/2 for master, HFPERCLK/8 for slave */ -#define SPI_BAUDRATE (4000000) +#define SPI_BAUDRATE (4000000) /* SECTION: I2C */ -#define IIC_RX_BUFFER_SIZE (32) +#define IIC_RX_BUFFER_SIZE (32) #if defined(_EFM32_GECKO_FAMILY) #define EFM32_IIC_LOCATION_COUNT (4) #elif defined(_EFM32_GIANT_FAMILY) @@ -170,61 +170,61 @@ extern volatile rt_uint32_t rt_system_status; #endif /* SECTION: ADC */ -#define ADC_CALI_REF (adcRef2V5) -#define ADC_CALI_CH (adcSingleInpCh5) -#define ADC_CONVERT_FREQUENCY (7000000) +#define ADC_CALI_REF (adcRef2V5) +#define ADC_CALI_CH (adcSingleInpCh5) +#define ADC_CONVERT_FREQUENCY (7000000) #if (RT_CONSOLE_DEVICE == EFM_USART0) -#define CONSOLE_DEVICE RT_USART0_NAME +#define CONSOLE_DEVICE RT_USART0_NAME #elif (RT_CONSOLE_DEVICE == EFM_USART1) -#define CONSOLE_DEVICE RT_USART1_NAME +#define CONSOLE_DEVICE RT_USART1_NAME #elif (RT_CONSOLE_DEVICE == EFM_USART2) -#define CONSOLE_DEVICE RT_USART2_NAME +#define CONSOLE_DEVICE RT_USART2_NAME #elif (RT_CONSOLE_DEVICE == EFM_UART0) -#define CONSOLE_DEVICE RT_UART0_NAME +#define CONSOLE_DEVICE RT_UART0_NAME #elif (RT_CONSOLE_DEVICE == EFM_UART1) -#define CONSOLE_DEVICE RT_UART1_NAME +#define CONSOLE_DEVICE RT_UART1_NAME #elif (RT_CONSOLE_DEVICE == EFM_LEUART0) -#define CONSOLE_DEVICE RT_LEUART0_NAME +#define CONSOLE_DEVICE RT_LEUART0_NAME #elif (RT_CONSOLE_DEVICE == EFM_LEUART1) -#define CONSOLE_DEVICE RT_LEUART1_NAME +#define CONSOLE_DEVICE RT_LEUART1_NAME #else -#define CONSOLE_DEVICE "NONE" +#define CONSOLE_DEVICE "NONE" #endif /* The following defines should be consistent with those in diskio.h */ -#define CTRL_SYNC 0 -#define GET_SECTOR_COUNT 1 -#define GET_SECTOR_SIZE 2 -#define GET_BLOCK_SIZE 3 -#define MMC_GET_TYPE 10 -#define MMC_GET_CSD 11 -#define MMC_GET_CID 12 -#define MMC_GET_OCR 13 -#define MMC_GET_SDSTAT 14 +#define CTRL_SYNC 0 +#define GET_SECTOR_COUNT 1 +#define GET_SECTOR_SIZE 2 +#define GET_BLOCK_SIZE 3 +#define MMC_GET_TYPE 10 +#define MMC_GET_CSD 11 +#define MMC_GET_CID 12 +#define MMC_GET_OCR 13 +#define MMC_GET_SDSTAT 14 /* The above defines should be consistent with those in diskio.h */ /* I/O control options */ -#define RT_DEVICE_CTRL_SD_SYNC CTRL_SYNC -#define RT_DEVICE_CTRL_SD_GET_SCOUNT GET_SECTOR_COUNT -#define RT_DEVICE_CTRL_SD_GET_SSIZE GET_SECTOR_SIZE -#define RT_DEVICE_CTRL_SD_GET_BSIZE GET_BLOCK_SIZE -#define RT_DEVICE_CTRL_SD_GET_TYPE MMC_GET_TYPE -#define RT_DEVICE_CTRL_SD_GET_CSD MMC_GET_CSD -#define RT_DEVICE_CTRL_SD_GET_CID MMC_GET_CID -#define RT_DEVICE_CTRL_SD_GET_OCR MMC_GET_OCR -#define RT_DEVICE_CTRL_SD_GET_SDSTAT MMC_GET_SDSTAT +#define RT_DEVICE_CTRL_SD_SYNC CTRL_SYNC +#define RT_DEVICE_CTRL_SD_GET_SCOUNT GET_SECTOR_COUNT +#define RT_DEVICE_CTRL_SD_GET_SSIZE GET_SECTOR_SIZE +#define RT_DEVICE_CTRL_SD_GET_BSIZE GET_BLOCK_SIZE +#define RT_DEVICE_CTRL_SD_GET_TYPE MMC_GET_TYPE +#define RT_DEVICE_CTRL_SD_GET_CSD MMC_GET_CSD +#define RT_DEVICE_CTRL_SD_GET_CID MMC_GET_CID +#define RT_DEVICE_CTRL_SD_GET_OCR MMC_GET_OCR +#define RT_DEVICE_CTRL_SD_GET_SDSTAT MMC_GET_SDSTAT /*! fixme: move the following define to Rtdef.h */ -#define RT_DEVICE_CTRL_USART_RBUFFER (0xF1) /*!< set USART/UART rx buffer */ -#define RT_DEVICE_CTRL_LEUART_RBUFFER (0xF2) /*!< set LEUART rx buffer */ -#define RT_DEVICE_CTRL_IIC_SETTING (0xF3) /*!< change IIC setting */ -#define RT_DEVICE_CTRL_TIMER_PERIOD (0xF4) /*!< set Timer timeout period */ -#define RT_DEVICE_CTRL_ADC_MODE (0xF5) /*!< change ADC mode */ -#define RT_DEVICE_CTRL_ADC_RESULT (0xF6) /*!< get ADC result */ -#define RT_DEVICE_CTRL_ACMP_INIT (0xF7) /*!< Initialize ACMP */ -#define RT_DEVICE_CTRL_ACMP_OUTPUT (0xF8) /*!< get ACMP output */ +#define RT_DEVICE_CTRL_USART_RBUFFER (0xF1) /*!< set USART/UART rx buffer */ +#define RT_DEVICE_CTRL_LEUART_RBUFFER (0xF2) /*!< set LEUART rx buffer */ +#define RT_DEVICE_CTRL_IIC_SETTING (0xF3) /*!< change IIC setting */ +#define RT_DEVICE_CTRL_TIMER_PERIOD (0xF4) /*!< set Timer timeout period */ +#define RT_DEVICE_CTRL_ADC_MODE (0xF5) /*!< change ADC mode */ +#define RT_DEVICE_CTRL_ADC_RESULT (0xF6) /*!< get ADC result */ +#define RT_DEVICE_CTRL_ACMP_INIT (0xF7) /*!< Initialize ACMP */ +#define RT_DEVICE_CTRL_ACMP_OUTPUT (0xF8) /*!< get ACMP output */ /* Exported functions ------------------------------------------------------- */ void rt_hw_board_init(void); diff --git a/bsp/efm32/copy_this_file_dfs_elm.c b/bsp/efm32/copy_this_file_dfs_elm.c index a6adbce114..8d36dd7c88 100644 --- a/bsp/efm32/copy_this_file_dfs_elm.c +++ b/bsp/efm32/copy_this_file_dfs_elm.c @@ -9,7 +9,7 @@ * 2011-10-08 Bernard fixed the block size in statfs. * 2011-11-23 Bernard fixed the rename issue. */ - + #include <rtthread.h> #include "ffconf.h" #include "ff.h" @@ -30,658 +30,658 @@ static rt_device_t disk[_VOLUMES] = {0}; static int elm_result_to_dfs(FRESULT result) { - int status = DFS_STATUS_OK; + int status = DFS_STATUS_OK; - switch (result) - { - case FR_OK: - break; + switch (result) + { + case FR_OK: + break; - case FR_NO_FILE: - case FR_NO_PATH: - case FR_NO_FILESYSTEM: - status = -DFS_STATUS_ENOENT; - break; + case FR_NO_FILE: + case FR_NO_PATH: + case FR_NO_FILESYSTEM: + status = -DFS_STATUS_ENOENT; + break; - case FR_INVALID_NAME: - status = -DFS_STATUS_EINVAL; - break; + case FR_INVALID_NAME: + status = -DFS_STATUS_EINVAL; + break; - case FR_EXIST: - case FR_INVALID_OBJECT: - status = -DFS_STATUS_EEXIST; - break; + case FR_EXIST: + case FR_INVALID_OBJECT: + status = -DFS_STATUS_EEXIST; + break; - case FR_DISK_ERR: - case FR_NOT_READY: - case FR_INT_ERR: - status = -DFS_STATUS_EIO; - break; + case FR_DISK_ERR: + case FR_NOT_READY: + case FR_INT_ERR: + status = -DFS_STATUS_EIO; + break; - case FR_WRITE_PROTECTED: - case FR_DENIED: - status = -DFS_STATUS_EROFS; - break; + case FR_WRITE_PROTECTED: + case FR_DENIED: + status = -DFS_STATUS_EROFS; + break; - case FR_MKFS_ABORTED: - status = -DFS_STATUS_EINVAL; - break; + case FR_MKFS_ABORTED: + status = -DFS_STATUS_EINVAL; + break; - default: - status = -1; - break; - } + default: + status = -1; + break; + } - return status; + return status; } int dfs_elm_mount(struct dfs_filesystem *fs, unsigned long rwflag, const void *data) { - FATFS *fat; - FRESULT result; - rt_uint32_t index; + FATFS *fat; + FRESULT result; + rt_uint32_t index; - /* handle RT-Thread device routine */ - for (index = 0; index < _VOLUMES; index ++) - { - if (disk[index] == RT_NULL) - { - break; - } - } - if (index == _VOLUMES) - return -DFS_STATUS_ENOSPC; + /* handle RT-Thread device routine */ + for (index = 0; index < _VOLUMES; index ++) + { + if (disk[index] == RT_NULL) + { + break; + } + } + if (index == _VOLUMES) + return -DFS_STATUS_ENOSPC; - /* get device */ - disk[index] = fs->dev_id; + /* get device */ + disk[index] = fs->dev_id; - fat = (FATFS *)rt_malloc(sizeof(FATFS)); - if (fat == RT_NULL) - { - return -1; - } + fat = (FATFS *)rt_malloc(sizeof(FATFS)); + if (fat == RT_NULL) + { + return -1; + } - /* mount fatfs, always 0 logic driver */ - result = f_mount(index, fat); - if (result == FR_OK) - fs->data = fat; - else - { - rt_free(fat); - return elm_result_to_dfs(result); - } + /* mount fatfs, always 0 logic driver */ + result = f_mount(index, fat); + if (result == FR_OK) + fs->data = fat; + else + { + rt_free(fat); + return elm_result_to_dfs(result); + } - return 0; + return 0; } int dfs_elm_unmount(struct dfs_filesystem *fs) { - FATFS *fat; - FRESULT result; - rt_uint32_t index; + FATFS *fat; + FRESULT result; + rt_uint32_t index; - fat = (FATFS *)fs->data; + fat = (FATFS *)fs->data; - RT_ASSERT(fat != RT_NULL); + RT_ASSERT(fat != RT_NULL); - /* find the device index and then umount it */ - for (index = 0; index < _VOLUMES; index ++) - { - if (disk[index] == fs->dev_id) - { - result = f_mount(index, RT_NULL); + /* find the device index and then umount it */ + for (index = 0; index < _VOLUMES; index ++) + { + if (disk[index] == fs->dev_id) + { + result = f_mount(index, RT_NULL); - if (result == FR_OK) - { - fs->data = RT_NULL; - disk[index] = RT_NULL; - rt_free(fat); - return DFS_STATUS_OK; - } - } - } + if (result == FR_OK) + { + fs->data = RT_NULL; + disk[index] = RT_NULL; + rt_free(fat); + return DFS_STATUS_OK; + } + } + } - return -DFS_STATUS_ENOENT; + return -DFS_STATUS_ENOENT; } int dfs_elm_mkfs(const char *device_name) { - BYTE drv; - rt_device_t dev; - FRESULT result; + BYTE drv; + rt_device_t dev; + FRESULT result; - /* find device name */ - for (drv = 0; drv < _VOLUMES; drv ++) - { - dev = disk[drv]; - if (rt_strncmp(dev->parent.name, device_name, RT_NAME_MAX) == 0) - { - /* 1: no partition table */ - /* 0: auto selection of cluster size */ - result = f_mkfs(drv, 1, 0); - if (result != FR_OK) - { - rt_kprintf("format error\n"); - return elm_result_to_dfs(result); - } + /* find device name */ + for (drv = 0; drv < _VOLUMES; drv ++) + { + dev = disk[drv]; + if (rt_strncmp(dev->parent.name, device_name, RT_NAME_MAX) == 0) + { + /* 1: no partition table */ + /* 0: auto selection of cluster size */ + result = f_mkfs(drv, 1, 0); + if (result != FR_OK) + { + rt_kprintf("format error\n"); + return elm_result_to_dfs(result); + } - return DFS_STATUS_OK; - } - } + return DFS_STATUS_OK; + } + } - /* can't find device driver */ - rt_kprintf("can not find device driver: %s\n", device_name); - return -DFS_STATUS_EIO; + /* can't find device driver */ + rt_kprintf("can not find device driver: %s\n", device_name); + return -DFS_STATUS_EIO; } int dfs_elm_statfs(struct dfs_filesystem *fs, struct statfs *buf) { - FATFS *f; - FRESULT res; - char driver[4]; - DWORD fre_clust, fre_sect, tot_sect; + FATFS *f; + FRESULT res; + char driver[4]; + DWORD fre_clust, fre_sect, tot_sect; - RT_ASSERT(fs != RT_NULL); - RT_ASSERT(buf != RT_NULL); + RT_ASSERT(fs != RT_NULL); + RT_ASSERT(buf != RT_NULL); - f = (FATFS *)fs->data; + f = (FATFS *)fs->data; - rt_snprintf(driver, sizeof(driver), "%d:", f->drv); - res = f_getfree(driver, &fre_clust, &f); - if (res) - return elm_result_to_dfs(res); + rt_snprintf(driver, sizeof(driver), "%d:", f->drv); + res = f_getfree(driver, &fre_clust, &f); + if (res) + return elm_result_to_dfs(res); - /* Get total sectors and free sectors */ - tot_sect = (f->n_fatent - 2) * f->csize; - fre_sect = fre_clust * f->csize; + /* Get total sectors and free sectors */ + tot_sect = (f->n_fatent - 2) * f->csize; + fre_sect = fre_clust * f->csize; - buf->f_bfree = fre_sect; - buf->f_blocks = tot_sect; + buf->f_bfree = fre_sect; + buf->f_blocks = tot_sect; #if _MAX_SS != 512 - buf->f_bsize = f->ssize; + buf->f_bsize = f->ssize; #else buf->f_bsize = 512; #endif - return 0; + return 0; } int dfs_elm_open(struct dfs_fd *file) { - FIL *fd; - BYTE mode; - FRESULT result; - char *drivers_fn; + FIL *fd; + BYTE mode; + FRESULT result; + char *drivers_fn; #if (_VOLUMES > 1) - int vol; - extern int elm_get_vol(FATFS *fat); + int vol; + extern int elm_get_vol(FATFS *fat); - /* add path for ELM FatFS driver support */ - vol = elm_get_vol((FATFS *)file->fs->data); - if (vol < 0) - return -DFS_STATUS_ENOENT; - drivers_fn = rt_malloc(256); - if (drivers_fn == RT_NULL) - return -DFS_STATUS_ENOMEM; + /* add path for ELM FatFS driver support */ + vol = elm_get_vol((FATFS *)file->fs->data); + if (vol < 0) + return -DFS_STATUS_ENOENT; + drivers_fn = rt_malloc(256); + if (drivers_fn == RT_NULL) + return -DFS_STATUS_ENOMEM; - rt_snprintf(drivers_fn, 256, "%d:%s", vol, file->path); + rt_snprintf(drivers_fn, 256, "%d:%s", vol, file->path); #else - drivers_fn = file->path; + drivers_fn = file->path; #endif - if (file->flags & DFS_O_DIRECTORY) - { - DIR *dir; + if (file->flags & DFS_O_DIRECTORY) + { + DIR *dir; - if (file->flags & DFS_O_CREAT) - { - result = f_mkdir(drivers_fn); - if (result != FR_OK) - { + if (file->flags & DFS_O_CREAT) + { + result = f_mkdir(drivers_fn); + if (result != FR_OK) + { #if _VOLUMES > 1 - rt_free(drivers_fn); + rt_free(drivers_fn); #endif - return elm_result_to_dfs(result); - } - } + return elm_result_to_dfs(result); + } + } - /* open directory */ - dir = (DIR *)rt_malloc(sizeof(DIR)); - if (dir == RT_NULL) - { + /* open directory */ + dir = (DIR *)rt_malloc(sizeof(DIR)); + if (dir == RT_NULL) + { #if _VOLUMES > 1 - rt_free(drivers_fn); + rt_free(drivers_fn); #endif - return -DFS_STATUS_ENOMEM; - } + return -DFS_STATUS_ENOMEM; + } - result = f_opendir(dir, drivers_fn); + result = f_opendir(dir, drivers_fn); #if _VOLUMES > 1 - rt_free(drivers_fn); + rt_free(drivers_fn); #endif - if (result != FR_OK) - { - rt_free(dir); - return elm_result_to_dfs(result); - } + if (result != FR_OK) + { + rt_free(dir); + return elm_result_to_dfs(result); + } - file->data = dir; - return DFS_STATUS_OK; - } - else - { - mode = FA_READ; + file->data = dir; + return DFS_STATUS_OK; + } + else + { + mode = FA_READ; - if (file->flags & DFS_O_WRONLY) - mode |= FA_WRITE; - if ((file->flags & DFS_O_ACCMODE) & DFS_O_RDWR) - mode |= FA_WRITE; - /* Opens the file, if it is existing. If not, a new file is created. */ - if (file->flags & DFS_O_CREAT) - mode |= FA_OPEN_ALWAYS; - /* Creates a new file. If the file is existing, it is truncated and overwritten. */ - if (file->flags & DFS_O_TRUNC) - mode |= FA_CREATE_ALWAYS; - /* Creates a new file. The function fails if the file is already existing. */ - if (file->flags & DFS_O_EXCL) - mode |= FA_CREATE_NEW; + if (file->flags & DFS_O_WRONLY) + mode |= FA_WRITE; + if ((file->flags & DFS_O_ACCMODE) & DFS_O_RDWR) + mode |= FA_WRITE; + /* Opens the file, if it is existing. If not, a new file is created. */ + if (file->flags & DFS_O_CREAT) + mode |= FA_OPEN_ALWAYS; + /* Creates a new file. If the file is existing, it is truncated and overwritten. */ + if (file->flags & DFS_O_TRUNC) + mode |= FA_CREATE_ALWAYS; + /* Creates a new file. The function fails if the file is already existing. */ + if (file->flags & DFS_O_EXCL) + mode |= FA_CREATE_NEW; - /* allocate a fd */ - fd = (FIL *)rt_malloc(sizeof(FIL)); - if (fd == RT_NULL) - { - return -DFS_STATUS_ENOMEM; - } + /* allocate a fd */ + fd = (FIL *)rt_malloc(sizeof(FIL)); + if (fd == RT_NULL) + { + return -DFS_STATUS_ENOMEM; + } - result = f_open(fd, drivers_fn, mode); + result = f_open(fd, drivers_fn, mode); #if _VOLUMES > 1 - rt_free(drivers_fn); + rt_free(drivers_fn); #endif - if (result == FR_OK) - { - file->pos = fd->fptr; - file->size = fd->fsize; - file->data = fd; + if (result == FR_OK) + { + file->pos = fd->fptr; + file->size = fd->fsize; + file->data = fd; - if (file->flags & DFS_O_APPEND) - { - file->pos = f_lseek(fd, fd->fsize); - } - } - else - { - /* open failed, return */ - rt_free(fd); - return elm_result_to_dfs(result); - } - } + if (file->flags & DFS_O_APPEND) + { + file->pos = f_lseek(fd, fd->fsize); + } + } + else + { + /* open failed, return */ + rt_free(fd); + return elm_result_to_dfs(result); + } + } - return DFS_STATUS_OK; + return DFS_STATUS_OK; } int dfs_elm_close(struct dfs_fd *file) { - FRESULT result; + FRESULT result; - result = FR_OK; - if (file->type == FT_DIRECTORY) - { - DIR *dir; + result = FR_OK; + if (file->type == FT_DIRECTORY) + { + DIR *dir; - dir = (DIR *)(file->data); - RT_ASSERT(dir != RT_NULL); + dir = (DIR *)(file->data); + RT_ASSERT(dir != RT_NULL); - /* release memory */ - rt_free(dir); - } - else if (file->type == FT_REGULAR) - { - FIL *fd; - fd = (FIL *)(file->data); - RT_ASSERT(fd != RT_NULL); + /* release memory */ + rt_free(dir); + } + else if (file->type == FT_REGULAR) + { + FIL *fd; + fd = (FIL *)(file->data); + RT_ASSERT(fd != RT_NULL); - result = f_close(fd); - if (result == FR_OK) - { - /* release memory */ - rt_free(fd); - } - } + result = f_close(fd); + if (result == FR_OK) + { + /* release memory */ + rt_free(fd); + } + } - return elm_result_to_dfs(result); + return elm_result_to_dfs(result); } -int dfs_elm_ioctl(struct dfs_fd *file, int cmd, void *args) +int dfs_elm_ioctl(struct dfs_fd *file, int cmd, void *args) { - return -DFS_STATUS_ENOSYS; + return -DFS_STATUS_ENOSYS; } int dfs_elm_read(struct dfs_fd *file, void *buf, rt_size_t len) { - FIL *fd; - FRESULT result; - UINT byte_read; + FIL *fd; + FRESULT result; + UINT byte_read; - if (file->type == FT_DIRECTORY) - { - return -DFS_STATUS_EISDIR; - } + if (file->type == FT_DIRECTORY) + { + return -DFS_STATUS_EISDIR; + } - fd = (FIL *)(file->data); - RT_ASSERT(fd != RT_NULL); + fd = (FIL *)(file->data); + RT_ASSERT(fd != RT_NULL); - result = f_read(fd, buf, len, &byte_read); - /* update position */ - file->pos = fd->fptr; - if (result == FR_OK) - return byte_read; + result = f_read(fd, buf, len, &byte_read); + /* update position */ + file->pos = fd->fptr; + if (result == FR_OK) + return byte_read; - return elm_result_to_dfs(result); + return elm_result_to_dfs(result); } int dfs_elm_write(struct dfs_fd *file, const void *buf, rt_size_t len) { - FIL *fd; - FRESULT result; - UINT byte_write; + FIL *fd; + FRESULT result; + UINT byte_write; - if (file->type == FT_DIRECTORY) - { - return -DFS_STATUS_EISDIR; - } + if (file->type == FT_DIRECTORY) + { + return -DFS_STATUS_EISDIR; + } - fd = (FIL *)(file->data); - RT_ASSERT(fd != RT_NULL); + fd = (FIL *)(file->data); + RT_ASSERT(fd != RT_NULL); - result = f_write(fd, buf, len, &byte_write); - /* update position and file size */ - file->pos = fd->fptr; - file->size = fd->fsize; - if (result == FR_OK) - return byte_write; + result = f_write(fd, buf, len, &byte_write); + /* update position and file size */ + file->pos = fd->fptr; + file->size = fd->fsize; + if (result == FR_OK) + return byte_write; - return elm_result_to_dfs(result); + return elm_result_to_dfs(result); } int dfs_elm_flush(struct dfs_fd *file) { - FIL *fd; - FRESULT result; + FIL *fd; + FRESULT result; - fd = (FIL *)(file->data); - RT_ASSERT(fd != RT_NULL); + fd = (FIL *)(file->data); + RT_ASSERT(fd != RT_NULL); - result = f_sync(fd); - return elm_result_to_dfs(result); + result = f_sync(fd); + return elm_result_to_dfs(result); } int dfs_elm_lseek(struct dfs_fd *file, rt_off_t offset) { - FRESULT result = FR_OK; - if (file->type == FT_REGULAR) - { - FIL *fd; + FRESULT result = FR_OK; + if (file->type == FT_REGULAR) + { + FIL *fd; - /* regular file type */ - fd = (FIL *)(file->data); - RT_ASSERT(fd != RT_NULL); - - result = f_lseek(fd, offset); - if (result == FR_OK) - { - /* return current position */ - return fd->fptr; - } - } - else if (file->type == FT_DIRECTORY) - { - /* which is a directory */ - DIR *dir; + /* regular file type */ + fd = (FIL *)(file->data); + RT_ASSERT(fd != RT_NULL); - dir = (DIR *)(file->data); - RT_ASSERT(dir != RT_NULL); + result = f_lseek(fd, offset); + if (result == FR_OK) + { + /* return current position */ + return fd->fptr; + } + } + else if (file->type == FT_DIRECTORY) + { + /* which is a directory */ + DIR *dir; - result = f_seekdir(dir, offset / sizeof(struct dirent)); - if (result == FR_OK) - { - /* update file position */ - file->pos = offset; - return file->pos; - } - } + dir = (DIR *)(file->data); + RT_ASSERT(dir != RT_NULL); - return elm_result_to_dfs(result); + result = f_seekdir(dir, offset / sizeof(struct dirent)); + if (result == FR_OK) + { + /* update file position */ + file->pos = offset; + return file->pos; + } + } + + return elm_result_to_dfs(result); } int dfs_elm_getdents(struct dfs_fd *file, struct dirent *dirp, rt_uint32_t count) { - DIR *dir; - FILINFO fno; - FRESULT result; - rt_uint32_t index; - struct dirent *d; + DIR *dir; + FILINFO fno; + FRESULT result; + rt_uint32_t index; + struct dirent *d; - dir = (DIR *)(file->data); - RT_ASSERT(dir != RT_NULL); + dir = (DIR *)(file->data); + RT_ASSERT(dir != RT_NULL); - /* make integer count */ - count = (count / sizeof(struct dirent)) * sizeof(struct dirent); - if (count == 0) - return -DFS_STATUS_EINVAL; + /* make integer count */ + count = (count / sizeof(struct dirent)) * sizeof(struct dirent); + if (count == 0) + return -DFS_STATUS_EINVAL; #if _USE_LFN - /* allocate long file name */ - fno.lfname = rt_malloc(256); - fno.lfsize = 256; + /* allocate long file name */ + fno.lfname = rt_malloc(256); + fno.lfsize = 256; #endif - index = 0; - while (1) - { - char *fn; + index = 0; + while (1) + { + char *fn; - d = dirp + index; + d = dirp + index; - result = f_readdir(dir, &fno); - if (result != FR_OK || fno.fname[0] == 0) - break; + result = f_readdir(dir, &fno); + if (result != FR_OK || fno.fname[0] == 0) + break; #if _USE_LFN - fn = *fno.lfname? fno.lfname : fno.fname; + fn = *fno.lfname? fno.lfname : fno.fname; #else - fn = fno.fname; + fn = fno.fname; #endif - d->d_type = DFS_DT_UNKNOWN; - if (fno.fattrib & AM_DIR) - d->d_type = DFS_DT_DIR; - else - d->d_type = DFS_DT_REG; + d->d_type = DFS_DT_UNKNOWN; + if (fno.fattrib & AM_DIR) + d->d_type = DFS_DT_DIR; + else + d->d_type = DFS_DT_REG; - d->d_namlen = rt_strlen(fn); - d->d_reclen = (rt_uint16_t)sizeof(struct dirent); - rt_strncpy(d->d_name, fn, rt_strlen(fn) + 1); + d->d_namlen = rt_strlen(fn); + d->d_reclen = (rt_uint16_t)sizeof(struct dirent); + rt_strncpy(d->d_name, fn, rt_strlen(fn) + 1); - index ++; - if (index * sizeof(struct dirent) >= count) - break; - } + index ++; + if (index * sizeof(struct dirent) >= count) + break; + } #if _USE_LFN - rt_free(fno.lfname); + rt_free(fno.lfname); #endif - if (index == 0) - return elm_result_to_dfs(result); + if (index == 0) + return elm_result_to_dfs(result); - file->pos += index * sizeof(struct dirent); + file->pos += index * sizeof(struct dirent); - return index * sizeof(struct dirent); + return index * sizeof(struct dirent); } int dfs_elm_unlink(struct dfs_filesystem *fs, const char *path) { - FRESULT result; + FRESULT result; #if _VOLUMES > 1 - int vol; - char *drivers_fn; - extern int elm_get_vol(FATFS *fat); + int vol; + char *drivers_fn; + extern int elm_get_vol(FATFS *fat); - /* add path for ELM FatFS driver support */ - vol = elm_get_vol((FATFS *)fs->data); - if (vol < 0) - return -DFS_STATUS_ENOENT; - drivers_fn = rt_malloc(256); - if (drivers_fn == RT_NULL) - return -DFS_STATUS_ENOMEM; + /* add path for ELM FatFS driver support */ + vol = elm_get_vol((FATFS *)fs->data); + if (vol < 0) + return -DFS_STATUS_ENOENT; + drivers_fn = rt_malloc(256); + if (drivers_fn == RT_NULL) + return -DFS_STATUS_ENOMEM; - rt_snprintf(drivers_fn, 256, "%d:%s", vol, path); + rt_snprintf(drivers_fn, 256, "%d:%s", vol, path); #else - const char *drivers_fn; - drivers_fn = path; + const char *drivers_fn; + drivers_fn = path; #endif - result = f_unlink(drivers_fn); + result = f_unlink(drivers_fn); #if _VOLUMES > 1 - rt_free(drivers_fn); + rt_free(drivers_fn); #endif - return elm_result_to_dfs(result); + return elm_result_to_dfs(result); } int dfs_elm_rename(struct dfs_filesystem *fs, const char *oldpath, const char *newpath) { - FRESULT result; + FRESULT result; #if _VOLUMES > 1 - char *drivers_oldfn; - const char *drivers_newfn; - int vol; - extern int elm_get_vol(FATFS *fat); + char *drivers_oldfn; + const char *drivers_newfn; + int vol; + extern int elm_get_vol(FATFS *fat); - /* add path for ELM FatFS driver support */ - vol = elm_get_vol((FATFS *)fs->data); - if (vol < 0) - return -DFS_STATUS_ENOENT; + /* add path for ELM FatFS driver support */ + vol = elm_get_vol((FATFS *)fs->data); + if (vol < 0) + return -DFS_STATUS_ENOENT; - drivers_oldfn = rt_malloc(256); - if (drivers_oldfn == RT_NULL) - return -DFS_STATUS_ENOMEM; - drivers_newfn = newpath; + drivers_oldfn = rt_malloc(256); + if (drivers_oldfn == RT_NULL) + return -DFS_STATUS_ENOMEM; + drivers_newfn = newpath; - rt_snprintf(drivers_oldfn, 256, "%d:%s", vol, oldpath); + rt_snprintf(drivers_oldfn, 256, "%d:%s", vol, oldpath); #else - const char *drivers_oldfn, *drivers_newfn; + const char *drivers_oldfn, *drivers_newfn; - drivers_oldfn = oldpath; - drivers_newfn = newpath; + drivers_oldfn = oldpath; + drivers_newfn = newpath; #endif - result = f_rename(drivers_oldfn, drivers_newfn); + result = f_rename(drivers_oldfn, drivers_newfn); #if _VOLUMES > 1 - rt_free(drivers_oldfn); + rt_free(drivers_oldfn); #endif - return elm_result_to_dfs(result); + return elm_result_to_dfs(result); } int dfs_elm_stat(struct dfs_filesystem *fs, const char *path, struct stat *st) { - FILINFO file_info; - FRESULT result; + FILINFO file_info; + FRESULT result; #if _VOLUMES > 1 - int vol; - char *drivers_fn; - extern int elm_get_vol(FATFS *fat); + int vol; + char *drivers_fn; + extern int elm_get_vol(FATFS *fat); - /* add path for ELM FatFS driver support */ - vol = elm_get_vol((FATFS *)fs->data); - if (vol < 0) - return -DFS_STATUS_ENOENT; - drivers_fn = rt_malloc(256); - if (drivers_fn == RT_NULL) - return -DFS_STATUS_ENOMEM; + /* add path for ELM FatFS driver support */ + vol = elm_get_vol((FATFS *)fs->data); + if (vol < 0) + return -DFS_STATUS_ENOENT; + drivers_fn = rt_malloc(256); + if (drivers_fn == RT_NULL) + return -DFS_STATUS_ENOMEM; - rt_snprintf(drivers_fn, 256, "%d:%s", vol, path); + rt_snprintf(drivers_fn, 256, "%d:%s", vol, path); #else - const char *drivers_fn; - drivers_fn = path; + const char *drivers_fn; + drivers_fn = path; #endif #if _USE_LFN - /* allocate long file name */ - file_info.lfname = rt_malloc(256); - file_info.lfsize = 256; + /* allocate long file name */ + file_info.lfname = rt_malloc(256); + file_info.lfsize = 256; #endif - result = f_stat(drivers_fn, &file_info); + result = f_stat(drivers_fn, &file_info); #if _VOLUMES > 1 - rt_free(drivers_fn); + rt_free(drivers_fn); #endif - if (result == FR_OK) - { - /* convert to dfs stat structure */ - st->st_dev = 0; + if (result == FR_OK) + { + /* convert to dfs stat structure */ + st->st_dev = 0; - st->st_mode = DFS_S_IFREG | DFS_S_IRUSR | DFS_S_IRGRP | DFS_S_IROTH | - DFS_S_IWUSR | DFS_S_IWGRP | DFS_S_IWOTH; - if (file_info.fattrib & AM_DIR) - { - st->st_mode &= ~DFS_S_IFREG; - st->st_mode |= DFS_S_IFDIR | DFS_S_IXUSR | DFS_S_IXGRP | DFS_S_IXOTH; - } - if (file_info.fattrib & AM_RDO) - st->st_mode &= ~(DFS_S_IWUSR | DFS_S_IWGRP | DFS_S_IWOTH); + st->st_mode = DFS_S_IFREG | DFS_S_IRUSR | DFS_S_IRGRP | DFS_S_IROTH | + DFS_S_IWUSR | DFS_S_IWGRP | DFS_S_IWOTH; + if (file_info.fattrib & AM_DIR) + { + st->st_mode &= ~DFS_S_IFREG; + st->st_mode |= DFS_S_IFDIR | DFS_S_IXUSR | DFS_S_IXGRP | DFS_S_IXOTH; + } + if (file_info.fattrib & AM_RDO) + st->st_mode &= ~(DFS_S_IWUSR | DFS_S_IWGRP | DFS_S_IWOTH); - st->st_size = file_info.fsize; - st->st_mtime = file_info.ftime; - } + st->st_size = file_info.fsize; + st->st_mtime = file_info.ftime; + } #if _USE_LFN - rt_free(file_info.lfname); + rt_free(file_info.lfname); #endif - return elm_result_to_dfs(result); + return elm_result_to_dfs(result); } static const struct dfs_filesystem_operation dfs_elm = { - "elm", - dfs_elm_mount, - dfs_elm_unmount, - dfs_elm_mkfs, - dfs_elm_statfs, + "elm", + dfs_elm_mount, + dfs_elm_unmount, + dfs_elm_mkfs, + dfs_elm_statfs, - dfs_elm_open, - dfs_elm_close, - dfs_elm_ioctl, - dfs_elm_read, - dfs_elm_write, - dfs_elm_flush, - dfs_elm_lseek, - dfs_elm_getdents, - dfs_elm_unlink, - dfs_elm_stat, - dfs_elm_rename, + dfs_elm_open, + dfs_elm_close, + dfs_elm_ioctl, + dfs_elm_read, + dfs_elm_write, + dfs_elm_flush, + dfs_elm_lseek, + dfs_elm_getdents, + dfs_elm_unlink, + dfs_elm_stat, + dfs_elm_rename, }; int elm_init(void) { #ifdef DFS_ELMFAT_INTERFACE_EFM - int i; + int i; - for (i = 0; i < _VOLUMES; i++) - { - diskStat[i] = STA_NOINIT; - } + for (i = 0; i < _VOLUMES; i++) + { + diskStat[i] = STA_NOINIT; + } #endif /* register fatfs file system */ dfs_register(&dfs_elm); - return 0; + return 0; } /* @@ -692,70 +692,70 @@ int elm_init(void) /* Initialize Disk Drive */ /*-----------------------------------------------------------------------*/ DSTATUS disk_initialize ( - BYTE drv /* Physical drive nmuber */ - ) + BYTE drv /* Physical drive nmuber */ + ) { - rt_device_t device = disk[drv]; + rt_device_t device = disk[drv]; - if (!device) - { - return RES_ERROR; - } - if (diskStat[drv] & STA_NODISK) - { - /* No card in the socket */ - return diskStat[drv]; - } + if (!device) + { + return RES_ERROR; + } + if (diskStat[drv] & STA_NODISK) + { + /* No card in the socket */ + return diskStat[drv]; + } - /* Initialize hardware: the actual operation is performed in dfs_mount() */ - diskStat[drv] &= ~STA_NOINIT; + /* Initialize hardware: the actual operation is performed in dfs_mount() */ + diskStat[drv] &= ~STA_NOINIT; - return diskStat[drv]; + return diskStat[drv]; } /*-----------------------------------------------------------------------*/ /* Get Disk Status */ /*-----------------------------------------------------------------------*/ DSTATUS disk_status ( - BYTE drv /* Physical drive nmuber */ - ) + BYTE drv /* Physical drive nmuber */ + ) { - return diskStat[drv]; + return diskStat[drv]; } /*-----------------------------------------------------------------------*/ /* Read Sector(s) */ /*-----------------------------------------------------------------------*/ DRESULT disk_read ( - BYTE drv, /* Physical drive nmuber */ - BYTE *buff, /* Pointer to the data buffer to store read data */ - DWORD sector, /* Start sector number (LBA) */ - BYTE count /* Sector count (1..255) */ - ) + BYTE drv, /* Physical drive nmuber */ + BYTE *buff, /* Pointer to the data buffer to store read data */ + DWORD sector, /* Start sector number (LBA) */ + BYTE count /* Sector count (1..255) */ + ) { - rt_device_t device = disk[drv]; + rt_device_t device = disk[drv]; - if (!device) - { - return RES_ERROR; - } - if (!count) - { - return RES_PARERR; - } - if (diskStat[drv] & STA_NOINIT) - { - return RES_NOTRDY; - } + if (!device) + { + return RES_ERROR; + } + if (!count) + { + return RES_PARERR; + } + if (diskStat[drv] & STA_NOINIT) + { + return RES_NOTRDY; + } - if (rt_device_read(device, sector, buff, count) != count) - { - return RES_ERROR; - } - else - { - return RES_OK; - } + if (rt_device_read(device, sector, buff, count) != count) + { + return RES_ERROR; + } + else + { + return RES_OK; + } } /*-----------------------------------------------------------------------*/ @@ -763,39 +763,39 @@ DRESULT disk_read ( /*-----------------------------------------------------------------------*/ #if _READONLY == 0 DRESULT disk_write ( - BYTE drv, /* Physical drive nmuber */ - const BYTE *buff, /* Pointer to the data to be written */ - DWORD sector, /* Start sector number (LBA) */ - BYTE count /* Sector count (1..255) */ - ) + BYTE drv, /* Physical drive nmuber */ + const BYTE *buff, /* Pointer to the data to be written */ + DWORD sector, /* Start sector number (LBA) */ + BYTE count /* Sector count (1..255) */ + ) { - rt_device_t device = disk[drv]; + rt_device_t device = disk[drv]; - if (!device) - { - return RES_ERROR; - } - if (!count) - { - return RES_PARERR; - } - if (diskStat[drv] & STA_NOINIT) - { - return RES_NOTRDY; - } - if (diskStat[drv] & STA_PROTECT) - { - return RES_WRPRT; - } + if (!device) + { + return RES_ERROR; + } + if (!count) + { + return RES_PARERR; + } + if (diskStat[drv] & STA_NOINIT) + { + return RES_NOTRDY; + } + if (diskStat[drv] & STA_PROTECT) + { + return RES_WRPRT; + } - if (rt_device_write(device, sector, buff, count) != count) - { - return RES_ERROR; - } - else - { - return RES_OK; - } + if (rt_device_write(device, sector, buff, count) != count) + { + return RES_ERROR; + } + else + { + return RES_OK; + } } #endif /* _READONLY */ @@ -803,30 +803,30 @@ DRESULT disk_write ( /* Miscellaneous Functions */ /*-----------------------------------------------------------------------*/ DRESULT disk_ioctl ( - BYTE drv, /* Physical drive nmuber */ - BYTE ctrl, /* Control code */ - void *buff /* Buffer to send/receive data block */ + BYTE drv, /* Physical drive nmuber */ + BYTE ctrl, /* Control code */ + void *buff /* Buffer to send/receive data block */ ) { - rt_device_t device = disk[drv]; + rt_device_t device = disk[drv]; - if (!device) - { - return RES_ERROR; - } - if (diskStat[drv] & STA_NOINIT) - { - return RES_NOTRDY; - } + if (!device) + { + return RES_ERROR; + } + if (diskStat[drv] & STA_NOINIT) + { + return RES_NOTRDY; + } - if (rt_device_control(device, ctrl, buff) != RT_EOK) - { - return RES_ERROR; - } - else - { - return RES_OK; - } + if (rt_device_control(device, ctrl, buff) != RT_EOK) + { + return RES_ERROR; + } + else + { + return RES_OK; + } } #else #include "diskio.h" @@ -834,90 +834,90 @@ DRESULT disk_ioctl ( /* Inidialize a Drive */ DSTATUS disk_initialize(BYTE drv) { - return 0; + return 0; } /* Return Disk Status */ DSTATUS disk_status(BYTE drv) { - return 0; + return 0; } /* Read Sector(s) */ DRESULT disk_read(BYTE drv, BYTE *buff, DWORD sector, BYTE count) { - rt_size_t result; - rt_device_t device = disk[drv]; + rt_size_t result; + rt_device_t device = disk[drv]; - result = rt_device_read(device, sector, buff, count); - if (result == count) - { - return RES_OK; - } + result = rt_device_read(device, sector, buff, count); + if (result == count) + { + return RES_OK; + } - return RES_ERROR; + return RES_ERROR; } /* Write Sector(s) */ DRESULT disk_write(BYTE drv, const BYTE *buff, DWORD sector, BYTE count) { - rt_size_t result; - rt_device_t device = disk[drv]; + rt_size_t result; + rt_device_t device = disk[drv]; - result = rt_device_write(device, sector, buff, count); - if (result == count) - { - return RES_OK; - } + result = rt_device_write(device, sector, buff, count); + if (result == count) + { + return RES_OK; + } - return RES_ERROR; + return RES_ERROR; } /* Miscellaneous Functions */ DRESULT disk_ioctl(BYTE drv, BYTE ctrl, void *buff) { - rt_device_t device = disk[drv]; + rt_device_t device = disk[drv]; - if (device == RT_NULL) - return RES_ERROR; + if (device == RT_NULL) + return RES_ERROR; - if (ctrl == GET_SECTOR_COUNT) - { - struct rt_device_blk_geometry geometry; + if (ctrl == GET_SECTOR_COUNT) + { + struct rt_device_blk_geometry geometry; - rt_memset(&geometry, 0, sizeof(geometry)); - rt_device_control(device, RT_DEVICE_CTRL_BLK_GETGEOME, &geometry); + rt_memset(&geometry, 0, sizeof(geometry)); + rt_device_control(device, RT_DEVICE_CTRL_BLK_GETGEOME, &geometry); - *(DWORD *)buff = geometry.sector_count; - if (geometry.sector_count == 0) - return RES_ERROR; - } - else if (ctrl == GET_SECTOR_SIZE) - { - struct rt_device_blk_geometry geometry; + *(DWORD *)buff = geometry.sector_count; + if (geometry.sector_count == 0) + return RES_ERROR; + } + else if (ctrl == GET_SECTOR_SIZE) + { + struct rt_device_blk_geometry geometry; - rt_memset(&geometry, 0, sizeof(geometry)); - rt_device_control(device, RT_DEVICE_CTRL_BLK_GETGEOME, &geometry); + rt_memset(&geometry, 0, sizeof(geometry)); + rt_device_control(device, RT_DEVICE_CTRL_BLK_GETGEOME, &geometry); - *(WORD *)buff = geometry.bytes_per_sector; - } - else if (ctrl == GET_BLOCK_SIZE) /* Get erase block size in unit of sectors (DWORD) */ - { - struct rt_device_blk_geometry geometry; + *(WORD *)buff = geometry.bytes_per_sector; + } + else if (ctrl == GET_BLOCK_SIZE) /* Get erase block size in unit of sectors (DWORD) */ + { + struct rt_device_blk_geometry geometry; - rt_memset(&geometry, 0, sizeof(geometry)); - rt_device_control(device, RT_DEVICE_CTRL_BLK_GETGEOME, &geometry); + rt_memset(&geometry, 0, sizeof(geometry)); + rt_device_control(device, RT_DEVICE_CTRL_BLK_GETGEOME, &geometry); - *(DWORD *)buff = geometry.block_size/geometry.bytes_per_sector; - } + *(DWORD *)buff = geometry.block_size/geometry.bytes_per_sector; + } - return RES_OK; + return RES_OK; } #endif rt_time_t get_fattime(void) { - return 0; + return 0; } #if _FS_REENTRANT @@ -947,14 +947,14 @@ int ff_del_syncobj(_SYNC_t m) int ff_req_grant(_SYNC_t m) { if (rt_mutex_take(m, _FS_TIMEOUT) == RT_EOK) - return RT_TRUE; + return RT_TRUE; return RT_FALSE; } void ff_rel_grant(_SYNC_t m) { - rt_mutex_release(m); + rt_mutex_release(m); } #endif diff --git a/bsp/efm32/copy_this_file_shell.c b/bsp/efm32/copy_this_file_shell.c index bb69519293..152c1d8e25 100644 --- a/bsp/efm32/copy_this_file_shell.c +++ b/bsp/efm32/copy_this_file_shell.c @@ -31,48 +31,48 @@ struct finsh_shell* shell; #if !defined (RT_USING_NEWLIB) && !defined (RT_USING_MINILIBC) int strcmp (const char *s1, const char *s2) { - while (*s1 && *s1 == *s2) s1++, s2++; + while (*s1 && *s1 == *s2) s1++, s2++; - return (*s1 - *s2); + return (*s1 - *s2); } #ifdef RT_USING_HEAP char *strdup(const char *s) { - size_t len = strlen(s) + 1; - char *tmp = (char *)rt_malloc(len); + size_t len = strlen(s) + 1; + char *tmp = (char *)rt_malloc(len); - if(!tmp) return NULL; + if(!tmp) return NULL; - rt_memcpy(tmp, s, len); - return tmp; + rt_memcpy(tmp, s, len); + return tmp; } #endif #if !defined(__CC_ARM) && !defined(__IAR_SYSTEMS_ICC__) int isalpha( int ch ) { - return (unsigned int)((ch | 0x20) - 'a') < 26u; + return (unsigned int)((ch | 0x20) - 'a') < 26u; } int atoi(const char* s) { - long int v=0; - int sign=1; - while ( *s == ' ' || (unsigned int)(*s - 9) < 5u) s++; + long int v=0; + int sign=1; + while ( *s == ' ' || (unsigned int)(*s - 9) < 5u) s++; - switch (*s) - { - case '-': sign=-1; - case '+': ++s; - } + switch (*s) + { + case '-': sign=-1; + case '+': ++s; + } - while ((unsigned int) (*s - '0') < 10u) - { - v=v*10+*s-'0'; ++s; - } + while ((unsigned int) (*s - '0') < 10u) + { + v=v*10+*s-'0'; ++s; + } - return sign==-1?-v:v; + return sign==-1?-v:v; } int isprint(unsigned char ch) @@ -86,25 +86,25 @@ int isprint(unsigned char ch) #include <dfs_posix.h> const char* finsh_get_prompt(void) { - #define _PROMPT "finsh " - static char finsh_prompt[RT_CONSOLEBUF_SIZE + 1] = {_PROMPT}; - - /* get current working directory */ - getcwd(&finsh_prompt[6], RT_CONSOLEBUF_SIZE - 8); - strcat(finsh_prompt, ">"); + #define _PROMPT "finsh " + static char finsh_prompt[RT_CONSOLEBUF_SIZE + 1] = {_PROMPT}; - return finsh_prompt; + /* get current working directory */ + getcwd(&finsh_prompt[6], RT_CONSOLEBUF_SIZE - 8); + strcat(finsh_prompt, ">"); + + return finsh_prompt; } #endif static rt_err_t finsh_rx_ind(rt_device_t dev, rt_size_t size) { - RT_ASSERT(shell != RT_NULL); + RT_ASSERT(shell != RT_NULL); - /* release semaphore to let finsh thread rx data */ - rt_sem_release(&shell->rx_sem); + /* release semaphore to let finsh thread rx data */ + rt_sem_release(&shell->rx_sem); - return RT_EOK; + return RT_EOK; } /** @@ -116,25 +116,25 @@ static rt_err_t finsh_rx_ind(rt_device_t dev, rt_size_t size) */ void finsh_set_device(const char* device_name) { - rt_device_t dev = RT_NULL; + rt_device_t dev = RT_NULL; - RT_ASSERT(shell != RT_NULL); - dev = rt_device_find(device_name); - if (dev != RT_NULL && rt_device_open(dev, RT_DEVICE_OFLAG_RDWR) == RT_EOK) - { - if (shell->device != RT_NULL) - { - /* close old finsh device */ - rt_device_close(shell->device); - } + RT_ASSERT(shell != RT_NULL); + dev = rt_device_find(device_name); + if (dev != RT_NULL && rt_device_open(dev, RT_DEVICE_OFLAG_RDWR) == RT_EOK) + { + if (shell->device != RT_NULL) + { + /* close old finsh device */ + rt_device_close(shell->device); + } - shell->device = dev; - rt_device_set_rx_indicate(dev, finsh_rx_ind); - } - else - { - rt_kprintf("finsh: can not find device:%s\n", device_name); - } + shell->device = dev; + rt_device_set_rx_indicate(dev, finsh_rx_ind); + } + else + { + rt_kprintf("finsh: can not find device:%s\n", device_name); + } } /** @@ -146,8 +146,8 @@ void finsh_set_device(const char* device_name) */ const char* finsh_get_device() { - RT_ASSERT(shell != RT_NULL); - return shell->device->parent.name; + RT_ASSERT(shell != RT_NULL); + return shell->device->parent.name; } /** @@ -161,8 +161,8 @@ const char* finsh_get_device() */ void finsh_set_echo(rt_uint32_t echo) { - RT_ASSERT(shell != RT_NULL); - shell->echo_mode = echo; + RT_ASSERT(shell != RT_NULL); + shell->echo_mode = echo; } /** @@ -174,59 +174,59 @@ void finsh_set_echo(rt_uint32_t echo) */ rt_uint32_t finsh_get_echo() { - RT_ASSERT(shell != RT_NULL); + RT_ASSERT(shell != RT_NULL); - return shell->echo_mode; + return shell->echo_mode; } void finsh_auto_complete(char* prefix) { - extern void list_prefix(char* prefix); + extern void list_prefix(char* prefix); - rt_kprintf("\n"); - list_prefix(prefix); - rt_kprintf("%s%s", FINSH_PROMPT, prefix); + rt_kprintf("\n"); + list_prefix(prefix); + rt_kprintf("%s%s", FINSH_PROMPT, prefix); } void finsh_run_line(struct finsh_parser* parser, const char *line) { - const char* err_str; + const char* err_str; - rt_kprintf("\n"); - finsh_parser_run(parser, (unsigned char*)line); + rt_kprintf("\n"); + finsh_parser_run(parser, (unsigned char*)line); - /* compile node root */ - if (finsh_errno() == 0) - { - finsh_compiler_run(parser->root); - } - else - { - err_str = finsh_error_string(finsh_errno()); - rt_kprintf("%s\n", err_str); - } + /* compile node root */ + if (finsh_errno() == 0) + { + finsh_compiler_run(parser->root); + } + else + { + err_str = finsh_error_string(finsh_errno()); + rt_kprintf("%s\n", err_str); + } - /* run virtual machine */ - if (finsh_errno() == 0) - { - char ch; - finsh_vm_run(); + /* run virtual machine */ + if (finsh_errno() == 0) + { + char ch; + finsh_vm_run(); - ch = (unsigned char)finsh_stack_bottom(); - if (ch > 0x20 && ch < 0x7e) - { - rt_kprintf("\t'%c', %d, 0x%08x\n", - (unsigned char)finsh_stack_bottom(), - (unsigned int)finsh_stack_bottom(), - (unsigned int)finsh_stack_bottom()); - } - else - { - rt_kprintf("\t%d, 0x%08x\n", - (unsigned int)finsh_stack_bottom(), - (unsigned int)finsh_stack_bottom()); - } - } + ch = (unsigned char)finsh_stack_bottom(); + if (ch > 0x20 && ch < 0x7e) + { + rt_kprintf("\t'%c', %d, 0x%08x\n", + (unsigned char)finsh_stack_bottom(), + (unsigned int)finsh_stack_bottom(), + (unsigned int)finsh_stack_bottom()); + } + else + { + rt_kprintf("\t%d, 0x%08x\n", + (unsigned int)finsh_stack_bottom(), + (unsigned int)finsh_stack_bottom()); + } + } finsh_flush(parser); } @@ -234,111 +234,111 @@ void finsh_run_line(struct finsh_parser* parser, const char *line) #ifdef FINSH_USING_HISTORY rt_bool_t finsh_handle_history(struct finsh_shell* shell, char ch) { - /* - * handle up and down key - * up key : 0x1b 0x5b 0x41 - * down key: 0x1b 0x5b 0x42 - */ - if (ch == 0x1b) - { - shell->stat = WAIT_SPEC_KEY; - return RT_TRUE; - } + /* + * handle up and down key + * up key : 0x1b 0x5b 0x41 + * down key: 0x1b 0x5b 0x42 + */ + if (ch == 0x1b) + { + shell->stat = WAIT_SPEC_KEY; + return RT_TRUE; + } - if ((shell->stat == WAIT_SPEC_KEY)) - { - if (ch == 0x5b) - { - shell->stat = WAIT_FUNC_KEY; - return RT_TRUE; - } + if ((shell->stat == WAIT_SPEC_KEY)) + { + if (ch == 0x5b) + { + shell->stat = WAIT_FUNC_KEY; + return RT_TRUE; + } - shell->stat = WAIT_NORMAL; - return RT_FALSE; - } + shell->stat = WAIT_NORMAL; + return RT_FALSE; + } - if (shell->stat == WAIT_FUNC_KEY) - { - shell->stat = WAIT_NORMAL; + if (shell->stat == WAIT_FUNC_KEY) + { + shell->stat = WAIT_NORMAL; - if (ch == 0x41) /* up key */ - { - /* prev history */ - if (shell->current_history > 0)shell->current_history --; - else - { - shell->current_history = 0; - return RT_TRUE; - } + if (ch == 0x41) /* up key */ + { + /* prev history */ + if (shell->current_history > 0)shell->current_history --; + else + { + shell->current_history = 0; + return RT_TRUE; + } - /* copy the history command */ - memcpy(shell->line, &shell->cmd_history[shell->current_history][0], - FINSH_CMD_SIZE); - shell->line_position = strlen(shell->line); - shell->use_history = 1; - } - else if (ch == 0x42) /* down key */ - { - /* next history */ - if (shell->current_history < shell->history_count - 1) - shell->current_history ++; - else - { - /* set to the end of history */ - if (shell->history_count != 0) - { - shell->current_history = shell->history_count - 1; - } - else return RT_TRUE; - } + /* copy the history command */ + memcpy(shell->line, &shell->cmd_history[shell->current_history][0], + FINSH_CMD_SIZE); + shell->line_position = strlen(shell->line); + shell->use_history = 1; + } + else if (ch == 0x42) /* down key */ + { + /* next history */ + if (shell->current_history < shell->history_count - 1) + shell->current_history ++; + else + { + /* set to the end of history */ + if (shell->history_count != 0) + { + shell->current_history = shell->history_count - 1; + } + else return RT_TRUE; + } - memcpy(shell->line, &shell->cmd_history[shell->current_history][0], - FINSH_CMD_SIZE); - shell->line_position = strlen(shell->line); - shell->use_history = 1; - } + memcpy(shell->line, &shell->cmd_history[shell->current_history][0], + FINSH_CMD_SIZE); + shell->line_position = strlen(shell->line); + shell->use_history = 1; + } - if (shell->use_history) - { - rt_kprintf("\033[2K\r"); - rt_kprintf("%s%s", FINSH_PROMPT, shell->line); - return RT_TRUE;; - } - } + if (shell->use_history) + { + rt_kprintf("\033[2K\r"); + rt_kprintf("%s%s", FINSH_PROMPT, shell->line); + return RT_TRUE;; + } + } - return RT_FALSE; + return RT_FALSE; } void finsh_push_history(struct finsh_shell* shell) { - if ((shell->use_history == 0) && (shell->line_position != 0)) - { - /* push history */ - if (shell->history_count >= FINSH_HISTORY_LINES) - { - /* move history */ - int index; - for (index = 0; index < FINSH_HISTORY_LINES - 1; index ++) - { - memcpy(&shell->cmd_history[index][0], - &shell->cmd_history[index + 1][0], FINSH_CMD_SIZE); - } - memset(&shell->cmd_history[index][0], 0, FINSH_CMD_SIZE); - memcpy(&shell->cmd_history[index][0], shell->line, shell->line_position); + if ((shell->use_history == 0) && (shell->line_position != 0)) + { + /* push history */ + if (shell->history_count >= FINSH_HISTORY_LINES) + { + /* move history */ + int index; + for (index = 0; index < FINSH_HISTORY_LINES - 1; index ++) + { + memcpy(&shell->cmd_history[index][0], + &shell->cmd_history[index + 1][0], FINSH_CMD_SIZE); + } + memset(&shell->cmd_history[index][0], 0, FINSH_CMD_SIZE); + memcpy(&shell->cmd_history[index][0], shell->line, shell->line_position); - /* it's the maximum history */ - shell->history_count = FINSH_HISTORY_LINES; - } - else - { - memset(&shell->cmd_history[shell->history_count][0], 0, FINSH_CMD_SIZE); - memcpy(&shell->cmd_history[shell->history_count][0], shell->line, shell->line_position); + /* it's the maximum history */ + shell->history_count = FINSH_HISTORY_LINES; + } + else + { + memset(&shell->cmd_history[shell->history_count][0], 0, FINSH_CMD_SIZE); + memcpy(&shell->cmd_history[shell->history_count][0], shell->line, shell->line_position); - /* increase count and set current history position */ - shell->history_count ++; - } - } - shell->current_history = shell->history_count; + /* increase count and set current history position */ + shell->history_count ++; + } + } + shell->current_history = shell->history_count; } #endif @@ -349,107 +349,107 @@ void finsh_thread_entry(void* parameter) { char ch; - /* test: for efm32 low power mode */ + /* test: for efm32 low power mode */ emu_all_disable(); - /* normal is echo mode */ - shell->echo_mode = 1; + /* normal is echo mode */ + shell->echo_mode = 1; finsh_init(&shell->parser); - rt_kprintf(FINSH_PROMPT); + rt_kprintf(FINSH_PROMPT); - while (1) - { - /* test: for efm32 low power mode */ + while (1) + { + /* test: for efm32 low power mode */ emu_em2_enable(); - /* wait receive */ - if (rt_sem_take(&shell->rx_sem, RT_WAITING_FOREVER) != RT_EOK) continue; + /* wait receive */ + if (rt_sem_take(&shell->rx_sem, RT_WAITING_FOREVER) != RT_EOK) continue; - /* test: for efm32 low power mode */ + /* test: for efm32 low power mode */ emu_em2_disable(); - /* read one character from device */ - while (rt_device_read(shell->device, 0, &ch, 1) == 1) - { - /* handle history key */ - #ifdef FINSH_USING_HISTORY - if (finsh_handle_history(shell, ch) == RT_TRUE) continue; - #endif + /* read one character from device */ + while (rt_device_read(shell->device, 0, &ch, 1) == 1) + { + /* handle history key */ + #ifdef FINSH_USING_HISTORY + if (finsh_handle_history(shell, ch) == RT_TRUE) continue; + #endif - /* handle CR key */ - if (ch == '\r') - { - char next; + /* handle CR key */ + if (ch == '\r') + { + char next; - if (rt_device_read(shell->device, 0, &next, 1) == 1) - ch = next; - else ch = '\r'; - } - /* handle tab key */ - else if (ch == '\t') - { - /* auto complete */ - finsh_auto_complete(&shell->line[0]); - /* re-calculate position */ - shell->line_position = strlen(shell->line); - continue; - } - /* handle backspace key */ - else if (ch == 0x7f || ch == 0x08) - { - if (shell->line_position != 0) - { - rt_kprintf("%c %c", ch, ch); - } - if (shell->line_position <= 0) shell->line_position = 0; - else shell->line_position --; - shell->line[shell->line_position] = 0; - continue; - } + if (rt_device_read(shell->device, 0, &next, 1) == 1) + ch = next; + else ch = '\r'; + } + /* handle tab key */ + else if (ch == '\t') + { + /* auto complete */ + finsh_auto_complete(&shell->line[0]); + /* re-calculate position */ + shell->line_position = strlen(shell->line); + continue; + } + /* handle backspace key */ + else if (ch == 0x7f || ch == 0x08) + { + if (shell->line_position != 0) + { + rt_kprintf("%c %c", ch, ch); + } + if (shell->line_position <= 0) shell->line_position = 0; + else shell->line_position --; + shell->line[shell->line_position] = 0; + continue; + } - /* handle end of line, break */ - if (ch == '\r' || ch == '\n') - { - /* change to ';' and break */ - shell->line[shell->line_position] = ';'; + /* handle end of line, break */ + if (ch == '\r' || ch == '\n') + { + /* change to ';' and break */ + shell->line[shell->line_position] = ';'; - #ifdef FINSH_USING_HISTORY - finsh_push_history(shell); - #endif + #ifdef FINSH_USING_HISTORY + finsh_push_history(shell); + #endif - if (shell->line_position != 0) finsh_run_line(&shell->parser, shell->line); - else rt_kprintf("\n"); + if (shell->line_position != 0) finsh_run_line(&shell->parser, shell->line); + else rt_kprintf("\n"); - rt_kprintf(FINSH_PROMPT); - memset(shell->line, 0, sizeof(shell->line)); - shell->line_position = 0; + rt_kprintf(FINSH_PROMPT); + memset(shell->line, 0, sizeof(shell->line)); + shell->line_position = 0; - break; - } + break; + } - /* it's a large line, discard it */ - if (shell->line_position >= FINSH_CMD_SIZE) shell->line_position = 0; + /* it's a large line, discard it */ + if (shell->line_position >= FINSH_CMD_SIZE) shell->line_position = 0; - /* normal character */ - shell->line[shell->line_position] = ch; ch = 0; - if (shell->echo_mode) rt_kprintf("%c", shell->line[shell->line_position]); - shell->line_position ++; - shell->use_history = 0; /* it's a new command */ - } /* end of device read */ - } + /* normal character */ + shell->line[shell->line_position] = ch; ch = 0; + if (shell->echo_mode) rt_kprintf("%c", shell->line[shell->line_position]); + shell->line_position ++; + shell->use_history = 0; /* it's a new command */ + } /* end of device read */ + } } void finsh_system_function_init(const void* begin, const void* end) { - _syscall_table_begin = (struct finsh_syscall*) begin; - _syscall_table_end = (struct finsh_syscall*) end; + _syscall_table_begin = (struct finsh_syscall*) begin; + _syscall_table_end = (struct finsh_syscall*) end; } void finsh_system_var_init(const void* begin, const void* end) { - _sysvar_table_begin = (struct finsh_sysvar*) begin; - _sysvar_table_end = (struct finsh_sysvar*) end; + _sysvar_table_begin = (struct finsh_sysvar*) begin; + _sysvar_table_end = (struct finsh_sysvar*) end; } #if defined(__ICCARM__) /* for IAR compiler */ @@ -466,7 +466,7 @@ void finsh_system_var_init(const void* begin, const void* end) */ int finsh_system_init(void) { - rt_err_t result; + rt_err_t result; #ifdef FINSH_USING_SYMTAB #ifdef __CC_ARM /* ARM C Compiler */ @@ -474,44 +474,44 @@ int finsh_system_init(void) extern const int FSymTab$$Limit; extern const int VSymTab$$Base; extern const int VSymTab$$Limit; - finsh_system_function_init(&FSymTab$$Base, &FSymTab$$Limit); - finsh_system_var_init(&VSymTab$$Base, &VSymTab$$Limit); + finsh_system_function_init(&FSymTab$$Base, &FSymTab$$Limit); + finsh_system_var_init(&VSymTab$$Base, &VSymTab$$Limit); #elif defined (__ICCARM__) /* for IAR Compiler */ finsh_system_function_init(__section_begin("FSymTab"), __section_end("FSymTab")); finsh_system_var_init(__section_begin("VSymTab"), __section_end("VSymTab")); #elif defined (__GNUC__) /* GNU GCC Compiler */ - extern const int __fsymtab_start; - extern const int __fsymtab_end; - extern const int __vsymtab_start; - extern const int __vsymtab_end; - finsh_system_function_init(&__fsymtab_start, &__fsymtab_end); - finsh_system_var_init(&__vsymtab_start, &__vsymtab_end); + extern const int __fsymtab_start; + extern const int __fsymtab_end; + extern const int __vsymtab_start; + extern const int __vsymtab_end; + finsh_system_function_init(&__fsymtab_start, &__fsymtab_end); + finsh_system_var_init(&__vsymtab_start, &__vsymtab_end); #endif #endif - /* create or set shell structure */ + /* create or set shell structure */ #ifdef RT_USING_HEAP - shell = (struct finsh_shell*)rt_malloc(sizeof(struct finsh_shell)); + shell = (struct finsh_shell*)rt_malloc(sizeof(struct finsh_shell)); #else - shell = &_shell; + shell = &_shell; #endif - if (shell == RT_NULL) - { - rt_kprintf("no memory for shell\n"); - return; - } - - memset(shell, 0, sizeof(struct finsh_shell)); + if (shell == RT_NULL) + { + rt_kprintf("no memory for shell\n"); + return; + } + + memset(shell, 0, sizeof(struct finsh_shell)); - rt_sem_init(&(shell->rx_sem), "shrx", 0, 0); - result = rt_thread_init(&finsh_thread, - "tshell", - finsh_thread_entry, RT_NULL, - &finsh_thread_stack[0], sizeof(finsh_thread_stack), - FINSH_THREAD_PRIORITY, 10); + rt_sem_init(&(shell->rx_sem), "shrx", 0, 0); + result = rt_thread_init(&finsh_thread, + "tshell", + finsh_thread_entry, RT_NULL, + &finsh_thread_stack[0], sizeof(finsh_thread_stack), + FINSH_THREAD_PRIORITY, 10); - if (result == RT_EOK) - rt_thread_startup(&finsh_thread); + if (result == RT_EOK) + rt_thread_startup(&finsh_thread); } diff --git a/bsp/efm32/dev_accel.c b/bsp/efm32/dev_accel.c index fb2c05174b..07fcc25ded 100644 --- a/bsp/efm32/dev_accel.c +++ b/bsp/efm32/dev_accel.c @@ -1,8 +1,8 @@ /***************************************************************************//** - * @file dev_accel.c - * @brief Accelerometer driver of RT-Thread RTOS for EFM32 + * @file dev_accel.c + * @brief Accelerometer driver of RT-Thread RTOS for EFM32 * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -10,10 +10,10 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes - * 2011-07-13 onelife Initial creation for using EFM32 ADC module to + * Date Author Notes + * 2011-07-13 onelife Initial creation for using EFM32 ADC module to * interface the Freescale MMA7361L - * 2011-08-02 onelife Add digital interface support of using EFM32 IIC + * 2011-08-02 onelife Add digital interface support of using EFM32 IIC * module for the Freescale MMA7455L ******************************************************************************/ @@ -38,23 +38,23 @@ /* Private define ------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/ #ifdef EFM32_ACCEL_DEBUG -#define accel_debug(format,args...) rt_kprintf(format, ##args) +#define accel_debug(format,args...) rt_kprintf(format, ##args) #else #define accel_debug(format,args...) #endif /* Private constants ---------------------------------------------------------*/ -static rt_device_t accel; +static rt_device_t accel; #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC) -static struct efm32_adc_control_t control = \ - {ADC_MODE_SCAN, {3, ACCEL_USING_DMA}, {}}; -static struct efm32_accel_result_t accelOffset = {0}; +static struct efm32_adc_control_t control = \ + {ADC_MODE_SCAN, {3, ACCEL_USING_DMA}, {}}; +static struct efm32_accel_result_t accelOffset = {0}; #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC) -static const struct efm32_iic_control_t control = \ - {IIC_STATE_MASTER, 0x0000}; +static const struct efm32_iic_control_t control = \ + {IIC_STATE_MASTER, 0x0000}; #endif -static rt_bool_t accelInTime = true; -static rt_uint32_t accelConfig = 0; +static rt_bool_t accelInTime = true; +static rt_uint32_t accelConfig = 0; /* Private variables ---------------------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/ @@ -68,99 +68,99 @@ static rt_uint32_t accelConfig = 0; * @note * * @param[out] data - * Pointer to output buffer + * Pointer to output buffer * * @param[in] lowResolution - * Resolution selection + * Resolution selection * * @return - * Error code + * Error code ******************************************************************************/ rt_err_t efm_accel_get_data(struct efm32_accel_result_t *data, - rt_bool_t lowResolution) + rt_bool_t lowResolution) { - RT_ASSERT(accel != RT_NULL); + RT_ASSERT(accel != RT_NULL); - rt_err_t ret; + rt_err_t ret; - if (data == RT_NULL) - { - return -RT_ERROR; - } + if (data == RT_NULL) + { + return -RT_ERROR; + } - ret = RT_EOK; - do - { - /* --------- ADC interface --------- */ + ret = RT_EOK; + do + { + /* --------- ADC interface --------- */ #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC) - struct efm32_adc_result_t result; + struct efm32_adc_result_t result; - result.mode = control.mode; - result.buffer = (void *)data; - if ((ret = accel->control(accel, RT_DEVICE_CTRL_RESUME, - (void *)&result)) != RT_EOK) - { - break; - } - if ((ret = accel->control(accel, RT_DEVICE_CTRL_ADC_RESULT, \ - (void *)&result)) != RT_EOK) - { - break; - } + result.mode = control.mode; + result.buffer = (void *)data; + if ((ret = accel->control(accel, RT_DEVICE_CTRL_RESUME, + (void *)&result)) != RT_EOK) + { + break; + } + if ((ret = accel->control(accel, RT_DEVICE_CTRL_ADC_RESULT, \ + (void *)&result)) != RT_EOK) + { + break; + } - data->x += accelOffset.x - 0x800; - data->y += accelOffset.y - 0x800; - data->z += accelOffset.z - 0x800; - if (lowResolution) - { - data->x >>= 4; - data->y >>= 4; - data->z >>= 4; - } + data->x += accelOffset.x - 0x800; + data->y += accelOffset.y - 0x800; + data->z += accelOffset.z - 0x800; + if (lowResolution) + { + data->x >>= 4; + data->y >>= 4; + data->z >>= 4; + } - /* --------- IIC interface --------- */ + /* --------- IIC interface --------- */ #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC) - if (lowResolution || \ - ((accelConfig & ACCEL_MASK_RANGE) != MCTL_RANGE_8G)) - { - rt_int8_t buf[3]; + if (lowResolution || \ + ((accelConfig & ACCEL_MASK_RANGE) != MCTL_RANGE_8G)) + { + rt_int8_t buf[3]; - buf[0] = XOUT8; - if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, \ - sizeof(buf)) == 0) - { - ret = -RT_ERROR; - break; - } - data->x = buf[0]; - data->y = buf[1]; - data->z = buf[2]; - } - else - { - rt_uint8_t buf[6]; - rt_uint16_t *temp = (rt_uint16_t *)&buf; + buf[0] = XOUT8; + if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, \ + sizeof(buf)) == 0) + { + ret = -RT_ERROR; + break; + } + data->x = buf[0]; + data->y = buf[1]; + data->z = buf[2]; + } + else + { + rt_uint8_t buf[6]; + rt_uint16_t *temp = (rt_uint16_t *)&buf; - buf[0] = XOUTL; - if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, \ - sizeof(buf)) == 0) - { - ret = -RT_ERROR; - break; - } - data->x = (*temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \ - ((rt_uint32_t)*temp & 0x3FF); - data->y = (*++temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \ - ((rt_uint32_t)*temp & 0x3FF); - data->z = (*++temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \ - ((rt_uint32_t)*temp & 0x3FF); - } + buf[0] = XOUTL; + if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, \ + sizeof(buf)) == 0) + { + ret = -RT_ERROR; + break; + } + data->x = (*temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \ + ((rt_uint32_t)*temp & 0x3FF); + data->y = (*++temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \ + ((rt_uint32_t)*temp & 0x3FF); + data->z = (*++temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \ + ((rt_uint32_t)*temp & 0x3FF); + } #endif - return RT_EOK; - } while (0); + return RT_EOK; + } while (0); - accel_debug("Accel err: Get data failed!\n"); - return ret; + accel_debug("Accel err: Get data failed!\n"); + return ret; } /***************************************************************************//** @@ -172,357 +172,357 @@ rt_err_t efm_accel_get_data(struct efm32_accel_result_t *data, * @note * * @param[in] parameter - * Parameter + * Parameter ******************************************************************************/ static void efm_accel_timer(void* parameter) { - accelInTime = false; + accelInTime = false; } #if (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC) /***************************************************************************//** * @brief - * Accelerometer level and pulse detection interrupts handler + * Accelerometer level and pulse detection interrupts handler * * @details * * @note * * @param[in] device - * Pointer to device descriptor + * Pointer to device descriptor ******************************************************************************/ static void efm_accel_isr(rt_device_t device) { - rt_uint8_t buf[2]; + rt_uint8_t buf[2]; - if ((accelConfig & ACCEL_MASK_MODE) != ACCEL_MODE_MEASUREMENT) - { - /* Read detection source */ - buf[0] = DETSRC; - if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 1) != 1) - { - accel_debug("Accel: read error\n"); - return; - } - accel_debug("Accel: DETSRC %x\n", buf[0]); + if ((accelConfig & ACCEL_MASK_MODE) != ACCEL_MODE_MEASUREMENT) + { + /* Read detection source */ + buf[0] = DETSRC; + if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 1) != 1) + { + accel_debug("Accel: read error\n"); + return; + } + accel_debug("Accel: DETSRC %x\n", buf[0]); - /* Reset the interrupt flags: Part 1 */ - buf[0] = INTRST; - buf[1] = INTRST_INT_1 | INTRST_INT_2; - accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2); + /* Reset the interrupt flags: Part 1 */ + buf[0] = INTRST; + buf[1] = INTRST_INT_1 | INTRST_INT_2; + accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2); - /* Read status to waste some time */ - buf[0] = STATUS; - if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 1) != 1) - { - accel_debug("Accel: read error\n"); - return; - } - accel_debug("Accel: STATUS %x\n", buf[0]); + /* Read status to waste some time */ + buf[0] = STATUS; + if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 1) != 1) + { + accel_debug("Accel: read error\n"); + return; + } + accel_debug("Accel: STATUS %x\n", buf[0]); - /* Reset the interrupt flags: Part 2 */ - buf[0] = INTRST; - buf[1] = 0x00; - accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2); - } + /* Reset the interrupt flags: Part 2 */ + buf[0] = INTRST; + buf[1] = 0x00; + accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2); + } } /***************************************************************************//** * @brief - * Accelerometer configuration function + * Accelerometer configuration function * * @details * * @note * * @param[in] config - * Configuration options + * Configuration options * * @param[in] level_threshold - * Level detection threshold + * Level detection threshold * * @param[in] pulse_threshold - * Pulse detection threshold + * Pulse detection threshold * * @param[in] pulse_duration - * Time window for 1st pulse + * Time window for 1st pulse * * @param[in] pulse_latency - * Pulse latency Time + * Pulse latency Time * * @param[in] pulse_duration2 - * Time window for 2nd pulse + * Time window for 2nd pulse * * @return - * Error code + * Error code ******************************************************************************/ rt_err_t efm_accel_config(rt_uint32_t config, - rt_uint8_t level_threshold, - rt_uint8_t pulse_threshold, - rt_uint8_t pulse_duration, - rt_uint8_t pulse_latency, - rt_uint8_t pulse_duration2) + rt_uint8_t level_threshold, + rt_uint8_t pulse_threshold, + rt_uint8_t pulse_duration, + rt_uint8_t pulse_latency, + rt_uint8_t pulse_duration2) { - rt_err_t ret; - rt_uint8_t buf[2]; - rt_uint8_t mode, mctl_reg, ctl1_reg, ctl2_reg; + rt_err_t ret; + rt_uint8_t buf[2]; + rt_uint8_t mode, mctl_reg, ctl1_reg, ctl2_reg; - ret = RT_EOK; - mctl_reg = 0; - ctl1_reg = 0; - ctl2_reg = 0; + ret = RT_EOK; + mctl_reg = 0; + ctl1_reg = 0; + ctl2_reg = 0; - /* Modify MCTL */ - mode = config & ACCEL_MASK_MODE; - switch (mode) - { - case ACCEL_MODE_STANDBY: - mctl_reg |= MCTL_MODE_STANDBY; - break; - case ACCEL_MODE_MEASUREMENT: - mctl_reg |= MCTL_MODE_MEASUREMENT; - break; - case ACCEL_MODE_LEVEL: - mctl_reg |= MCTL_MODE_LEVEL; - break; - case ACCEL_MODE_PULSE: - mctl_reg |= MCTL_MODE_PULSE; - break; - default: - return -RT_ERROR; - } + /* Modify MCTL */ + mode = config & ACCEL_MASK_MODE; + switch (mode) + { + case ACCEL_MODE_STANDBY: + mctl_reg |= MCTL_MODE_STANDBY; + break; + case ACCEL_MODE_MEASUREMENT: + mctl_reg |= MCTL_MODE_MEASUREMENT; + break; + case ACCEL_MODE_LEVEL: + mctl_reg |= MCTL_MODE_LEVEL; + break; + case ACCEL_MODE_PULSE: + mctl_reg |= MCTL_MODE_PULSE; + break; + default: + return -RT_ERROR; + } - switch (config & ACCEL_MASK_RANGE) - { - case ACCEL_RANGE_8G: - mctl_reg |= MCTL_RANGE_8G; - break; - case ACCEL_RANGE_4G: - mctl_reg |= MCTL_RANGE_4G; - break; - case ACCEL_RANGE_2G: - mctl_reg |= MCTL_RANGE_2G; - break; - default: - return -RT_ERROR; - } + switch (config & ACCEL_MASK_RANGE) + { + case ACCEL_RANGE_8G: + mctl_reg |= MCTL_RANGE_8G; + break; + case ACCEL_RANGE_4G: + mctl_reg |= MCTL_RANGE_4G; + break; + case ACCEL_RANGE_2G: + mctl_reg |= MCTL_RANGE_2G; + break; + default: + return -RT_ERROR; + } - if ((mode == ACCEL_MODE_LEVEL) || (mode == ACCEL_MODE_PULSE)) - { - mctl_reg |= MCTL_PIN_INT1; - } + if ((mode == ACCEL_MODE_LEVEL) || (mode == ACCEL_MODE_PULSE)) + { + mctl_reg |= MCTL_PIN_INT1; + } - /* Modify CTL1 */ - if (config & ACCEL_INTPIN_INVERSE) - { - ctl1_reg |= CTL1_INTPIN_INVERSE; - } + /* Modify CTL1 */ + if (config & ACCEL_INTPIN_INVERSE) + { + ctl1_reg |= CTL1_INTPIN_INVERSE; + } - switch (config & ACCEL_MASK_INT) - { - case ACCEL_INT_LEVEL_PULSE: - ctl1_reg |= CTL1_INT_LEVEL_PULSE; - break; - case ACCEL_INT_PULSE_LEVEL: - ctl1_reg |= CTL1_INT_PULSE_LEVEL; - break; - case ACCEL_INT_SINGLE_DOUBLE: - ctl1_reg |= CTL1_INT_SINGLE_DOUBLE; - break; - default: - break; - } + switch (config & ACCEL_MASK_INT) + { + case ACCEL_INT_LEVEL_PULSE: + ctl1_reg |= CTL1_INT_LEVEL_PULSE; + break; + case ACCEL_INT_PULSE_LEVEL: + ctl1_reg |= CTL1_INT_PULSE_LEVEL; + break; + case ACCEL_INT_SINGLE_DOUBLE: + ctl1_reg |= CTL1_INT_SINGLE_DOUBLE; + break; + default: + break; + } - switch (config & ACCEL_MASK_DISABLE) - { - case ACCEL_DISABLE_X: - ctl1_reg |= CTL1_X_DISABLE; - break; - case ACCEL_DISABLE_Y: - ctl1_reg |= CTL1_Y_DISABLE; - break; - case ACCEL_DISABLE_Z: - ctl1_reg |= CTL1_Z_DISABLE; - break; - default: - break; - } + switch (config & ACCEL_MASK_DISABLE) + { + case ACCEL_DISABLE_X: + ctl1_reg |= CTL1_X_DISABLE; + break; + case ACCEL_DISABLE_Y: + ctl1_reg |= CTL1_Y_DISABLE; + break; + case ACCEL_DISABLE_Z: + ctl1_reg |= CTL1_Z_DISABLE; + break; + default: + break; + } - if (config & ACCEL_THRESHOLD_INTEGER) - { - ctl1_reg |= CTL1_THRESHOLD_INTEGER; - } + if (config & ACCEL_THRESHOLD_INTEGER) + { + ctl1_reg |= CTL1_THRESHOLD_INTEGER; + } - if (config & ACCEL_BANDWIDTH_125HZ) - { - ctl1_reg |= CTL1_BANDWIDTH_125HZ; - } + if (config & ACCEL_BANDWIDTH_125HZ) + { + ctl1_reg |= CTL1_BANDWIDTH_125HZ; + } - /* Modify CTL2 */ - if (config & ACCEL_LEVEL_AND) - { - ctl2_reg |= CTL2_LEVEL_AND; - } - if (config & ACCEL_PULSE_AND) - { - ctl2_reg |= CTL2_PULSE_AND; - } - if (config & ACCEL_DRIVE_STRONG) - { - ctl2_reg |= CTL2_DRIVE_STRONG; - } + /* Modify CTL2 */ + if (config & ACCEL_LEVEL_AND) + { + ctl2_reg |= CTL2_LEVEL_AND; + } + if (config & ACCEL_PULSE_AND) + { + ctl2_reg |= CTL2_PULSE_AND; + } + if (config & ACCEL_DRIVE_STRONG) + { + ctl2_reg |= CTL2_DRIVE_STRONG; + } - do - { - /* Write registers */ - buf[0] = MCTL; - buf[1] = mctl_reg; - if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) - { - ret = -RT_ERROR; - break; - } - accel_debug("Accel: MCTL %x\n", mctl_reg); + do + { + /* Write registers */ + buf[0] = MCTL; + buf[1] = mctl_reg; + if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) + { + ret = -RT_ERROR; + break; + } + accel_debug("Accel: MCTL %x\n", mctl_reg); - buf[0] = CTL1; - buf[1] = ctl1_reg; - if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) - { - ret = -RT_ERROR; - break; - } - accel_debug("Accel: CTL1 %x\n", ctl1_reg); + buf[0] = CTL1; + buf[1] = ctl1_reg; + if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) + { + ret = -RT_ERROR; + break; + } + accel_debug("Accel: CTL1 %x\n", ctl1_reg); - buf[0] = CTL2; - buf[1] = ctl2_reg; - if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) - { - ret = -RT_ERROR; - break; - } - accel_debug("Accel: CTL2 %x\n", ctl2_reg); - accelConfig = config; + buf[0] = CTL2; + buf[1] = ctl2_reg; + if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) + { + ret = -RT_ERROR; + break; + } + accel_debug("Accel: CTL2 %x\n", ctl2_reg); + accelConfig = config; - if (mode == ACCEL_MODE_PULSE) - { - buf[0] = PDTH; - buf[1] = pulse_threshold; - if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) - { - ret = -RT_ERROR; - break; - } - accel_debug("Accel: PDTH %x\n", buf[1]); + if (mode == ACCEL_MODE_PULSE) + { + buf[0] = PDTH; + buf[1] = pulse_threshold; + if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) + { + ret = -RT_ERROR; + break; + } + accel_debug("Accel: PDTH %x\n", buf[1]); - buf[0] = PW; - buf[1] = pulse_duration; - if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) - { - ret = -RT_ERROR; - break; - } - accel_debug("Accel: PW %x\n", buf[1]); + buf[0] = PW; + buf[1] = pulse_duration; + if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) + { + ret = -RT_ERROR; + break; + } + accel_debug("Accel: PW %x\n", buf[1]); - buf[0] = LT; - buf[1] = pulse_latency; - if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) - { - ret = -RT_ERROR; - break; - } - accel_debug("Accel: LT %x\n", buf[1]); + buf[0] = LT; + buf[1] = pulse_latency; + if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) + { + ret = -RT_ERROR; + break; + } + accel_debug("Accel: LT %x\n", buf[1]); - buf[0] = TW; - buf[1] = pulse_duration2; - if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) - { - ret = -RT_ERROR; - break; - } - accel_debug("Accel: TW %x\n", buf[1]); - } + buf[0] = TW; + buf[1] = pulse_duration2; + if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) + { + ret = -RT_ERROR; + break; + } + accel_debug("Accel: TW %x\n", buf[1]); + } - if ((mode == ACCEL_MODE_LEVEL) || (mode == ACCEL_MODE_PULSE)) - { - efm32_irq_hook_init_t hook; + if ((mode == ACCEL_MODE_LEVEL) || (mode == ACCEL_MODE_PULSE)) + { + efm32_irq_hook_init_t hook; - /* Reset the interrupt flags: Part 1 */ - buf[0] = INTRST; - buf[1] = INTRST_INT_1 | INTRST_INT_2; - if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) - { - ret = -RT_ERROR; - break; - } + /* Reset the interrupt flags: Part 1 */ + buf[0] = INTRST; + buf[1] = INTRST_INT_1 | INTRST_INT_2; + if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) + { + ret = -RT_ERROR; + break; + } - /* Set level detection threshold */ - buf[0] = LDTH; - if (config & ACCEL_THRESHOLD_INTEGER) - { - buf[1] = level_threshold; - } - else - { - buf[1] = level_threshold & 0x7f; - } - if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) - { - ret = -RT_ERROR; - break; - } - accel_debug("Accel: LDTH %x\n", buf[1]); + /* Set level detection threshold */ + buf[0] = LDTH; + if (config & ACCEL_THRESHOLD_INTEGER) + { + buf[1] = level_threshold; + } + else + { + buf[1] = level_threshold & 0x7f; + } + if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) + { + ret = -RT_ERROR; + break; + } + accel_debug("Accel: LDTH %x\n", buf[1]); - /* Config interrupt */ - hook.type = efm32_irq_type_gpio; - hook.unit = ACCEL_INT1_PIN; - hook.cbFunc = efm_accel_isr; - hook.userPtr = RT_NULL; - efm32_irq_hook_register(&hook); - hook.unit = ACCEL_INT2_PIN; - efm32_irq_hook_register(&hook); - /* Clear pending interrupt */ - BITBAND_Peripheral(&(GPIO->IFC), ACCEL_INT1_PIN, 0x1UL); - BITBAND_Peripheral(&(GPIO->IFC), ACCEL_INT2_PIN, 0x1UL); - /* Set raising edge interrupt and clear/enable it */ - GPIO_IntConfig( - ACCEL_INT1_PORT, - ACCEL_INT1_PIN, - true, - false, - true); - GPIO_IntConfig( - ACCEL_INT2_PORT, - ACCEL_INT2_PIN, - true, - false, - true); - if (((rt_uint8_t)ACCEL_INT1_PORT % 2) || \ - ((rt_uint8_t)ACCEL_INT2_PORT % 2)) - { - NVIC_ClearPendingIRQ(GPIO_ODD_IRQn); - NVIC_SetPriority(GPIO_ODD_IRQn, EFM32_IRQ_PRI_DEFAULT); - NVIC_EnableIRQ(GPIO_ODD_IRQn); - } - if (!((rt_uint8_t)ACCEL_INT1_PORT % 2) || \ - !((rt_uint8_t)ACCEL_INT2_PORT % 2)) - { - NVIC_ClearPendingIRQ(GPIO_EVEN_IRQn); - NVIC_SetPriority(GPIO_EVEN_IRQn, EFM32_IRQ_PRI_DEFAULT); - NVIC_EnableIRQ(GPIO_EVEN_IRQn); - } + /* Config interrupt */ + hook.type = efm32_irq_type_gpio; + hook.unit = ACCEL_INT1_PIN; + hook.cbFunc = efm_accel_isr; + hook.userPtr = RT_NULL; + efm32_irq_hook_register(&hook); + hook.unit = ACCEL_INT2_PIN; + efm32_irq_hook_register(&hook); + /* Clear pending interrupt */ + BITBAND_Peripheral(&(GPIO->IFC), ACCEL_INT1_PIN, 0x1UL); + BITBAND_Peripheral(&(GPIO->IFC), ACCEL_INT2_PIN, 0x1UL); + /* Set raising edge interrupt and clear/enable it */ + GPIO_IntConfig( + ACCEL_INT1_PORT, + ACCEL_INT1_PIN, + true, + false, + true); + GPIO_IntConfig( + ACCEL_INT2_PORT, + ACCEL_INT2_PIN, + true, + false, + true); + if (((rt_uint8_t)ACCEL_INT1_PORT % 2) || \ + ((rt_uint8_t)ACCEL_INT2_PORT % 2)) + { + NVIC_ClearPendingIRQ(GPIO_ODD_IRQn); + NVIC_SetPriority(GPIO_ODD_IRQn, EFM32_IRQ_PRI_DEFAULT); + NVIC_EnableIRQ(GPIO_ODD_IRQn); + } + if (!((rt_uint8_t)ACCEL_INT1_PORT % 2) || \ + !((rt_uint8_t)ACCEL_INT2_PORT % 2)) + { + NVIC_ClearPendingIRQ(GPIO_EVEN_IRQn); + NVIC_SetPriority(GPIO_EVEN_IRQn, EFM32_IRQ_PRI_DEFAULT); + NVIC_EnableIRQ(GPIO_EVEN_IRQn); + } - /* Reset the interrupt flags: Part 2 */ - buf[0] = INTRST; - buf[1] = 0x00; - if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) - { - ret = -RT_ERROR; - break; - } - } - } while (0); + /* Reset the interrupt flags: Part 2 */ + buf[0] = INTRST; + buf[1] = 0x00; + if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0) + { + ret = -RT_ERROR; + break; + } + } + } while (0); - return ret; + return ret; } #endif @@ -536,203 +536,203 @@ rt_err_t efm_accel_config(rt_uint32_t config, * @note * * @param[in] mode - * 0, simple mode (assuming the device is placed on flat surface) - * 1, interaction method + * 0, simple mode (assuming the device is placed on flat surface) + * 1, interaction method * * @param[in] period - * Time period to perform auto-zero calibration + * Time period to perform auto-zero calibration * * @return - * Error code + * Error code ******************************************************************************/ rt_err_t efm_accel_auto_zero(rt_uint8_t mode, rt_tick_t period) { - RT_ASSERT(accel != RT_NULL); + RT_ASSERT(accel != RT_NULL); - rt_timer_t calTimer; - struct efm32_accel_result_t min = {0, 0, 0}; - struct efm32_accel_result_t max = {0, 0, 0}; - struct efm32_accel_result_t temp, sum; - rt_int32_t simpleOffset[] = ACCEL_CAL_1G_VALUE; - rt_uint8_t cmd[7] = {0}; - rt_uint8_t i, j; + rt_timer_t calTimer; + struct efm32_accel_result_t min = {0, 0, 0}; + struct efm32_accel_result_t max = {0, 0, 0}; + struct efm32_accel_result_t temp, sum; + rt_int32_t simpleOffset[] = ACCEL_CAL_1G_VALUE; + rt_uint8_t cmd[7] = {0}; + rt_uint8_t i, j; - /* Reset offset */ + /* Reset offset */ #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC) - accelOffset.x = 0; - accelOffset.y = 0; - accelOffset.z = 0; + accelOffset.x = 0; + accelOffset.y = 0; + accelOffset.z = 0; #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC) - cmd[0] = XOFFL; - if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0) - { - return -RT_ERROR; - } + cmd[0] = XOFFL; + if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0) + { + return -RT_ERROR; + } #endif - if (mode == ACCEL_CAL_SIMPLE) - { - /* Simple mode */ - for (j = 0; j < ACCEL_CAL_ROUND; j++) - { - sum.x = 0x0; - sum.y = 0x0; - sum.z = 0x0; + if (mode == ACCEL_CAL_SIMPLE) + { + /* Simple mode */ + for (j = 0; j < ACCEL_CAL_ROUND; j++) + { + sum.x = 0x0; + sum.y = 0x0; + sum.z = 0x0; - for (i = 0; i < ACCEL_CAL_SAMPLES; i++) - { + for (i = 0; i < ACCEL_CAL_SAMPLES; i++) + { #if (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC) - /* Waiting for data ready */ - while(!GPIO_PinInGet(ACCEL_INT1_PORT, ACCEL_INT1_PIN)); + /* Waiting for data ready */ + while(!GPIO_PinInGet(ACCEL_INT1_PORT, ACCEL_INT1_PIN)); #endif - if (efm_accel_get_data(&temp, false) != RT_EOK) - { - return -RT_ERROR; - } - sum.x += temp.x; - sum.y += temp.y; - sum.z += temp.z; - } + if (efm_accel_get_data(&temp, false) != RT_EOK) + { + return -RT_ERROR; + } + sum.x += temp.x; + sum.y += temp.y; + sum.z += temp.z; + } #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC) - temp.x = sum.x / ACCEL_CAL_SAMPLES; - temp.y = sum.y / ACCEL_CAL_SAMPLES; - temp.z = sum.z / ACCEL_CAL_SAMPLES - simpleOffset[ACCEL_G_SELECT]; - if ((temp.x == 0) && (temp.y == 0) && \ - (temp.z == 0)) - { - accel_debug("Accel: Offset %+d %+d %+d\n", - accelOffset.x, accelOffset.y, accelOffset.z); - break; - } - accelOffset.x -= temp.x; - accelOffset.y -= temp.y; - accelOffset.z -= temp.z; + temp.x = sum.x / ACCEL_CAL_SAMPLES; + temp.y = sum.y / ACCEL_CAL_SAMPLES; + temp.z = sum.z / ACCEL_CAL_SAMPLES - simpleOffset[ACCEL_G_SELECT]; + if ((temp.x == 0) && (temp.y == 0) && \ + (temp.z == 0)) + { + accel_debug("Accel: Offset %+d %+d %+d\n", + accelOffset.x, accelOffset.y, accelOffset.z); + break; + } + accelOffset.x -= temp.x; + accelOffset.y -= temp.y; + accelOffset.z -= temp.z; #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC) - temp.x = sum.x / (ACCEL_CAL_SAMPLES >> 1); - temp.y = sum.y / (ACCEL_CAL_SAMPLES >> 1); - temp.z = sum.z / (ACCEL_CAL_SAMPLES >> 1) \ - - (simpleOffset[ACCEL_G_SELECT] << 1); - if ((temp.x == 0) && (temp.y == 0) && \ - (temp.z == 0)) - { - break; - } + temp.x = sum.x / (ACCEL_CAL_SAMPLES >> 1); + temp.y = sum.y / (ACCEL_CAL_SAMPLES >> 1); + temp.z = sum.z / (ACCEL_CAL_SAMPLES >> 1) \ + - (simpleOffset[ACCEL_G_SELECT] << 1); + if ((temp.x == 0) && (temp.y == 0) && \ + (temp.z == 0)) + { + break; + } - /* Set offset drift registers */ - max.x -= temp.x; - max.y -= temp.y; - max.z -= temp.z; - *(rt_int16_t *)&cmd[1] = (rt_int16_t)max.x; - *(rt_int16_t *)&cmd[3] = (rt_int16_t)max.y; - *(rt_int16_t *)&cmd[5] = (rt_int16_t)max.z; - if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0) - { - return -RT_ERROR; - } - accel_debug("Accel: Offset %+d %+d %+d\n", *(rt_int16_t *)&cmd[1], \ - *(rt_int16_t *)&cmd[3], *(rt_int16_t *)&cmd[5]); + /* Set offset drift registers */ + max.x -= temp.x; + max.y -= temp.y; + max.z -= temp.z; + *(rt_int16_t *)&cmd[1] = (rt_int16_t)max.x; + *(rt_int16_t *)&cmd[3] = (rt_int16_t)max.y; + *(rt_int16_t *)&cmd[5] = (rt_int16_t)max.z; + if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0) + { + return -RT_ERROR; + } + accel_debug("Accel: Offset %+d %+d %+d\n", *(rt_int16_t *)&cmd[1], \ + *(rt_int16_t *)&cmd[3], *(rt_int16_t *)&cmd[5]); #endif - rt_thread_sleep(1); - } - } - else - { - /* Interact mode */ - if ((calTimer = rt_timer_create( - "cal_tmr", - efm_accel_timer, - RT_NULL, - period, - RT_TIMER_FLAG_ONE_SHOT)) == RT_NULL) - { - accel_debug("Accel err: Create timer failed!\n"); - return -RT_ERROR; - } + rt_thread_sleep(1); + } + } + else + { + /* Interact mode */ + if ((calTimer = rt_timer_create( + "cal_tmr", + efm_accel_timer, + RT_NULL, + period, + RT_TIMER_FLAG_ONE_SHOT)) == RT_NULL) + { + accel_debug("Accel err: Create timer failed!\n"); + return -RT_ERROR; + } - accelInTime = true; - rt_timer_start(calTimer); - do - { - sum.x = 0x0; - sum.y = 0x0; - sum.z = 0x0; + accelInTime = true; + rt_timer_start(calTimer); + do + { + sum.x = 0x0; + sum.y = 0x0; + sum.z = 0x0; - for (i = 0; i < ACCEL_CAL_SAMPLES; i++) - { + for (i = 0; i < ACCEL_CAL_SAMPLES; i++) + { #if (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC) - /* Waiting for data ready */ - while(!GPIO_PinInGet(ACCEL_INT1_PORT, ACCEL_INT1_PIN)); + /* Waiting for data ready */ + while(!GPIO_PinInGet(ACCEL_INT1_PORT, ACCEL_INT1_PIN)); #endif - if (efm_accel_get_data(&temp, false) != RT_EOK) - { - return -RT_ERROR; - } - sum.x += temp.x; - sum.y += temp.y; - sum.z += temp.z; - } - sum.x /= ACCEL_CAL_SAMPLES; - sum.y /= ACCEL_CAL_SAMPLES; - sum.z /= ACCEL_CAL_SAMPLES; - if (sum.x < min.x) - { - min.x = sum.x; - } - if (sum.y < min.y) - { - min.y = sum.y; - } - if (sum.z < min.z) - { - min.z = sum.z; - } - if (sum.x > max.x) - { - max.x = sum.x; - } - if (sum.y > max.y) - { - max.y = sum.y; - } - if (sum.z > max.z) - { - max.z = sum.z; - } - rt_thread_sleep(1); - } while (accelInTime); + if (efm_accel_get_data(&temp, false) != RT_EOK) + { + return -RT_ERROR; + } + sum.x += temp.x; + sum.y += temp.y; + sum.z += temp.z; + } + sum.x /= ACCEL_CAL_SAMPLES; + sum.y /= ACCEL_CAL_SAMPLES; + sum.z /= ACCEL_CAL_SAMPLES; + if (sum.x < min.x) + { + min.x = sum.x; + } + if (sum.y < min.y) + { + min.y = sum.y; + } + if (sum.z < min.z) + { + min.z = sum.z; + } + if (sum.x > max.x) + { + max.x = sum.x; + } + if (sum.y > max.y) + { + max.y = sum.y; + } + if (sum.z > max.z) + { + max.z = sum.z; + } + rt_thread_sleep(1); + } while (accelInTime); - accel_debug("Accel: Min %+d %+d %+d, max %+d %+d %+d\n", - min.x, min.y, min.z, max.x, max.y, max.z); + accel_debug("Accel: Min %+d %+d %+d, max %+d %+d %+d\n", + min.x, min.y, min.z, max.x, max.y, max.z); #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC) - accelOffset.x = -((min.x + max.x) >> 1); - accelOffset.y = -((min.y + max.y) >> 1); - accelOffset.z = -((min.z + max.z) >> 1); + accelOffset.x = -((min.x + max.x) >> 1); + accelOffset.y = -((min.y + max.y) >> 1); + accelOffset.z = -((min.z + max.z) >> 1); - accel_debug("Accel: Offset %+d %+d %+d\n", - accelOffset.x, accelOffset.y, accelOffset.z); + accel_debug("Accel: Offset %+d %+d %+d\n", + accelOffset.x, accelOffset.y, accelOffset.z); #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC) - /* Set offset drift registers */ - *(rt_int16_t *)&cmd[1] = (rt_int16_t)-(min.x + max.x); - *(rt_int16_t *)&cmd[3] = (rt_int16_t)-(min.y + max.y); - *(rt_int16_t *)&cmd[5] = (rt_int16_t)-(min.z + max.z); - if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0) - { - return -RT_ERROR; - } + /* Set offset drift registers */ + *(rt_int16_t *)&cmd[1] = (rt_int16_t)-(min.x + max.x); + *(rt_int16_t *)&cmd[3] = (rt_int16_t)-(min.y + max.y); + *(rt_int16_t *)&cmd[5] = (rt_int16_t)-(min.z + max.z); + if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0) + { + return -RT_ERROR; + } - accel_debug("Accel: Offset %+d %+d %+d\n", - *(rt_int16_t *)&cmd[1], *(rt_int16_t *)&cmd[3], *(rt_int16_t *)&cmd[5]); + accel_debug("Accel: Offset %+d %+d %+d\n", + *(rt_int16_t *)&cmd[1], *(rt_int16_t *)&cmd[3], *(rt_int16_t *)&cmd[5]); #endif - rt_timer_delete(calTimer); - } + rt_timer_delete(calTimer); + } - return RT_EOK; + return RT_EOK; } /***************************************************************************//** @@ -744,147 +744,147 @@ rt_err_t efm_accel_auto_zero(rt_uint8_t mode, rt_tick_t period) * @note * * @return - * Error code + * Error code ******************************************************************************/ rt_err_t efm_accel_init(void) { - rt_err_t ret; + rt_err_t ret; - ret = RT_EOK; - do - { - /* Find ADC device */ - accel = rt_device_find(ACCEL_USING_DEVICE_NAME); - if (accel == RT_NULL) - { - accel_debug("Accel err: Can't find device: %s!\n", ACCEL_USING_DEVICE_NAME); - ret = -RT_ERROR; - break; - } - accel_debug("Accel: Find device %s\n", ACCEL_USING_DEVICE_NAME); + ret = RT_EOK; + do + { + /* Find ADC device */ + accel = rt_device_find(ACCEL_USING_DEVICE_NAME); + if (accel == RT_NULL) + { + accel_debug("Accel err: Can't find device: %s!\n", ACCEL_USING_DEVICE_NAME); + ret = -RT_ERROR; + break; + } + accel_debug("Accel: Find device %s\n", ACCEL_USING_DEVICE_NAME); - /* --------- ADC interface --------- */ + /* --------- ADC interface --------- */ #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC) - ADC_InitScan_TypeDef scanInit = ADC_INITSCAN_DEFAULT; + ADC_InitScan_TypeDef scanInit = ADC_INITSCAN_DEFAULT; #if defined(EFM32_GXXX_DK) - /* Enable accelerometer */ - DVK_enablePeripheral(DVK_ACCEL); - /* Select g-range */ + /* Enable accelerometer */ + DVK_enablePeripheral(DVK_ACCEL); + /* Select g-range */ #if (ACCEL_G_SELECT == 0) - DVK_disablePeripheral(DVK_ACCEL_GSEL); + DVK_disablePeripheral(DVK_ACCEL_GSEL); #elif (ACCEL_G_SELECT == 1) - DVK_enablePeripheral(DVK_ACCEL_GSEL); + DVK_enablePeripheral(DVK_ACCEL_GSEL); #else #error "Wrong value for ACCEL_G_SELECT" #endif #endif - /* Init ADC for scan mode */ - scanInit.reference = adcRefVDD; - scanInit.input = ACCEL_X_ADC_CH | ACCEL_Y_ADC_CH | ACCEL_Z_ADC_CH; + /* Init ADC for scan mode */ + scanInit.reference = adcRefVDD; + scanInit.input = ACCEL_X_ADC_CH | ACCEL_Y_ADC_CH | ACCEL_Z_ADC_CH; - control.scan.init = &scanInit; - if ((ret = accel->control(accel, RT_DEVICE_CTRL_ADC_MODE, \ - (void *)&control)) != RT_EOK) - { - break; - } + control.scan.init = &scanInit; + if ((ret = accel->control(accel, RT_DEVICE_CTRL_ADC_MODE, \ + (void *)&control)) != RT_EOK) + { + break; + } - /* --------- IIC interface --------- */ + /* --------- IIC interface --------- */ #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC) - rt_uint8_t cmd[2]; + rt_uint8_t cmd[2]; - /* Initialize */ - if ((ret = accel->control(accel, RT_DEVICE_CTRL_IIC_SETTING, \ - (void *)&control)) != RT_EOK) - { - break; - } + /* Initialize */ + if ((ret = accel->control(accel, RT_DEVICE_CTRL_IIC_SETTING, \ + (void *)&control)) != RT_EOK) + { + break; + } - if (efm_accel_config( - ACCEL_MODE_MEASUREMENT | ACCEL_RANGE_2G, - EFM32_NO_DATA, - EFM32_NO_DATA, - EFM32_NO_DATA, - EFM32_NO_DATA, - EFM32_NO_DATA) != RT_EOK) - { - break; - } + if (efm_accel_config( + ACCEL_MODE_MEASUREMENT | ACCEL_RANGE_2G, + EFM32_NO_DATA, + EFM32_NO_DATA, + EFM32_NO_DATA, + EFM32_NO_DATA, + EFM32_NO_DATA) != RT_EOK) + { + break; + } - /* Config interrupt pin1 */ - GPIO_PinModeSet(ACCEL_INT1_PORT, ACCEL_INT1_PIN, gpioModeInput, 0); - /* Config interrupt pin2 */ - GPIO_PinModeSet(ACCEL_INT2_PORT, ACCEL_INT2_PIN, gpioModeInput, 0); + /* Config interrupt pin1 */ + GPIO_PinModeSet(ACCEL_INT1_PORT, ACCEL_INT1_PIN, gpioModeInput, 0); + /* Config interrupt pin2 */ + GPIO_PinModeSet(ACCEL_INT2_PORT, ACCEL_INT2_PIN, gpioModeInput, 0); #endif - accel_debug("Accel: Init OK\n"); - return RT_EOK; - } while (0); + accel_debug("Accel: Init OK\n"); + return RT_EOK; + } while (0); - accel_debug("Accel err: Init failed!\n"); - return -RT_ERROR; + accel_debug("Accel err: Init failed!\n"); + return -RT_ERROR; } /******************************************************************************* - * Export to FINSH + * Export to FINSH ******************************************************************************/ #ifdef RT_USING_FINSH #include <finsh.h> void accel_cal(rt_uint8_t mode, rt_uint32_t second) { - if (efm_accel_auto_zero(mode, RT_TICK_PER_SECOND * second) != RT_EOK) - { - rt_kprintf("Error occurred."); - return; - } + if (efm_accel_auto_zero(mode, RT_TICK_PER_SECOND * second) != RT_EOK) + { + rt_kprintf("Error occurred."); + return; + } - rt_kprintf("Calibration done.\n"); + rt_kprintf("Calibration done.\n"); } FINSH_FUNCTION_EXPORT(accel_cal, auto-zero calibration.) void list_accel(void) { - struct efm32_accel_result_t data; + struct efm32_accel_result_t data; - efm_accel_get_data(&data, false); - rt_kprintf("X: %d, Y: %d, Z: %d\n", data.x, data.y, data.z); + efm_accel_get_data(&data, false); + rt_kprintf("X: %d, Y: %d, Z: %d\n", data.x, data.y, data.z); } FINSH_FUNCTION_EXPORT(list_accel, list accelerometer info.) void test_accel(rt_uint8_t mode) { - if (mode == 0) - { - if (efm_accel_config( - ACCEL_MODE_LEVEL | ACCEL_RANGE_8G | ACCEL_INT_LEVEL_PULSE | \ - ACCEL_SOURCE_LEVEL_X | ACCEL_SOURCE_LEVEL_Y, - 0x1f, - EFM32_NO_DATA, - EFM32_NO_DATA, - EFM32_NO_DATA, - EFM32_NO_DATA) != RT_EOK) - { - rt_kprintf("efm_accel_config(): error\n"); - return; - } - } - else - { - if (efm_accel_config( - ACCEL_MODE_PULSE | ACCEL_RANGE_8G | ACCEL_INT_SINGLE_DOUBLE | \ - ACCEL_SOURCE_PULSE_X | ACCEL_SOURCE_PULSE_Y, - 0x1f, - 0x1f, - 200, - 255, - 255) != RT_EOK) - { - rt_kprintf("efm_accel_config(): error\n"); - return; - } - } + if (mode == 0) + { + if (efm_accel_config( + ACCEL_MODE_LEVEL | ACCEL_RANGE_8G | ACCEL_INT_LEVEL_PULSE | \ + ACCEL_SOURCE_LEVEL_X | ACCEL_SOURCE_LEVEL_Y, + 0x1f, + EFM32_NO_DATA, + EFM32_NO_DATA, + EFM32_NO_DATA, + EFM32_NO_DATA) != RT_EOK) + { + rt_kprintf("efm_accel_config(): error\n"); + return; + } + } + else + { + if (efm_accel_config( + ACCEL_MODE_PULSE | ACCEL_RANGE_8G | ACCEL_INT_SINGLE_DOUBLE | \ + ACCEL_SOURCE_PULSE_X | ACCEL_SOURCE_PULSE_Y, + 0x1f, + 0x1f, + 200, + 255, + 255) != RT_EOK) + { + rt_kprintf("efm_accel_config(): error\n"); + return; + } + } } FINSH_FUNCTION_EXPORT(test_accel, list accelerometer info.) #endif diff --git a/bsp/efm32/dev_accel.h b/bsp/efm32/dev_accel.h index 2e12d797d3..cc75631834 100644 --- a/bsp/efm32/dev_accel.h +++ b/bsp/efm32/dev_accel.h @@ -1,8 +1,8 @@ /***************************************************************************//** - * @file dev_accel.h - * @brief Accelerometer driver of RT-Thread RTOS for EFM32 + * @file dev_accel.h + * @brief Accelerometer driver of RT-Thread RTOS for EFM32 * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -10,10 +10,10 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes - * 2011-07-13 onelife Initial creation for using EFM32 ADC module to + * Date Author Notes + * 2011-07-13 onelife Initial creation for using EFM32 ADC module to * interface the Freescale MMA7361L - * 2011-08-02 onelife Add digital interface support of using EFM32 IIC + * 2011-08-02 onelife Add digital interface support of using EFM32 IIC * module for the Freescale MMA7455L ******************************************************************************/ #ifndef __DEV_ACCEL_H__ @@ -27,95 +27,95 @@ /* Exported types ------------------------------------------------------------*/ struct efm32_accel_result_t { - rt_int32_t x; - rt_int32_t y; - rt_int32_t z; + rt_int32_t x; + rt_int32_t y; + rt_int32_t z; }; /* Exported constants --------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/ -/* MMA7361LC - g-Select g-Range Sensitivity - 0 1.5 g 800 mV/g - 1 6 g 206 mV/g +/* MMA7361LC + g-Select g-Range Sensitivity + 0 1.5 g 800 mV/g + 1 6 g 206 mV/g - MMA7455L - g-Select g-Range Sensitivity - 0 2 g 64 LSB/g - 1 4 g 32 LSB/g - 2 8 g 16 LSB/g + MMA7455L + g-Select g-Range Sensitivity + 0 2 g 64 LSB/g + 1 4 g 32 LSB/g + 2 8 g 16 LSB/g */ -#define ACCEL_G_SELECT (0) +#define ACCEL_G_SELECT (0) -#define ACCEL_CAL_SAMPLES (4) /* Must be multiple of 2 */ -#define ACCEL_CAL_ROUND (50) -#define ACCEL_CAL_SIMPLE (0) -#define ACCEL_CAL_INTERACT (1) +#define ACCEL_CAL_SAMPLES (4) /* Must be multiple of 2 */ +#define ACCEL_CAL_ROUND (50) +#define ACCEL_CAL_SIMPLE (0) +#define ACCEL_CAL_INTERACT (1) #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC) /* Reading_at_1g = Sensitivity * Max_reading / Refference_voltage */ -#define ACCEL_CAL_1G_VALUE {993, 256} +#define ACCEL_CAL_1G_VALUE {993, 256} -#define ACCEL_X_ADC_CH ADC_SCANCTRL_INPUTMASK_CH2 -#define ACCEL_Y_ADC_CH ADC_SCANCTRL_INPUTMASK_CH3 -#define ACCEL_Z_ADC_CH ADC_SCANCTRL_INPUTMASK_CH4 +#define ACCEL_X_ADC_CH ADC_SCANCTRL_INPUTMASK_CH2 +#define ACCEL_Y_ADC_CH ADC_SCANCTRL_INPUTMASK_CH3 +#define ACCEL_Z_ADC_CH ADC_SCANCTRL_INPUTMASK_CH4 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC) -#define ACCEL_CAL_1G_VALUE {0x3f, 0x1f, 0x0f} +#define ACCEL_CAL_1G_VALUE {0x3f, 0x1f, 0x0f} #define ACCEL_IIC_SLAVE_ADDRESS (0x1d) -#define ACCEL_INT1_PORT (gpioPortD) -#define ACCEL_INT1_PIN (13) -#define ACCEL_INT2_PORT (gpioPortD) -#define ACCEL_INT2_PIN (12) +#define ACCEL_INT1_PORT (gpioPortD) +#define ACCEL_INT1_PIN (13) +#define ACCEL_INT2_PORT (gpioPortD) +#define ACCEL_INT2_PIN (12) -#define ACCEL_MODE_STANDBY (1 << 0) -#define ACCEL_MODE_MEASUREMENT (1 << 1) -#define ACCEL_MODE_LEVEL (1 << 2) -#define ACCEL_MODE_PULSE (1 << 3) -#define ACCEL_RANGE_8G (1 << 4) -#define ACCEL_RANGE_4G (1 << 5) -#define ACCEL_RANGE_2G (1 << 6) -#define ACCEL_INTPIN_INVERSE (1 << 7) -#define ACCEL_INT_LEVEL_PULSE (1 << 8) -#define ACCEL_INT_PULSE_LEVEL (1 << 9) -#define ACCEL_INT_SINGLE_DOUBLE (1 << 10) -#define ACCEL_DISABLE_X (1 << 11) -#define ACCEL_DISABLE_Y (1 << 12) -#define ACCEL_DISABLE_Z (1 << 13) -#define ACCEL_THRESHOLD_INTEGER (1 << 14) /* For level detection only */ -#define ACCEL_BANDWIDTH_125HZ (1 << 15) -#define ACCEL_LEVEL_AND (1 << 16) -#define ACCEL_PULSE_AND (1 << 17) -#define ACCEL_DRIVE_STRONG (1 << 18) -#define ACCEL_SOURCE_LEVEL_X (1 << 19) -#define ACCEL_SOURCE_LEVEL_Y (1 << 20) -#define ACCEL_SOURCE_LEVEL_Z (1 << 21) -#define ACCEL_SOURCE_PULSE_X (1 << 22) -#define ACCEL_SOURCE_PULSE_Y (1 << 23) -#define ACCEL_SOURCE_PULSE_Z (1 << 24) +#define ACCEL_MODE_STANDBY (1 << 0) +#define ACCEL_MODE_MEASUREMENT (1 << 1) +#define ACCEL_MODE_LEVEL (1 << 2) +#define ACCEL_MODE_PULSE (1 << 3) +#define ACCEL_RANGE_8G (1 << 4) +#define ACCEL_RANGE_4G (1 << 5) +#define ACCEL_RANGE_2G (1 << 6) +#define ACCEL_INTPIN_INVERSE (1 << 7) +#define ACCEL_INT_LEVEL_PULSE (1 << 8) +#define ACCEL_INT_PULSE_LEVEL (1 << 9) +#define ACCEL_INT_SINGLE_DOUBLE (1 << 10) +#define ACCEL_DISABLE_X (1 << 11) +#define ACCEL_DISABLE_Y (1 << 12) +#define ACCEL_DISABLE_Z (1 << 13) +#define ACCEL_THRESHOLD_INTEGER (1 << 14) /* For level detection only */ +#define ACCEL_BANDWIDTH_125HZ (1 << 15) +#define ACCEL_LEVEL_AND (1 << 16) +#define ACCEL_PULSE_AND (1 << 17) +#define ACCEL_DRIVE_STRONG (1 << 18) +#define ACCEL_SOURCE_LEVEL_X (1 << 19) +#define ACCEL_SOURCE_LEVEL_Y (1 << 20) +#define ACCEL_SOURCE_LEVEL_Z (1 << 21) +#define ACCEL_SOURCE_PULSE_X (1 << 22) +#define ACCEL_SOURCE_PULSE_Y (1 << 23) +#define ACCEL_SOURCE_PULSE_Z (1 << 24) -#define ACCEL_SHIFT_MODE (0) -#define ACCEL_SHIFT_RANGE (4) -#define ACCEL_SHIFT_INT (8) -#define ACCEL_SHIFT_DISABLE (11) -#define ACCEL_SHIFT_SOURCE (19) +#define ACCEL_SHIFT_MODE (0) +#define ACCEL_SHIFT_RANGE (4) +#define ACCEL_SHIFT_INT (8) +#define ACCEL_SHIFT_DISABLE (11) +#define ACCEL_SHIFT_SOURCE (19) -#define ACCEL_MASK_MODE (0X0000000f << ACCEL_SHIFT_MODE) -#define ACCEL_MASK_RANGE (0X00000007 << ACCEL_SHIFT_RANGE) -#define ACCEL_MASK_INT (0X00000007 << ACCEL_SHIFT_INT) -#define ACCEL_MASK_DISABLE (0X00000007 << ACCEL_SHIFT_DISABLE) -#define ACCEL_MASK_SOURCE (0X0000003f << ACCEL_SHIFT_SOURCE) +#define ACCEL_MASK_MODE (0X0000000f << ACCEL_SHIFT_MODE) +#define ACCEL_MASK_RANGE (0X00000007 << ACCEL_SHIFT_RANGE) +#define ACCEL_MASK_INT (0X00000007 << ACCEL_SHIFT_INT) +#define ACCEL_MASK_DISABLE (0X00000007 << ACCEL_SHIFT_DISABLE) +#define ACCEL_MASK_SOURCE (0X0000003f << ACCEL_SHIFT_SOURCE) #endif /* Exported functions ------------------------------------------------------- */ rt_err_t efm_accel_get_data(struct efm32_accel_result_t *data, - rt_bool_t lowResolution); + rt_bool_t lowResolution); rt_err_t efm_accel_config(rt_uint32_t config, - rt_uint8_t level_threshold, - rt_uint8_t pulse_threshold, - rt_uint8_t pulse_duration, - rt_uint8_t pulse_latency, - rt_uint8_t pulse_duration2); + rt_uint8_t level_threshold, + rt_uint8_t pulse_threshold, + rt_uint8_t pulse_duration, + rt_uint8_t pulse_latency, + rt_uint8_t pulse_duration2); rt_err_t efm_accel_auto_zero(rt_uint8_t mode, rt_tick_t period); rt_err_t efm_accel_init(void); diff --git a/bsp/efm32/dev_keys.c b/bsp/efm32/dev_keys.c index a7a58ff20f..15d306b36b 100644 --- a/bsp/efm32/dev_keys.c +++ b/bsp/efm32/dev_keys.c @@ -1,8 +1,8 @@ /***************************************************************************//** - * @file dev_keys.c - * @brief Keys driver of RT-Thread RTOS for EFM32 + * @file dev_keys.c + * @brief Keys driver of RT-Thread RTOS for EFM32 * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -10,7 +10,7 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes + * Date Author Notes * 2011-12-29 onelife Initial creation for EFM32GG_DK3750 board ******************************************************************************/ @@ -48,14 +48,14 @@ static rt_bool_t click; /* Private functions ---------------------------------------------------------*/ /***************************************************************************//** * @brief - * Keys interrupt handler + * Keys interrupt handler * * @details * * @note * * @param[in] device - * Pointer to device descriptor + * Pointer to device descriptor ******************************************************************************/ static void efm32_keys_isr(rt_device_t dev) { @@ -158,18 +158,18 @@ static void efm32_keys_isr(rt_device_t dev) /***************************************************************************//** * @brief - * Keys timeout handler + * Keys timeout handler * * @details * * @note * * @param[in] param - * Parameter + * Parameter ******************************************************************************/ static void efm32_keys_timer_isr(void *param) { - rt_uint16_t joystick; + rt_uint16_t joystick; joystick = DVK_getJoystick(); @@ -277,11 +277,11 @@ void efm32_hw_keys_init(void) GPIO_IntConfig(KEYS_INT_PORT, KEYS_INT_PIN, true, true, true); efm32_irq_hook_init_t hook; - hook.type = efm32_irq_type_gpio; - hook.unit = KEYS_INT_PIN; - hook.cbFunc = efm32_keys_isr; - hook.userPtr = RT_NULL; - efm32_irq_hook_register(&hook); + hook.type = efm32_irq_type_gpio; + hook.unit = KEYS_INT_PIN; + hook.cbFunc = efm32_keys_isr; + hook.userPtr = RT_NULL; + efm32_irq_hook_register(&hook); if ((rt_uint8_t)KEYS_INT_PIN % 2) { @@ -299,12 +299,12 @@ void efm32_hw_keys_init(void) /* Enable DVK joystick interrupt */ DVK_enableInterrupt(BC_INTEN_JOYSTICK); - rt_timer_init(&joy.timer, - "joy_tmr", - efm32_keys_timer_isr, - RT_NULL, - KEYS_POLL_TIME, - RT_TIMER_FLAG_PERIODIC); + rt_timer_init(&joy.timer, + "joy_tmr", + efm32_keys_timer_isr, + RT_NULL, + KEYS_POLL_TIME, + RT_TIMER_FLAG_PERIODIC); joy_dev.init = efm32_keys_init; joy_dev.open = RT_NULL; diff --git a/bsp/efm32/dev_keys.h b/bsp/efm32/dev_keys.h index 6e66617331..87f8fe95fd 100644 --- a/bsp/efm32/dev_keys.h +++ b/bsp/efm32/dev_keys.h @@ -1,8 +1,8 @@ /***************************************************************************//** - * @file dev_keys.h - * @brief Keys driver of RT-Thread RTOS for EFM32 + * @file dev_keys.h + * @brief Keys driver of RT-Thread RTOS for EFM32 * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -10,7 +10,7 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes + * Date Author Notes * 2011-12-29 onelife Initial creation for EFM32GG_DK3750 board ******************************************************************************/ #ifndef __DEV_KEYS_H__ diff --git a/bsp/efm32/dev_lcd.c b/bsp/efm32/dev_lcd.c index 0a2d469d78..c4cbbcce21 100644 --- a/bsp/efm32/dev_lcd.c +++ b/bsp/efm32/dev_lcd.c @@ -1,8 +1,8 @@ /***************************************************************************//** - * @file dev_lcd.c - * @brief LCD driver of RT-Thread RTOS for EFM32 + * @file dev_lcd.c + * @brief LCD driver of RT-Thread RTOS for EFM32 * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -10,7 +10,7 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes + * Date Author Notes * 2011-12-16 onelife Initial creation of address mapped method (pixel * drive) for EFM32GG_DK3750 board * 2011-12-29 onelife Add direct drive method (frame buffer) support @@ -451,48 +451,48 @@ rt_err_t efm32_spiLcd_writeRegister(rt_uint8_t reg, rt_uint16_t data) /***************************************************************************//** * @brief - * Register LCD device + * Register LCD device * * @details * * @note * * @param[in] device - * Pointer to device descriptor + * Pointer to device descriptor * * @param[in] name - * Device name + * Device name * * @param[in] flag - * Configuration flags + * Configuration flags * * @param[in] iic - * Pointer to IIC device descriptor + * Pointer to IIC device descriptor * * @return - * Error code + * Error code ******************************************************************************/ rt_err_t efm32_spiLcd_register( - rt_device_t device, - const char *name, - rt_uint32_t flag, - void *data) + rt_device_t device, + const char *name, + rt_uint32_t flag, + void *data) { - RT_ASSERT(device != RT_NULL); + RT_ASSERT(device != RT_NULL); - device->type = RT_Device_Class_Graphic; - device->rx_indicate = RT_NULL; - device->tx_complete = RT_NULL; - device->init = RT_NULL; - device->open = RT_NULL; - device->close = RT_NULL; - device->read = RT_NULL; - device->write = RT_NULL; - device->control = efm32_spiLcd_control; - device->user_data = data; + device->type = RT_Device_Class_Graphic; + device->rx_indicate = RT_NULL; + device->tx_complete = RT_NULL; + device->init = RT_NULL; + device->open = RT_NULL; + device->close = RT_NULL; + device->read = RT_NULL; + device->write = RT_NULL; + device->control = efm32_spiLcd_control; + device->user_data = data; - /* register a character device */ - return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag); + /* register a character device */ + return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag); } /***************************************************************************//** @@ -511,18 +511,18 @@ void efm32_spiLcd_init(void) DMD_DisplayGeometry *geometry; rt_uint32_t ret; - do - { + do + { USART_InitSync_TypeDef init = USART_INITSYNC_DEFAULT; - /* Find SPI device */ - lcd = rt_device_find(LCD_USING_DEVICE_NAME); - if (lcd == RT_NULL) - { - lcd_debug("LCD err: Can't find %s!\n", LCD_USING_DEVICE_NAME); - break; - } - lcd_debug("LCD: Find device %s\n", LCD_USING_DEVICE_NAME); + /* Find SPI device */ + lcd = rt_device_find(LCD_USING_DEVICE_NAME); + if (lcd == RT_NULL) + { + lcd_debug("LCD err: Can't find %s!\n", LCD_USING_DEVICE_NAME); + break; + } + lcd_debug("LCD: Find device %s\n", LCD_USING_DEVICE_NAME); /* Config CS pin */ usart = (struct efm32_usart_device_t *)(lcd->user_data); @@ -647,7 +647,7 @@ void efm32_spiLcd_init(void) } /* Init LCD info */ - flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_DMA_TX; + flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_DMA_TX; lcd_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565P; lcd_info.bits_per_pixel = 16; lcd_info.width = geometry->xSize; diff --git a/bsp/efm32/dev_lcd.h b/bsp/efm32/dev_lcd.h index 075bed64ba..4c59286ef6 100644 --- a/bsp/efm32/dev_lcd.h +++ b/bsp/efm32/dev_lcd.h @@ -1,8 +1,8 @@ /***************************************************************************//** - * @file dev_lcd.h - * @brief LCD driver of RT-Thread RTOS for EFM32 + * @file dev_lcd.h + * @brief LCD driver of RT-Thread RTOS for EFM32 * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -10,7 +10,7 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes + * Date Author Notes * 2011-12-16 onelife Initial creation of address mapped method (pixel * drive) for EFM32GG_DK3750 board ******************************************************************************/ diff --git a/bsp/efm32/dev_sflash.h b/bsp/efm32/dev_sflash.h index ae72ec678a..b7d2860f0d 100644 --- a/bsp/efm32/dev_sflash.h +++ b/bsp/efm32/dev_sflash.h @@ -20,85 +20,85 @@ /* Exported types ------------------------------------------------------------*/ enum sflash_inst_type_t { - /* Instruction only */ - sflash_inst_wren = 0x00, - sflash_inst_wrdi, - sflash_inst_rdid_l, - sflash_inst_rdid_s, - sflash_inst_rdsr, - sflash_inst_wrsr, - sflash_inst_be, - sflash_inst_dp, - sflash_inst_rdp, - /* Instruction and address */ - sflash_inst_wrlr, - sflash_inst_rdlr, - sflash_inst_read, - sflash_inst_potp, - sflash_inst_pp, - sflash_inst_difp, - sflash_inst_sse, - sflash_inst_se, - /* Instruction, address and dummy read */ - sflash_inst_read_f, - sflash_inst_dofr, - sflash_inst_rotp + /* Instruction only */ + sflash_inst_wren = 0x00, + sflash_inst_wrdi, + sflash_inst_rdid_l, + sflash_inst_rdid_s, + sflash_inst_rdsr, + sflash_inst_wrsr, + sflash_inst_be, + sflash_inst_dp, + sflash_inst_rdp, + /* Instruction and address */ + sflash_inst_wrlr, + sflash_inst_rdlr, + sflash_inst_read, + sflash_inst_potp, + sflash_inst_pp, + sflash_inst_difp, + sflash_inst_sse, + sflash_inst_se, + /* Instruction, address and dummy read */ + sflash_inst_read_f, + sflash_inst_dofr, + sflash_inst_rotp }; /* Exported constants --------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/ -#define SFLASH_SPI_COMMAND_SKIP (1) -#define SFLASH_SPI_READ_SKIP (2) +#define SFLASH_SPI_COMMAND_SKIP (1) +#define SFLASH_SPI_READ_SKIP (2) -#define SFLASH_INST_CODE_WREN (0x06) -#define SFLASH_INST_CODE_WRDI (0x04) -#define SFLASH_INST_CODE_RDID_L (0x9F) -#define SFLASH_INST_CODE_RDID_S (0x9E) -#define SFLASH_INST_CODE_RDSR (0x05) -#define SFLASH_INST_CODE_WRSR (0x01) -#define SFLASH_INST_CODE_WRLR (0xE5) -#define SFLASH_INST_CODE_RDLR (0xE8) -#define SFLASH_INST_CODE_READ (0x03) -#define SFLASH_INST_CODE_READ_F (0x0B) -#define SFLASH_INST_CODE_DOFR (0x3B) -#define SFLASH_INST_CODE_ROTP (0x4B) -#define SFLASH_INST_CODE_POTP (0x42) -#define SFLASH_INST_CODE_PP (0x02) -#define SFLASH_INST_CODE_DIFP (0xA2) -#define SFLASH_INST_CODE_SSE (0x20) -#define SFLASH_INST_CODE_SE (0xD8) -#define SFLASH_INST_CODE_BE (0xC7) -#define SFLASH_INST_CODE_DP (0xB9) -#define SFLASH_INST_CODE_RDP (0xAB) +#define SFLASH_INST_CODE_WREN (0x06) +#define SFLASH_INST_CODE_WRDI (0x04) +#define SFLASH_INST_CODE_RDID_L (0x9F) +#define SFLASH_INST_CODE_RDID_S (0x9E) +#define SFLASH_INST_CODE_RDSR (0x05) +#define SFLASH_INST_CODE_WRSR (0x01) +#define SFLASH_INST_CODE_WRLR (0xE5) +#define SFLASH_INST_CODE_RDLR (0xE8) +#define SFLASH_INST_CODE_READ (0x03) +#define SFLASH_INST_CODE_READ_F (0x0B) +#define SFLASH_INST_CODE_DOFR (0x3B) +#define SFLASH_INST_CODE_ROTP (0x4B) +#define SFLASH_INST_CODE_POTP (0x42) +#define SFLASH_INST_CODE_PP (0x02) +#define SFLASH_INST_CODE_DIFP (0xA2) +#define SFLASH_INST_CODE_SSE (0x20) +#define SFLASH_INST_CODE_SE (0xD8) +#define SFLASH_INST_CODE_BE (0xC7) +#define SFLASH_INST_CODE_DP (0xB9) +#define SFLASH_INST_CODE_RDP (0xAB) -#define SFLASH_REPLY_LEN_WREN (0) -#define SFLASH_REPLY_LEN_WRDI (0) -#define SFLASH_REPLY_LEN_RDID_L (20) -#define SFLASH_REPLY_LEN_RDID_S (3) -#define SFLASH_REPLY_LEN_RDSR (1) -#define SFLASH_REPLY_LEN_WRSR (1) -#define SFLASH_REPLY_LEN_WRLR (1) -#define SFLASH_REPLY_LEN_RDLR (1) -#define SFLASH_REPLY_LEN_READ (-1) -#define SFLASH_REPLY_LEN_READ_F (-1) -#define SFLASH_REPLY_LEN_DOFR (-1) -#define SFLASH_REPLY_LEN_ROTP (65) -#define SFLASH_REPLY_LEN_POTP (65) -#define SFLASH_REPLY_LEN_PP (256) -#define SFLASH_REPLY_LEN_DIFP (256) -#define SFLASH_REPLY_LEN_SSE (0) -#define SFLASH_REPLY_LEN_SE (0) -#define SFLASH_REPLY_LEN_BE (0) -#define SFLASH_REPLY_LEN_DP (0) -#define SFLASH_REPLY_LEN_RDP (0) +#define SFLASH_REPLY_LEN_WREN (0) +#define SFLASH_REPLY_LEN_WRDI (0) +#define SFLASH_REPLY_LEN_RDID_L (20) +#define SFLASH_REPLY_LEN_RDID_S (3) +#define SFLASH_REPLY_LEN_RDSR (1) +#define SFLASH_REPLY_LEN_WRSR (1) +#define SFLASH_REPLY_LEN_WRLR (1) +#define SFLASH_REPLY_LEN_RDLR (1) +#define SFLASH_REPLY_LEN_READ (-1) +#define SFLASH_REPLY_LEN_READ_F (-1) +#define SFLASH_REPLY_LEN_DOFR (-1) +#define SFLASH_REPLY_LEN_ROTP (65) +#define SFLASH_REPLY_LEN_POTP (65) +#define SFLASH_REPLY_LEN_PP (256) +#define SFLASH_REPLY_LEN_DIFP (256) +#define SFLASH_REPLY_LEN_SSE (0) +#define SFLASH_REPLY_LEN_SE (0) +#define SFLASH_REPLY_LEN_BE (0) +#define SFLASH_REPLY_LEN_DP (0) +#define SFLASH_REPLY_LEN_RDP (0) /* Exported functions ------------------------------------------------------- */ rt_err_t efm_spiFlash_init(void); rt_err_t efm_spiFlash_deinit(void); rt_uint32_t efm_spiFlash_cmd( - enum sflash_inst_type_t command, - rt_uint32_t address, - rt_uint8_t *buffer, - rt_uint32_t size); + enum sflash_inst_type_t command, + rt_uint32_t address, + rt_uint8_t *buffer, + rt_uint32_t size); #endif /* __DEV_SFLASH_H__ */ diff --git a/bsp/efm32/drv_acmp.c b/bsp/efm32/drv_acmp.c index 1961fc4695..b9d24e8ebd 100644 --- a/bsp/efm32/drv_acmp.c +++ b/bsp/efm32/drv_acmp.c @@ -30,18 +30,18 @@ /* Private define ------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/ #ifdef RT_ACMP_DEBUG -#define acmp_debug(format,args...) rt_kprintf(format, ##args) +#define acmp_debug(format,args...) rt_kprintf(format, ##args) #else #define acmp_debug(format,args...) #endif /* Private variables ---------------------------------------------------------*/ #ifdef RT_USING_ACMP0 - static struct rt_device acmp0_device; + static struct rt_device acmp0_device; #endif #ifdef RT_USING_ACMP1 - static struct rt_device acmp1_device; + static struct rt_device acmp1_device; #endif /* Private function prototypes -----------------------------------------------*/ @@ -64,169 +64,169 @@ ACMP_WarmTime_TypeDef efm32_acmp_WarmTimeCalc(rt_uint32_t hfperFreq); ******************************************************************************/ static rt_err_t rt_acmp_init(rt_device_t dev) { - RT_ASSERT(dev != RT_NULL); + RT_ASSERT(dev != RT_NULL); - struct efm32_acmp_device_t *acmp; + struct efm32_acmp_device_t *acmp; - acmp = (struct efm32_acmp_device_t *)(dev->user_data); + acmp = (struct efm32_acmp_device_t *)(dev->user_data); - acmp->hook.cbFunc = RT_NULL; - acmp->hook.userPtr = RT_NULL; + acmp->hook.cbFunc = RT_NULL; + acmp->hook.userPtr = RT_NULL; - return RT_EOK; + return RT_EOK; } /***************************************************************************//** * @brief - * Configure ACMP device + * Configure ACMP device * * @details * * @note * * @param[in] dev - * Pointer to device descriptor + * Pointer to device descriptor * * @param[in] cmd - * ACMP control command + * ACMP control command * * @param[in] args - * Arguments + * Arguments * * @return - * Error code + * Error code ******************************************************************************/ static rt_err_t rt_acmp_control( - rt_device_t dev, - rt_uint8_t cmd, - void *args) + rt_device_t dev, + rt_uint8_t cmd, + void *args) { - RT_ASSERT(dev != RT_NULL); + RT_ASSERT(dev != RT_NULL); - struct efm32_acmp_device_t *acmp; + struct efm32_acmp_device_t *acmp; - acmp = (struct efm32_acmp_device_t *)(dev->user_data); + acmp = (struct efm32_acmp_device_t *)(dev->user_data); - switch (cmd) - { - case RT_DEVICE_CTRL_SUSPEND: - /* Suspend device */ - dev->flag |= RT_DEVICE_FLAG_SUSPENDED; - ACMP_Disable(acmp->acmp_device); - break; + switch (cmd) + { + case RT_DEVICE_CTRL_SUSPEND: + /* Suspend device */ + dev->flag |= RT_DEVICE_FLAG_SUSPENDED; + ACMP_Disable(acmp->acmp_device); + break; - case RT_DEVICE_CTRL_RESUME: - /* Resume device */ - dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED; - ACMP_Enable(acmp->acmp_device); - break; + case RT_DEVICE_CTRL_RESUME: + /* Resume device */ + dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED; + ACMP_Enable(acmp->acmp_device); + break; - case RT_DEVICE_CTRL_ACMP_INIT: - { - rt_bool_t int_en = false; - struct efm32_acmp_control_t *control; + case RT_DEVICE_CTRL_ACMP_INIT: + { + rt_bool_t int_en = false; + struct efm32_acmp_control_t *control; - control = (struct efm32_acmp_control_t *)args; - acmp_debug("ACMP: control -> init start\n"); + control = (struct efm32_acmp_control_t *)args; + acmp_debug("ACMP: control -> init start\n"); - /* Configure ACMPn */ - if (control->init == RT_NULL) - { - return -RT_ERROR; - } - ACMP_Init(acmp->acmp_device, control->init); - ACMP_ChannelSet(acmp->acmp_device, control->negInput, control->posInput); - if (control->output != RT_NULL) - { - ACMP_GPIOSetup( - acmp->acmp_device, - control->output->location, - control->output->enable, - control->output->invert); - int_en = true; - } - if (control->hook.cbFunc != RT_NULL) - { - acmp->hook.cbFunc = control->hook.cbFunc; - acmp->hook.userPtr = control->hook.userPtr; - int_en = true; - } + /* Configure ACMPn */ + if (control->init == RT_NULL) + { + return -RT_ERROR; + } + ACMP_Init(acmp->acmp_device, control->init); + ACMP_ChannelSet(acmp->acmp_device, control->negInput, control->posInput); + if (control->output != RT_NULL) + { + ACMP_GPIOSetup( + acmp->acmp_device, + control->output->location, + control->output->enable, + control->output->invert); + int_en = true; + } + if (control->hook.cbFunc != RT_NULL) + { + acmp->hook.cbFunc = control->hook.cbFunc; + acmp->hook.userPtr = control->hook.userPtr; + int_en = true; + } - if (int_en) - { - /* Enable edge interrupt */ - ACMP_IntEnable(acmp->acmp_device, ACMP_IEN_EDGE); - ACMP_IntClear(acmp->acmp_device, ACMP_IFC_EDGE); + if (int_en) + { + /* Enable edge interrupt */ + ACMP_IntEnable(acmp->acmp_device, ACMP_IEN_EDGE); + ACMP_IntClear(acmp->acmp_device, ACMP_IFC_EDGE); - /* Enable ACMP0/1 interrupt vector in NVIC */ - NVIC_ClearPendingIRQ(ACMP0_IRQn); - NVIC_SetPriority(ACMP0_IRQn, EFM32_IRQ_PRI_DEFAULT); - NVIC_EnableIRQ(ACMP0_IRQn); - } - } - break; + /* Enable ACMP0/1 interrupt vector in NVIC */ + NVIC_ClearPendingIRQ(ACMP0_IRQn); + NVIC_SetPriority(ACMP0_IRQn, EFM32_IRQ_PRI_DEFAULT); + NVIC_EnableIRQ(ACMP0_IRQn); + } + } + break; - case RT_DEVICE_CTRL_ACMP_OUTPUT: - *((rt_bool_t *)args) = \ - (acmp->acmp_device->STATUS & ACMP_STATUS_ACMPOUT) ? true : false; - break; + case RT_DEVICE_CTRL_ACMP_OUTPUT: + *((rt_bool_t *)args) = \ + (acmp->acmp_device->STATUS & ACMP_STATUS_ACMPOUT) ? true : false; + break; - default: - return -RT_ERROR; - } + default: + return -RT_ERROR; + } - return RT_EOK; + return RT_EOK; } /***************************************************************************//** * @brief - * Register ACMP device + * Register ACMP device * * @details * * @note * * @param[in] device - * Pointer to device descriptor + * Pointer to device descriptor * * @param[in] name - * Device name + * Device name * * @param[in] flag - * Configuration flags + * Configuration flags * * @param[in] acmp - * Pointer to ACMP device descriptor + * Pointer to ACMP device descriptor * * @return - * Error code + * Error code ******************************************************************************/ rt_err_t rt_hw_acmp_register( - rt_device_t device, - const char *name, - rt_uint32_t flag, - struct efm32_acmp_device_t *acmp) + rt_device_t device, + const char *name, + rt_uint32_t flag, + struct efm32_acmp_device_t *acmp) { - RT_ASSERT(device != RT_NULL); + RT_ASSERT(device != RT_NULL); - device->type = RT_Device_Class_Char; /* fixme: should be acmp type */ - device->rx_indicate = RT_NULL; - device->tx_complete = RT_NULL; - device->init = rt_acmp_init; - device->open = RT_NULL; - device->close = RT_NULL; - device->read = RT_NULL; - device->write = RT_NULL; - device->control = rt_acmp_control; - device->user_data = acmp; + device->type = RT_Device_Class_Char; /* fixme: should be acmp type */ + device->rx_indicate = RT_NULL; + device->tx_complete = RT_NULL; + device->init = rt_acmp_init; + device->open = RT_NULL; + device->close = RT_NULL; + device->read = RT_NULL; + device->write = RT_NULL; + device->control = rt_acmp_control; + device->user_data = acmp; - /* register a character device */ - return rt_device_register(device, name, flag); + /* register a character device */ + return rt_device_register(device, name, flag); } /***************************************************************************//** * @brief - * ACMP edge trigger interrupt handler + * ACMP edge trigger interrupt handler * * @details * @@ -234,96 +234,96 @@ rt_err_t rt_hw_acmp_register( ******************************************************************************/ void rt_hw_acmp_isr(rt_device_t dev) { - RT_ASSERT(dev != RT_NULL); + RT_ASSERT(dev != RT_NULL); - struct efm32_acmp_device_t *acmp; + struct efm32_acmp_device_t *acmp; - acmp = (struct efm32_acmp_device_t *)(dev->user_data); + acmp = (struct efm32_acmp_device_t *)(dev->user_data); - if (acmp->hook.cbFunc != RT_NULL) - { - (acmp->hook.cbFunc)(acmp->hook.userPtr); - } + if (acmp->hook.cbFunc != RT_NULL) + { + (acmp->hook.cbFunc)(acmp->hook.userPtr); + } } /***************************************************************************//** * @brief - * Initialize the specified ACMP unit + * Initialize the specified ACMP unit * * @details * * @note * * @param[in] device - * Pointer to device descriptor + * Pointer to device descriptor * * @param[in] unitNumber - * Unit number + * Unit number * * @return - * Pointer to ACMP device + * Pointer to ACMP device ******************************************************************************/ static struct efm32_acmp_device_t *rt_hw_acmp_unit_init( - rt_device_t device, - rt_uint8_t unitNumber) + rt_device_t device, + rt_uint8_t unitNumber) { - struct efm32_acmp_device_t *acmp; - efm32_irq_hook_init_t hook; - CMU_Clock_TypeDef acmpClock; + struct efm32_acmp_device_t *acmp; + efm32_irq_hook_init_t hook; + CMU_Clock_TypeDef acmpClock; - do - { - /* Allocate device */ - acmp = rt_malloc(sizeof(struct efm32_acmp_device_t)); - if (acmp == RT_NULL) - { - acmp_debug("ACMP err: no mem for ACMP%d\n", unitNumber); - break; - } + do + { + /* Allocate device */ + acmp = rt_malloc(sizeof(struct efm32_acmp_device_t)); + if (acmp == RT_NULL) + { + acmp_debug("ACMP err: no mem for ACMP%d\n", unitNumber); + break; + } - /* Initialization */ - if (unitNumber >= ACMP_COUNT) - { - break; - } - switch (unitNumber) - { - case 0: - acmp->acmp_device = ACMP0; - acmpClock = (CMU_Clock_TypeDef)cmuClock_ACMP0; - break; + /* Initialization */ + if (unitNumber >= ACMP_COUNT) + { + break; + } + switch (unitNumber) + { + case 0: + acmp->acmp_device = ACMP0; + acmpClock = (CMU_Clock_TypeDef)cmuClock_ACMP0; + break; - case 1: - acmp->acmp_device = ACMP1; - acmpClock = (CMU_Clock_TypeDef)cmuClock_ACMP1; - break; + case 1: + acmp->acmp_device = ACMP1; + acmpClock = (CMU_Clock_TypeDef)cmuClock_ACMP1; + break; - default: - break; - } + default: + break; + } - /* Enable ACMP clock */ - CMU_ClockEnable(acmpClock, true); + /* Enable ACMP clock */ + CMU_ClockEnable(acmpClock, true); - /* Reset */ - ACMP_Reset(acmp->acmp_device); + /* Reset */ + ACMP_Reset(acmp->acmp_device); - /* Config interrupt and NVIC */ - hook.type = efm32_irq_type_acmp; - hook.unit = unitNumber; - hook.cbFunc = rt_hw_acmp_isr; - hook.userPtr = device; - efm32_irq_hook_register(&hook); + /* Config interrupt and NVIC */ + hook.type = efm32_irq_type_acmp; + hook.unit = unitNumber; + hook.cbFunc = rt_hw_acmp_isr; + hook.userPtr = device; + efm32_irq_hook_register(&hook); - return acmp; - } while(0); + return acmp; + } while(0); - if (acmp) - { - rt_free(acmp); - } - rt_kprintf("ACMP: Init failed!\n"); - return RT_NULL; + if (acmp) + { + rt_free(acmp); + } + rt_kprintf("ACMP: Init failed!\n"); + return RT_NULL; } /***************************************************************************//** @@ -338,20 +338,20 @@ static struct efm32_acmp_device_t *rt_hw_acmp_unit_init( ******************************************************************************/ void rt_hw_acmp_init(void) { - struct efm32_acmp_device_t *acmp; + struct efm32_acmp_device_t *acmp; #ifdef RT_USING_ACMP0 - if ((acmp = rt_hw_acmp_unit_init(&acmp0_device, 0)) != RT_NULL) - { - rt_hw_acmp_register(&acmp0_device, RT_ACMP0_NAME, EFM32_NO_DATA, acmp); - } + if ((acmp = rt_hw_acmp_unit_init(&acmp0_device, 0)) != RT_NULL) + { + rt_hw_acmp_register(&acmp0_device, RT_ACMP0_NAME, EFM32_NO_DATA, acmp); + } #endif #ifdef RT_USING_ACMP1 - if ((acmp = rt_hw_acmp_unit_init(&acmp1_device, 1)) != RT_NULL) - { - rt_hw_acmp_register(&acmp1_device, RT_ACMP1_NAME, EFM32_NO_DATA, acmp); - } + if ((acmp = rt_hw_acmp_unit_init(&acmp1_device, 1)) != RT_NULL) + { + rt_hw_acmp_register(&acmp1_device, RT_ACMP1_NAME, EFM32_NO_DATA, acmp); + } #endif } @@ -369,50 +369,50 @@ void rt_hw_acmp_init(void) ******************************************************************************/ ACMP_WarmTime_TypeDef efm32_acmp_WarmTimeCalc(rt_uint32_t hfperFreq) { - if (!hfperFreq) - { - hfperFreq = CMU_ClockFreqGet(cmuClock_HFPER); + if (!hfperFreq) + { + hfperFreq = CMU_ClockFreqGet(cmuClock_HFPER); - /* Just in case, make sure we get non-zero freq for below calculation */ - if (!hfperFreq) - { - hfperFreq = 1; - } - } + /* Just in case, make sure we get non-zero freq for below calculation */ + if (!hfperFreq) + { + hfperFreq = 1; + } + } - /* Determine number of HFPERCLK cycle >= 10us */ - if (4 * 1000000 / hfperFreq > 10) - { - return acmpWarmTime4; - } - else if (8 * 1000000 / hfperFreq > 10) - { - return acmpWarmTime8; - } - else if (16 * 1000000 / hfperFreq > 10) - { - return acmpWarmTime16; - } - else if (32 * 1000000 / hfperFreq > 10) - { - return acmpWarmTime32; - } - else if (64 * 1000000 / hfperFreq > 10) - { - return acmpWarmTime64; - } - else if (128 * 1000000 / hfperFreq > 10) - { - return acmpWarmTime128; - } - else if (256 * 1000000 / hfperFreq > 10) - { - return acmpWarmTime256; - } - else if (512 * 1000000 / hfperFreq > 10) - { - return acmpWarmTime512; - } + /* Determine number of HFPERCLK cycle >= 10us */ + if (4 * 1000000 / hfperFreq > 10) + { + return acmpWarmTime4; + } + else if (8 * 1000000 / hfperFreq > 10) + { + return acmpWarmTime8; + } + else if (16 * 1000000 / hfperFreq > 10) + { + return acmpWarmTime16; + } + else if (32 * 1000000 / hfperFreq > 10) + { + return acmpWarmTime32; + } + else if (64 * 1000000 / hfperFreq > 10) + { + return acmpWarmTime64; + } + else if (128 * 1000000 / hfperFreq > 10) + { + return acmpWarmTime128; + } + else if (256 * 1000000 / hfperFreq > 10) + { + return acmpWarmTime256; + } + else if (512 * 1000000 / hfperFreq > 10) + { + return acmpWarmTime512; + } } #endif diff --git a/bsp/efm32/drv_acmp.h b/bsp/efm32/drv_acmp.h index 50b4738afc..fd7f858669 100644 --- a/bsp/efm32/drv_acmp.h +++ b/bsp/efm32/drv_acmp.h @@ -23,24 +23,24 @@ /* Exported types ------------------------------------------------------------*/ struct efm32_acmp_device_t { - ACMP_TypeDef *acmp_device; - efm32_irq_hook_t hook; + ACMP_TypeDef *acmp_device; + efm32_irq_hook_t hook; }; struct efm32_acmp_output_t { - rt_uint32_t location; - rt_bool_t enable; - rt_bool_t invert; + rt_uint32_t location; + rt_bool_t enable; + rt_bool_t invert; }; struct efm32_acmp_control_t { - ACMP_Init_TypeDef *init; - ACMP_Channel_TypeDef posInput; - ACMP_Channel_TypeDef negInput; - struct efm32_acmp_output_t *output; - efm32_irq_hook_t hook; + ACMP_Init_TypeDef *init; + ACMP_Channel_TypeDef posInput; + ACMP_Channel_TypeDef negInput; + struct efm32_acmp_output_t *output; + efm32_irq_hook_t hook; }; /* Exported constants --------------------------------------------------------*/ diff --git a/bsp/efm32/drv_adc.c b/bsp/efm32/drv_adc.c index e1eeafb36e..2a072507e0 100644 --- a/bsp/efm32/drv_adc.c +++ b/bsp/efm32/drv_adc.c @@ -1,8 +1,8 @@ /***************************************************************************//** - * @file drv_adc.c - * @brief ADC driver of RT-Thread RTOS for EFM32 + * @file drv_adc.c + * @brief ADC driver of RT-Thread RTOS for EFM32 * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -10,9 +10,9 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes - * 2011-02-21 onelife Initial creation for EFM32 - * 2011-07-14 onelife Add multiple channels support for scan mode + * Date Author Notes + * 2011-02-21 onelife Initial creation for EFM32 + * 2011-07-14 onelife Add multiple channels support for scan mode ******************************************************************************/ /***************************************************************************//** @@ -29,7 +29,7 @@ /* Private define ------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/ #ifdef RT_ADC_DEBUG -#define adc_debug(format,args...) rt_kprintf(format, ##args) +#define adc_debug(format,args...) rt_kprintf(format, ##args) #else #define adc_debug(format,args...) #endif @@ -71,132 +71,132 @@ static rt_uint32_t adcErrataShift = 0; * No need to load the calibration values after the function returns. ******************************************************************************/ rt_uint32_t efm32_adc_calibration( - ADC_TypeDef *adc, - ADC_Ref_TypeDef ref, - ADC_SingleInput_TypeDef input) + ADC_TypeDef *adc, + ADC_Ref_TypeDef ref, + ADC_SingleInput_TypeDef input) { - rt_uint32_t cal; - rt_int32_t sample; - rt_int8_t high, mid, low, tmp; - ADC_InitSingle_TypeDef singleInit = ADC_INITSINGLE_DEFAULT; + rt_uint32_t cal; + rt_int32_t sample; + rt_int8_t high, mid, low, tmp; + ADC_InitSingle_TypeDef singleInit = ADC_INITSINGLE_DEFAULT; - /* Init for single conversion use, measure diff 0 with selected reference. */ - singleInit.reference = ref; - singleInit.input = adcSingleInpDiff0; - singleInit.acqTime = adcAcqTime32; - singleInit.diff = true; - /* Enable oversampling rate */ - singleInit.resolution = adcResOVS; - ADC_InitSingle(adc, &singleInit); + /* Init for single conversion use, measure diff 0 with selected reference. */ + singleInit.reference = ref; + singleInit.input = adcSingleInpDiff0; + singleInit.acqTime = adcAcqTime32; + singleInit.diff = true; + /* Enable oversampling rate */ + singleInit.resolution = adcResOVS; + ADC_InitSingle(adc, &singleInit); - /* ADC is now set up for offset calibration */ - /* Offset calibration register is a 7 bit signed 2's complement value. */ - /* Use unsigned indexes for binary search, and convert when calibration */ - /* register is written to. */ - high = 63; - low = -64; + /* ADC is now set up for offset calibration */ + /* Offset calibration register is a 7 bit signed 2's complement value. */ + /* Use unsigned indexes for binary search, and convert when calibration */ + /* register is written to. */ + high = 63; + low = -64; - /* Do binary search for offset calibration*/ - while (low < high) - { - /* Calculate midpoint */ - mid = low + (high - low) / 2; + /* Do binary search for offset calibration*/ + while (low < high) + { + /* Calculate midpoint */ + mid = low + (high - low) / 2; - /* Midpoint is converted to 2's complement and written to both scan and */ - /* single calibration registers */ - cal = adc->CAL & ~(_ADC_CAL_SINGLEOFFSET_MASK | _ADC_CAL_SCANOFFSET_MASK); - tmp = mid < 0 ? (((mid & 0x3F) ^ 0x3F) | 0x40) + 1 : mid; - cal |= tmp << _ADC_CAL_SINGLEOFFSET_SHIFT; - cal |= tmp << _ADC_CAL_SCANOFFSET_SHIFT; - adc_debug("adc->CAL = %x, cal = %x, tmp = %x\n", adc->CAL, cal, tmp); - adc->CAL = cal; + /* Midpoint is converted to 2's complement and written to both scan and */ + /* single calibration registers */ + cal = adc->CAL & ~(_ADC_CAL_SINGLEOFFSET_MASK | _ADC_CAL_SCANOFFSET_MASK); + tmp = mid < 0 ? (((mid & 0x3F) ^ 0x3F) | 0x40) + 1 : mid; + cal |= tmp << _ADC_CAL_SINGLEOFFSET_SHIFT; + cal |= tmp << _ADC_CAL_SCANOFFSET_SHIFT; + adc_debug("adc->CAL = %x, cal = %x, tmp = %x\n", adc->CAL, cal, tmp); + adc->CAL = cal; - /* Do a conversion */ - ADC_Start(adc, adcStartSingle); + /* Do a conversion */ + ADC_Start(adc, adcStartSingle); - /* Wait while conversion is active */ - while (adc->STATUS & ADC_STATUS_SINGLEACT) ; + /* Wait while conversion is active */ + while (adc->STATUS & ADC_STATUS_SINGLEACT) ; - /* Get ADC result */ - sample = ADC_DataSingleGet(adc); + /* Get ADC result */ + sample = ADC_DataSingleGet(adc); - /* Check result and decide in which part of to repeat search */ - /* Calibration register has negative effect on result */ - if (sample < 0) - { - /* Repeat search in bottom half. */ - high = mid; - } - else if (sample > 0) - { - /* Repeat search in top half. */ - low = mid + 1; - } - else - { - /* Found it, exit while loop */ - break; - } - } - adc_debug("adc->CAL = %x\n", adc->CAL); + /* Check result and decide in which part of to repeat search */ + /* Calibration register has negative effect on result */ + if (sample < 0) + { + /* Repeat search in bottom half. */ + high = mid; + } + else if (sample > 0) + { + /* Repeat search in top half. */ + low = mid + 1; + } + else + { + /* Found it, exit while loop */ + break; + } + } + adc_debug("adc->CAL = %x\n", adc->CAL); - /* Now do gain calibration, only input and diff settings needs to be changed */ - adc->SINGLECTRL &= ~(_ADC_SINGLECTRL_INPUTSEL_MASK | _ADC_SINGLECTRL_DIFF_MASK); - adc->SINGLECTRL |= (input << _ADC_SINGLECTRL_INPUTSEL_SHIFT); - adc->SINGLECTRL |= (false << _ADC_SINGLECTRL_DIFF_SHIFT); + /* Now do gain calibration, only input and diff settings needs to be changed */ + adc->SINGLECTRL &= ~(_ADC_SINGLECTRL_INPUTSEL_MASK | _ADC_SINGLECTRL_DIFF_MASK); + adc->SINGLECTRL |= (input << _ADC_SINGLECTRL_INPUTSEL_SHIFT); + adc->SINGLECTRL |= (false << _ADC_SINGLECTRL_DIFF_SHIFT); - /* ADC is now set up for gain calibration */ - /* Gain calibration register is a 7 bit unsigned value. */ - high = 127; - low = 0; + /* ADC is now set up for gain calibration */ + /* Gain calibration register is a 7 bit unsigned value. */ + high = 127; + low = 0; - /* Do binary search for gain calibration */ - while (low < high) - { - /* Calculate midpoint and write to calibration register */ - mid = low + (high - low) / 2; + /* Do binary search for gain calibration */ + while (low < high) + { + /* Calculate midpoint and write to calibration register */ + mid = low + (high - low) / 2; - /* Midpoint is converted to 2's complement */ - cal = adc->CAL & ~(_ADC_CAL_SINGLEGAIN_MASK | _ADC_CAL_SCANGAIN_MASK); - cal |= mid << _ADC_CAL_SINGLEGAIN_SHIFT; - cal |= mid << _ADC_CAL_SCANGAIN_SHIFT; - adc_debug("adc->CAL = %x, cal = %x, mid = %x\n", adc->CAL, cal, mid); - adc->CAL = cal; + /* Midpoint is converted to 2's complement */ + cal = adc->CAL & ~(_ADC_CAL_SINGLEGAIN_MASK | _ADC_CAL_SCANGAIN_MASK); + cal |= mid << _ADC_CAL_SINGLEGAIN_SHIFT; + cal |= mid << _ADC_CAL_SCANGAIN_SHIFT; + adc_debug("adc->CAL = %x, cal = %x, mid = %x\n", adc->CAL, cal, mid); + adc->CAL = cal; - /* Do a conversion */ - ADC_Start(adc, adcStartSingle); + /* Do a conversion */ + ADC_Start(adc, adcStartSingle); - /* Wait while conversion is active */ - while (adc->STATUS & ADC_STATUS_SINGLEACT) ; + /* Wait while conversion is active */ + while (adc->STATUS & ADC_STATUS_SINGLEACT) ; - /* Get ADC result */ - sample = ADC_DataSingleGet(adc); + /* Get ADC result */ + sample = ADC_DataSingleGet(adc); - /* Check result and decide in which part to repeat search */ - /* Compare with a value atleast one LSB's less than top to avoid overshooting */ - /* Since oversampling is used, the result is 16 bits, but a couple of lsb's */ - /* applies to the 12 bit result value, if 0xffe is the top value in 12 bit, this */ - /* is in turn 0xffe0 in the 16 bit result. */ - /* Calibration register has positive effect on result */ - if (sample > 0xffd0) - { - /* Repeat search in bottom half. */ - high = mid; - } - else if (sample < 0xffd0) - { - /* Repeat search in top half. */ - low = mid + 1; - } - else - { - /* Found it, exit while loop */ - break; - } - } - adc_debug("adc->CAL = %x\n", adc->CAL); + /* Check result and decide in which part to repeat search */ + /* Compare with a value atleast one LSB's less than top to avoid overshooting */ + /* Since oversampling is used, the result is 16 bits, but a couple of lsb's */ + /* applies to the 12 bit result value, if 0xffe is the top value in 12 bit, this */ + /* is in turn 0xffe0 in the 16 bit result. */ + /* Calibration register has positive effect on result */ + if (sample > 0xffd0) + { + /* Repeat search in bottom half. */ + high = mid; + } + else if (sample < 0xffd0) + { + /* Repeat search in top half. */ + low = mid + 1; + } + else + { + /* Found it, exit while loop */ + break; + } + } + adc_debug("adc->CAL = %x\n", adc->CAL); - return adc->CAL; + return adc->CAL; } /***************************************************************************//** @@ -217,52 +217,52 @@ rt_uint32_t efm32_adc_calibration( * DMA channel ******************************************************************************/ void efm32_adc_cfg_dma( - ADC_TypeDef *adc_device, - rt_uint8_t mode, - rt_uint8_t channel) + ADC_TypeDef *adc_device, + rt_uint8_t mode, + rt_uint8_t channel) { - DMA_CfgChannel_TypeDef chnlCfg; - DMA_CfgDescr_TypeDef descrCfg; + DMA_CfgChannel_TypeDef chnlCfg; + DMA_CfgDescr_TypeDef descrCfg; - if (channel == (rt_uint8_t)EFM32_NO_DMA) - { - return; - } + if (channel == (rt_uint8_t)EFM32_NO_DMA) + { + return; + } - /* Set up DMA channel */ - chnlCfg.highPri = false; - chnlCfg.enableInt = false; - if (adc_device == ADC0) - { - switch (mode & ADC_MASK_MODE) - { - case ADC_MODE_SINGLE: - chnlCfg.select = DMAREQ_ADC0_SINGLE; - break; + /* Set up DMA channel */ + chnlCfg.highPri = false; + chnlCfg.enableInt = false; + if (adc_device == ADC0) + { + switch (mode & ADC_MASK_MODE) + { + case ADC_MODE_SINGLE: + chnlCfg.select = DMAREQ_ADC0_SINGLE; + break; - case ADC_MODE_SCAN: - chnlCfg.select = DMAREQ_ADC0_SCAN; - break; + case ADC_MODE_SCAN: + chnlCfg.select = DMAREQ_ADC0_SCAN; + break; - default: - return; - } - } - else - { - // TODO: Any other channel? - return; - } - chnlCfg.cb = RT_NULL; - DMA_CfgChannel((rt_uint32_t)channel, &chnlCfg); + default: + return; + } + } + else + { + // TODO: Any other channel? + return; + } + chnlCfg.cb = RT_NULL; + DMA_CfgChannel((rt_uint32_t)channel, &chnlCfg); - /* Setting up DMA channel descriptor */ - descrCfg.dstInc = dmaDataInc4; - descrCfg.srcInc = dmaDataIncNone; - descrCfg.size = dmaDataSize4; - descrCfg.arbRate = dmaArbitrate1; - descrCfg.hprot = 0; - DMA_CfgDescr((rt_uint32_t)channel, true, &descrCfg); + /* Setting up DMA channel descriptor */ + descrCfg.dstInc = dmaDataInc4; + descrCfg.srcInc = dmaDataIncNone; + descrCfg.size = dmaDataSize4; + descrCfg.arbRate = dmaArbitrate1; + descrCfg.hprot = 0; + DMA_CfgDescr((rt_uint32_t)channel, true, &descrCfg); } /***************************************************************************//** @@ -289,38 +289,38 @@ void efm32_adc_cfg_dma( * Pointer to ADC results buffer ******************************************************************************/ void efm32_adc_on_dma( - ADC_TypeDef *adc_device, - rt_uint8_t mode, - rt_uint8_t count, - rt_uint8_t channel, - void *buffer) + ADC_TypeDef *adc_device, + rt_uint8_t mode, + rt_uint8_t count, + rt_uint8_t channel, + void *buffer) { - switch (mode & ADC_MASK_MODE) - { - case ADC_MODE_SINGLE: - /* Activate DMA */ - DMA_ActivateBasic( - (rt_uint32_t)channel, - true, - false, - buffer, - (void *)&(adc_device->SINGLEDATA), - count - 1); - break; + switch (mode & ADC_MASK_MODE) + { + case ADC_MODE_SINGLE: + /* Activate DMA */ + DMA_ActivateBasic( + (rt_uint32_t)channel, + true, + false, + buffer, + (void *)&(adc_device->SINGLEDATA), + count - 1); + break; - case ADC_MODE_SCAN: - DMA_ActivateBasic( - (rt_uint32_t)channel, - true, - false, - buffer, - (void *)&(adc_device->SCANDATA), - count - 1); - break; + case ADC_MODE_SCAN: + DMA_ActivateBasic( + (rt_uint32_t)channel, + true, + false, + buffer, + (void *)&(adc_device->SCANDATA), + count - 1); + break; - default: - return; - } + default: + return; + } } /***************************************************************************//** @@ -339,468 +339,468 @@ void efm32_adc_on_dma( ******************************************************************************/ static rt_err_t rt_adc_init(rt_device_t dev) { - RT_ASSERT(dev != RT_NULL); + RT_ASSERT(dev != RT_NULL); - rt_uint32_t temp; + rt_uint32_t temp; - struct efm32_adc_device_t *adc; + struct efm32_adc_device_t *adc; - adc = (struct efm32_adc_device_t *)(dev->user_data); + adc = (struct efm32_adc_device_t *)(dev->user_data); - temp = efm32_adc_calibration(adc->adc_device, ADC_CALI_REF, ADC_CALI_CH); + temp = efm32_adc_calibration(adc->adc_device, ADC_CALI_REF, ADC_CALI_CH); - adc_debug("adc->CAL = %x\n", temp); - return RT_EOK; + adc_debug("adc->CAL = %x\n", temp); + return RT_EOK; } /***************************************************************************//** * @brief - * Configure ADC device + * Configure ADC device * * @details * * @note * * @param[in] dev - * Pointer to device descriptor + * Pointer to device descriptor * * @param[in] cmd - * ADC control command + * ADC control command * * @param[in] args - * Arguments + * Arguments * * @return - * Error code + * Error code ******************************************************************************/ static rt_err_t rt_adc_control( - rt_device_t dev, - rt_uint8_t cmd, - void *args) + rt_device_t dev, + rt_uint8_t cmd, + void *args) { - RT_ASSERT(dev != RT_NULL); + RT_ASSERT(dev != RT_NULL); - struct efm32_adc_device_t *adc; + struct efm32_adc_device_t *adc; - adc = (struct efm32_adc_device_t *)(dev->user_data); + adc = (struct efm32_adc_device_t *)(dev->user_data); - switch (cmd) - { - case RT_DEVICE_CTRL_SUSPEND: - /* Suspend device */ - dev->flag |= RT_DEVICE_FLAG_SUSPENDED; - adc->adc_device->CMD = ADC_CMD_SINGLESTOP | ADC_CMD_SCANSTOP; - break; + switch (cmd) + { + case RT_DEVICE_CTRL_SUSPEND: + /* Suspend device */ + dev->flag |= RT_DEVICE_FLAG_SUSPENDED; + adc->adc_device->CMD = ADC_CMD_SINGLESTOP | ADC_CMD_SCANSTOP; + break; - case RT_DEVICE_CTRL_RESUME: - { - /* Resume device */ - struct efm32_adc_result_t *control = \ - (struct efm32_adc_result_t *)args; + case RT_DEVICE_CTRL_RESUME: + { + /* Resume device */ + struct efm32_adc_result_t *control = \ + (struct efm32_adc_result_t *)args; - dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED; + dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED; - switch (control->mode) - { - case ADC_MODE_SINGLE: - if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA) - { - efm32_adc_on_dma( - adc->adc_device, - control->mode, - adc->singleCount, - adc->singleDmaChannel, - control->buffer); - } - ADC_Start(adc->adc_device, adcStartSingle); - break; + switch (control->mode) + { + case ADC_MODE_SINGLE: + if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA) + { + efm32_adc_on_dma( + adc->adc_device, + control->mode, + adc->singleCount, + adc->singleDmaChannel, + control->buffer); + } + ADC_Start(adc->adc_device, adcStartSingle); + break; - case ADC_MODE_SCAN: - if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA) - { - efm32_adc_on_dma( - adc->adc_device, - control->mode, - adc->scanCount, - adc->scanDmaChannel, - control->buffer); - } - ADC_Start(adc->adc_device, adcStartScan); - break; + case ADC_MODE_SCAN: + if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA) + { + efm32_adc_on_dma( + adc->adc_device, + control->mode, + adc->scanCount, + adc->scanDmaChannel, + control->buffer); + } + ADC_Start(adc->adc_device, adcStartScan); + break; - case ADC_MODE_TAILGATE: - { - void *index = control->buffer; + case ADC_MODE_TAILGATE: + { + void *index = control->buffer; - if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA) - { - efm32_adc_on_dma( - adc->adc_device, - control->mode, - adc->scanCount, - adc->scanDmaChannel, - index); - index += adc->scanCount; - } - if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA) - { - efm32_adc_on_dma( - adc->adc_device, - control->mode, - adc->singleCount, - adc->singleDmaChannel, - index); - index += adc->singleCount; - } - ADC_Start(adc->adc_device, adcStartScanAndSingle); - } + if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA) + { + efm32_adc_on_dma( + adc->adc_device, + control->mode, + adc->scanCount, + adc->scanDmaChannel, + index); + index += adc->scanCount; + } + if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA) + { + efm32_adc_on_dma( + adc->adc_device, + control->mode, + adc->singleCount, + adc->singleDmaChannel, + index); + index += adc->singleCount; + } + ADC_Start(adc->adc_device, adcStartScanAndSingle); + } - break; + break; - default: - return -RT_ERROR; - } - } - break; + default: + return -RT_ERROR; + } + } + break; - case RT_DEVICE_CTRL_ADC_MODE: - { - /* change device setting */ - struct efm32_adc_control_t *control = \ - (struct efm32_adc_control_t *)args; + case RT_DEVICE_CTRL_ADC_MODE: + { + /* change device setting */ + struct efm32_adc_control_t *control = \ + (struct efm32_adc_control_t *)args; - switch (control->mode) - { - case ADC_MODE_SINGLE: - ADC_InitSingle(adc->adc_device, control->single.init); - break; + switch (control->mode) + { + case ADC_MODE_SINGLE: + ADC_InitSingle(adc->adc_device, control->single.init); + break; - case ADC_MODE_SCAN: - ADC_InitScan(adc->adc_device, control->scan.init); - break; + case ADC_MODE_SCAN: + ADC_InitScan(adc->adc_device, control->scan.init); + break; - case ADC_MODE_TAILGATE: - ADC_InitSingle(adc->adc_device, control->single.init); - ADC_InitScan(adc->adc_device, control->scan.init); - break; + case ADC_MODE_TAILGATE: + ADC_InitSingle(adc->adc_device, control->single.init); + ADC_InitScan(adc->adc_device, control->scan.init); + break; - default: - return -RT_ERROR; - } + default: + return -RT_ERROR; + } - if (control->mode == ADC_MODE_TAILGATE) - { - adc->mode = ADC_MODE_TAILGATE; - } - else - { - adc->mode &= ~(rt_uint8_t)ADC_MODE_TAILGATE; - adc->mode |= control->mode; - } - if ((control->mode == ADC_MODE_TAILGATE) || \ - (control->mode == ADC_MODE_SINGLE)) - { - if (control->single.init->rep) - { - adc->mode |= ADC_OP_SINGLE_REPEAT; - } - adc->singleCount = control->single.count; - adc->singleDmaChannel = control->single.dmaChannel; - efm32_adc_cfg_dma(adc->adc_device, control->mode, adc->singleDmaChannel); - } - if ((control->mode == ADC_MODE_TAILGATE) || \ - (control->mode == ADC_MODE_SCAN)) - { - if (control->scan.init->rep) - { - adc->mode |= ADC_OP_SCAN_REPEAT; - } - adc->scanCount = control->scan.count; - adc->scanDmaChannel = control->scan.dmaChannel; - efm32_adc_cfg_dma(adc->adc_device, control->mode, adc->scanDmaChannel); - } - } - break; + if (control->mode == ADC_MODE_TAILGATE) + { + adc->mode = ADC_MODE_TAILGATE; + } + else + { + adc->mode &= ~(rt_uint8_t)ADC_MODE_TAILGATE; + adc->mode |= control->mode; + } + if ((control->mode == ADC_MODE_TAILGATE) || \ + (control->mode == ADC_MODE_SINGLE)) + { + if (control->single.init->rep) + { + adc->mode |= ADC_OP_SINGLE_REPEAT; + } + adc->singleCount = control->single.count; + adc->singleDmaChannel = control->single.dmaChannel; + efm32_adc_cfg_dma(adc->adc_device, control->mode, adc->singleDmaChannel); + } + if ((control->mode == ADC_MODE_TAILGATE) || \ + (control->mode == ADC_MODE_SCAN)) + { + if (control->scan.init->rep) + { + adc->mode |= ADC_OP_SCAN_REPEAT; + } + adc->scanCount = control->scan.count; + adc->scanDmaChannel = control->scan.dmaChannel; + efm32_adc_cfg_dma(adc->adc_device, control->mode, adc->scanDmaChannel); + } + } + break; - case RT_DEVICE_CTRL_ADC_RESULT: - { - struct efm32_adc_result_t *control = \ - (struct efm32_adc_result_t *)args; + case RT_DEVICE_CTRL_ADC_RESULT: + { + struct efm32_adc_result_t *control = \ + (struct efm32_adc_result_t *)args; - switch (control->mode) - { - case ADC_MODE_SINGLE: - if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA) - { - if (adc->mode & ADC_OP_SINGLE_REPEAT) - { - if (!(DMA->IF & (1 << adc->singleDmaChannel))) - { - efm32_adc_on_dma( - adc->adc_device, - control->mode, - adc->singleCount, - adc->singleDmaChannel, - control->buffer); - } - while (!(DMA->IF & (1 << adc->singleDmaChannel))); - } - else - { - while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT); - } - } - else - { - while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT); - *((rt_uint32_t *)control->buffer) = \ - ADC_DataSingleGet(adc->adc_device) << adcErrataShift; - } - break; + switch (control->mode) + { + case ADC_MODE_SINGLE: + if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA) + { + if (adc->mode & ADC_OP_SINGLE_REPEAT) + { + if (!(DMA->IF & (1 << adc->singleDmaChannel))) + { + efm32_adc_on_dma( + adc->adc_device, + control->mode, + adc->singleCount, + adc->singleDmaChannel, + control->buffer); + } + while (!(DMA->IF & (1 << adc->singleDmaChannel))); + } + else + { + while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT); + } + } + else + { + while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT); + *((rt_uint32_t *)control->buffer) = \ + ADC_DataSingleGet(adc->adc_device) << adcErrataShift; + } + break; - case ADC_MODE_SCAN: - if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA) - { - if (adc->mode & ADC_OP_SCAN_REPEAT) - { - if (!(DMA->IF & (1 << adc->scanDmaChannel))) - { - efm32_adc_on_dma( - adc->adc_device, - control->mode, - adc->scanCount, - adc->scanDmaChannel, - control->buffer); - } - while (!(DMA->IF & (1 << adc->scanDmaChannel))); - } - else - { - while (adc->adc_device->STATUS & ADC_STATUS_SCANACT); - } - } - else - { - while (adc->adc_device->STATUS & ADC_STATUS_SCANACT); - *((rt_uint32_t *)control->buffer) = \ - ADC_DataScanGet(adc->adc_device) << adcErrataShift; - } - break; + case ADC_MODE_SCAN: + if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA) + { + if (adc->mode & ADC_OP_SCAN_REPEAT) + { + if (!(DMA->IF & (1 << adc->scanDmaChannel))) + { + efm32_adc_on_dma( + adc->adc_device, + control->mode, + adc->scanCount, + adc->scanDmaChannel, + control->buffer); + } + while (!(DMA->IF & (1 << adc->scanDmaChannel))); + } + else + { + while (adc->adc_device->STATUS & ADC_STATUS_SCANACT); + } + } + else + { + while (adc->adc_device->STATUS & ADC_STATUS_SCANACT); + *((rt_uint32_t *)control->buffer) = \ + ADC_DataScanGet(adc->adc_device) << adcErrataShift; + } + break; - case ADC_MODE_TAILGATE: - { - void *index = control->buffer; + case ADC_MODE_TAILGATE: + { + void *index = control->buffer; - if ((adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA) && \ - !(adc->mode & ADC_OP_SCAN_REPEAT)) - { - index += adc->scanCount; - } - if ((adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA) && \ - !(adc->mode & ADC_OP_SINGLE_REPEAT)) - { - index += adc->singleCount; - } + if ((adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA) && \ + !(adc->mode & ADC_OP_SCAN_REPEAT)) + { + index += adc->scanCount; + } + if ((adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA) && \ + !(adc->mode & ADC_OP_SINGLE_REPEAT)) + { + index += adc->singleCount; + } - if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA) - { - if (adc->mode & ADC_OP_SCAN_REPEAT) - { - if (!(DMA->IF & (1 << adc->scanDmaChannel))) - { - efm32_adc_on_dma( - adc->adc_device, - control->mode, - adc->scanCount, - adc->scanDmaChannel, - index); - index += adc->scanCount; - } - while (!(DMA->IF & (1 << adc->scanDmaChannel))); - } - else - { - while (adc->adc_device->STATUS & ADC_STATUS_SCANACT); - } - } - else - { - while (adc->adc_device->STATUS & ADC_STATUS_SCANACT); - *(rt_uint32_t *)(index++) = \ - ADC_DataScanGet(adc->adc_device) << adcErrataShift; - } - if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA) - { - if (adc->mode & ADC_OP_SINGLE_REPEAT) - { - if (!(DMA->IF & (1 << adc->singleDmaChannel))) - { - efm32_adc_on_dma( - adc->adc_device, - control->mode, - adc->singleCount, - adc->singleDmaChannel, - index); - index += adc->singleCount; - } - while (!(DMA->IF & (1 << adc->singleDmaChannel))); - } - else - { - while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT); - } - } - else - { - while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT); - *(rt_uint32_t *)(index++) = \ - ADC_DataSingleGet(adc->adc_device) << adcErrataShift; - } - } - break; + if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA) + { + if (adc->mode & ADC_OP_SCAN_REPEAT) + { + if (!(DMA->IF & (1 << adc->scanDmaChannel))) + { + efm32_adc_on_dma( + adc->adc_device, + control->mode, + adc->scanCount, + adc->scanDmaChannel, + index); + index += adc->scanCount; + } + while (!(DMA->IF & (1 << adc->scanDmaChannel))); + } + else + { + while (adc->adc_device->STATUS & ADC_STATUS_SCANACT); + } + } + else + { + while (adc->adc_device->STATUS & ADC_STATUS_SCANACT); + *(rt_uint32_t *)(index++) = \ + ADC_DataScanGet(adc->adc_device) << adcErrataShift; + } + if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA) + { + if (adc->mode & ADC_OP_SINGLE_REPEAT) + { + if (!(DMA->IF & (1 << adc->singleDmaChannel))) + { + efm32_adc_on_dma( + adc->adc_device, + control->mode, + adc->singleCount, + adc->singleDmaChannel, + index); + index += adc->singleCount; + } + while (!(DMA->IF & (1 << adc->singleDmaChannel))); + } + else + { + while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT); + } + } + else + { + while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT); + *(rt_uint32_t *)(index++) = \ + ADC_DataSingleGet(adc->adc_device) << adcErrataShift; + } + } + break; - default: - return -RT_ERROR; - } - } - break; + default: + return -RT_ERROR; + } + } + break; - default: - return -RT_ERROR; - } + default: + return -RT_ERROR; + } - return RT_EOK; + return RT_EOK; } /***************************************************************************//** * @brief - * Register ADC device + * Register ADC device * * @details * * @note * * @param[in] device - * Pointer to device descriptor + * Pointer to device descriptor * * @param[in] name - * Device name + * Device name * * @param[in] flag - * Configuration flags + * Configuration flags * * @param[in] adc - * Pointer to ADC device descriptor + * Pointer to ADC device descriptor * * @return - * Error code + * Error code ******************************************************************************/ rt_err_t rt_hw_adc_register( - rt_device_t device, - const char *name, - rt_uint32_t flag, - struct efm32_adc_device_t *adc) + rt_device_t device, + const char *name, + rt_uint32_t flag, + struct efm32_adc_device_t *adc) { - RT_ASSERT(device != RT_NULL); + RT_ASSERT(device != RT_NULL); - device->type = RT_Device_Class_Char; /* fixme: should be adc type */ - device->rx_indicate = RT_NULL; - device->tx_complete = RT_NULL; - device->init = rt_adc_init; - device->open = RT_NULL; - device->close = RT_NULL; - device->read = RT_NULL; - device->write = RT_NULL; - device->control = rt_adc_control; - device->user_data = adc; + device->type = RT_Device_Class_Char; /* fixme: should be adc type */ + device->rx_indicate = RT_NULL; + device->tx_complete = RT_NULL; + device->init = rt_adc_init; + device->open = RT_NULL; + device->close = RT_NULL; + device->read = RT_NULL; + device->write = RT_NULL; + device->control = rt_adc_control; + device->user_data = adc; - /* register a character device */ - return rt_device_register(device, name, flag); + /* register a character device */ + return rt_device_register(device, name, flag); } /***************************************************************************//** * @brief - * Initialize the specified ADC unit + * Initialize the specified ADC unit * * @details * * @note * * @param[in] device - * Pointer to device descriptor + * Pointer to device descriptor * * @param[in] unitNumber - * Unit number + * Unit number * * @return - * Pointer to ADC device + * Pointer to ADC device ******************************************************************************/ static struct efm32_adc_device_t *rt_hw_adc_unit_init( - rt_device_t device, - rt_uint8_t unitNumber) + rt_device_t device, + rt_uint8_t unitNumber) { - struct efm32_adc_device_t *adc; - CMU_Clock_TypeDef adcClock; - ADC_Init_TypeDef init = ADC_INIT_DEFAULT; + struct efm32_adc_device_t *adc; + CMU_Clock_TypeDef adcClock; + ADC_Init_TypeDef init = ADC_INIT_DEFAULT; - do - { - /* Allocate device and set default value */ - adc = rt_malloc(sizeof(struct efm32_adc_device_t)); - if (adc == RT_NULL) - { - adc_debug("no memory for ADC%d driver\n", unitNumber); - break; - } - adc->mode = 0; - adc->singleCount = 0; - adc->singleDmaChannel = (rt_uint8_t)EFM32_NO_DMA; - adc->scanCount = 0; - adc->scanDmaChannel = (rt_uint8_t)EFM32_NO_DMA; + do + { + /* Allocate device and set default value */ + adc = rt_malloc(sizeof(struct efm32_adc_device_t)); + if (adc == RT_NULL) + { + adc_debug("no memory for ADC%d driver\n", unitNumber); + break; + } + adc->mode = 0; + adc->singleCount = 0; + adc->singleDmaChannel = (rt_uint8_t)EFM32_NO_DMA; + adc->scanCount = 0; + adc->scanDmaChannel = (rt_uint8_t)EFM32_NO_DMA; - /* Initialization */ - if (unitNumber >= ADC_COUNT) - { - break; - } - switch (unitNumber) - { - case 0: - adc->adc_device = ADC0; - adcClock = (CMU_Clock_TypeDef)cmuClock_ADC0; - break; + /* Initialization */ + if (unitNumber >= ADC_COUNT) + { + break; + } + switch (unitNumber) + { + case 0: + adc->adc_device = ADC0; + adcClock = (CMU_Clock_TypeDef)cmuClock_ADC0; + break; - default: - break; - } + default: + break; + } - /* Enable ADC clock */ - CMU_ClockEnable(adcClock, true); + /* Enable ADC clock */ + CMU_ClockEnable(adcClock, true); - /* Reset */ - ADC_Reset(adc->adc_device); + /* Reset */ + ADC_Reset(adc->adc_device); - /* Configure ADC */ - // TODO: Fixed oversampling rate? - init.ovsRateSel = adcOvsRateSel4096; - init.timebase = ADC_TimebaseCalc(0); - init.prescale = ADC_PrescaleCalc(ADC_CONVERT_FREQUENCY, 0); - ADC_Init(adc->adc_device, &init); + /* Configure ADC */ + // TODO: Fixed oversampling rate? + init.ovsRateSel = adcOvsRateSel4096; + init.timebase = ADC_TimebaseCalc(0); + init.prescale = ADC_PrescaleCalc(ADC_CONVERT_FREQUENCY, 0); + ADC_Init(adc->adc_device, &init); - return adc; - } while(0); + return adc; + } while(0); - if (adc) - { - rt_free(adc); - } - rt_kprintf("ADC: Init failed!\n"); - return RT_NULL; + if (adc) + { + rt_free(adc); + } + rt_kprintf("ADC: Init failed!\n"); + return RT_NULL; } /***************************************************************************//** * @brief - * Initialize all ADC module related hardware and register ADC device to kernel + * Initialize all ADC module related hardware and register ADC device to kernel * * @details * @@ -809,23 +809,23 @@ static struct efm32_adc_device_t *rt_hw_adc_unit_init( ******************************************************************************/ void rt_hw_adc_init(void) { - SYSTEM_ChipRevision_TypeDef chipRev; - struct efm32_adc_device_t *adc; + SYSTEM_ChipRevision_TypeDef chipRev; + struct efm32_adc_device_t *adc; #ifdef RT_USING_ADC0 - if ((adc = rt_hw_adc_unit_init(&adc0_device, 0)) != RT_NULL) - { - rt_hw_adc_register(&adc0_device, RT_ADC0_NAME, EFM32_NO_DATA, adc); - } + if ((adc = rt_hw_adc_unit_init(&adc0_device, 0)) != RT_NULL) + { + rt_hw_adc_register(&adc0_device, RT_ADC0_NAME, EFM32_NO_DATA, adc); + } #endif - /* ADC errata for rev B when using VDD as reference, need to multiply */ - /* result by 2 */ - SYSTEM_ChipRevisionGet(&chipRev); - if ((chipRev.major == 0x01) && (chipRev.minor == 0x01)) - { - adcErrataShift = 1; - } + /* ADC errata for rev B when using VDD as reference, need to multiply */ + /* result by 2 */ + SYSTEM_ChipRevisionGet(&chipRev); + if ((chipRev.major == 0x01) && (chipRev.minor == 0x01)) + { + adcErrataShift = 1; + } } #endif diff --git a/bsp/efm32/drv_adc.h b/bsp/efm32/drv_adc.h index b3b81d94e1..f15d074835 100644 --- a/bsp/efm32/drv_adc.h +++ b/bsp/efm32/drv_adc.h @@ -1,8 +1,8 @@ /***************************************************************************//** - * @file drv_adc.h - * @brief ADC driver of RT-Thread RTOS for EFM32 + * @file drv_adc.h + * @brief ADC driver of RT-Thread RTOS for EFM32 * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -10,9 +10,9 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes - * 2011-02-21 onelife Initial creation for EFM32 - * 2011-07-14 onelife Add multiple channels support for scan mode + * Date Author Notes + * 2011-02-21 onelife Initial creation for EFM32 + * 2011-07-14 onelife Add multiple channels support for scan mode ******************************************************************************/ #ifndef __DRV_ADC_H__ #define __DRV_ADC_H__ @@ -21,50 +21,50 @@ /* Exported types ------------------------------------------------------------*/ struct efm32_adc_device_t { - ADC_TypeDef *adc_device; - rt_uint8_t mode; - rt_uint8_t singleCount; - rt_uint8_t singleDmaChannel; - rt_uint8_t scanCount; - rt_uint8_t scanDmaChannel; + ADC_TypeDef *adc_device; + rt_uint8_t mode; + rt_uint8_t singleCount; + rt_uint8_t singleDmaChannel; + rt_uint8_t scanCount; + rt_uint8_t scanDmaChannel; }; struct efm32_adc_control_single_t { - rt_uint8_t count; - rt_uint8_t dmaChannel; - ADC_InitSingle_TypeDef *init; + rt_uint8_t count; + rt_uint8_t dmaChannel; + ADC_InitSingle_TypeDef *init; }; struct efm32_adc_control_scan_t { - rt_uint8_t count; - rt_uint8_t dmaChannel; - ADC_InitScan_TypeDef *init; + rt_uint8_t count; + rt_uint8_t dmaChannel; + ADC_InitScan_TypeDef *init; }; struct efm32_adc_control_t { - rt_uint8_t mode; - struct efm32_adc_control_scan_t scan; - struct efm32_adc_control_single_t single; + rt_uint8_t mode; + struct efm32_adc_control_scan_t scan; + struct efm32_adc_control_single_t single; }; struct efm32_adc_result_t { - rt_uint8_t mode; - void *buffer; + rt_uint8_t mode; + void *buffer; }; /* Exported constants --------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/ -#define ADC_MODE_SINGLE (0x01) -#define ADC_MODE_SCAN (0x02) -#define ADC_MODE_TAILGATE (0x04) -#define ADC_OP_SINGLE_REPEAT (0x10) -#define ADC_OP_SCAN_REPEAT (0x20) -#define ADC_MASK_MODE (0x0f) -#define ADC_MASK_OP (0xf0) +#define ADC_MODE_SINGLE (0x01) +#define ADC_MODE_SCAN (0x02) +#define ADC_MODE_TAILGATE (0x04) +#define ADC_OP_SINGLE_REPEAT (0x10) +#define ADC_OP_SCAN_REPEAT (0x20) +#define ADC_MASK_MODE (0x0f) +#define ADC_MASK_OP (0xf0) /* Exported functions ------------------------------------------------------- */ void rt_hw_adc_init(void); diff --git a/bsp/efm32/drv_emu.c b/bsp/efm32/drv_emu.c index 9a5fc8e97e..18eeca1a43 100644 --- a/bsp/efm32/drv_emu.c +++ b/bsp/efm32/drv_emu.c @@ -1,8 +1,8 @@ /***************************************************************************//** - * @file drv_emu.c - * @brief EMU driver of RT-Thread RTOS for EFM32 + * @file drv_emu.c + * @brief EMU driver of RT-Thread RTOS for EFM32 * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -10,8 +10,8 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes - * 2012-02-21 onelife Initial creation for EFM32 + * Date Author Notes + * 2012-02-21 onelife Initial creation for EFM32 ******************************************************************************/ /***************************************************************************//** @@ -27,7 +27,7 @@ /* Private define ------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/ #ifdef EFM32_EMU_DEBUG -#define emu_debug(format,args...) rt_kprintf(format, ##args) +#define emu_debug(format,args...) rt_kprintf(format, ##args) #else #define emu_debug(format,args...) #endif @@ -176,7 +176,7 @@ void emu_em4_enable(void) /***************************************************************************//** * @brief - * Initialize EMU module related hardware + * Initialize EMU module related hardware * * @details * @@ -213,22 +213,22 @@ void efm32_emu_init(void) break; } - /* init thread */ + /* init thread */ if (rt_thread_init( &emu_task.thread, "EMU", - emu_task_main_loop, (void *)&emu_task, + emu_task_main_loop, (void *)&emu_task, (void *)&emu_task.stack, sizeof(emu_task.stack), - RT_THREAD_PRIORITY_MAX - 2, RT_TICK_PER_SECOND) != RT_EOK) + RT_THREAD_PRIORITY_MAX - 2, RT_TICK_PER_SECOND) != RT_EOK) { break; } - /* startup */ - if (rt_thread_startup(&emu_task.thread) != RT_EOK) - { + /* startup */ + if (rt_thread_startup(&emu_task.thread) != RT_EOK) + { break; - } + } } while (0); rt_kprintf("EMU err: init failed!\n"); diff --git a/bsp/efm32/drv_emu.h b/bsp/efm32/drv_emu.h index 3e491665ba..df46264295 100644 --- a/bsp/efm32/drv_emu.h +++ b/bsp/efm32/drv_emu.h @@ -1,8 +1,8 @@ /***************************************************************************//** - * @file drv_emu.h - * @brief EMU driver of RT-Thread RTOS for EFM32 + * @file drv_emu.h + * @brief EMU driver of RT-Thread RTOS for EFM32 * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -10,9 +10,9 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes - * 2011-02-21 onelife Initial creation for EFM32 - * 2011-07-14 onelife Add multiple channels support for scan mode + * Date Author Notes + * 2011-02-21 onelife Initial creation for EFM32 + * 2011-07-14 onelife Add multiple channels support for scan mode ******************************************************************************/ #ifndef __DRV_EMU_H__ #define __DRV_EMU_H__ diff --git a/bsp/efm32/drv_ethernet.c b/bsp/efm32/drv_ethernet.c index e6bc25bbcc..db99de583a 100644 --- a/bsp/efm32/drv_ethernet.c +++ b/bsp/efm32/drv_ethernet.c @@ -1,11 +1,11 @@ /***************************************************************************//** - * @file drv_ethernet.c - * @brief Ethernet driver (SPI mode) of RT-Thread RTOS for using EFM32 USART + * @file drv_ethernet.c + * @brief Ethernet driver (SPI mode) of RT-Thread RTOS for using EFM32 USART * module - * This driver is tested by using the Microchip ENC28J60 stand-alone Ethernet + * This driver is tested by using the Microchip ENC28J60 stand-alone Ethernet * controller with SPI interface. * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -13,11 +13,11 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes - * 2011-06-22 onelife Initial creation for using EFM32 USART module - * 2011-07-25 onelife Add lock (semaphore) to prevent simultaneously + * Date Author Notes + * 2011-06-22 onelife Initial creation for using EFM32 USART module + * 2011-07-25 onelife Add lock (semaphore) to prevent simultaneously * access - * 2011-07-28 onelife Add get_ip() and update_ip() utilities + * 2011-07-28 onelife Add get_ip() and update_ip() utilities ******************************************************************************/ /***************************************************************************//** @@ -38,21 +38,21 @@ /* Private define ------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/ #ifdef EFM32_ETHERNET_DEBUG -#define eth_debug(format,args...) rt_kprintf(format, ##args) +#define eth_debug(format,args...) rt_kprintf(format, ##args) #else #define eth_debug(format,args...) #endif /* Private constants ---------------------------------------------------------*/ -static const rt_uint8_t eth_addr[ETH_ADDR_LEN] = ETH_ADDR_DEFAULT; +static const rt_uint8_t eth_addr[ETH_ADDR_LEN] = ETH_ADDR_DEFAULT; /* Private variables ---------------------------------------------------------*/ -static struct eth_device eth_dev; -static struct rt_semaphore ethLock; -static rt_uint8_t ethBank; -static rt_uint16_t ethNxtPkt; -static rt_device_t spi = RT_NULL; -static rt_bool_t ethAutoCs = true; +static struct eth_device eth_dev; +static struct rt_semaphore ethLock; +static rt_uint8_t ethBank; +static rt_uint16_t ethNxtPkt; +static rt_device_t spi = RT_NULL; +static rt_bool_t ethAutoCs = true; /* Private function prototypes -----------------------------------------------*/ /* Private functions ---------------------------------------------------------*/ @@ -69,17 +69,17 @@ static rt_bool_t ethAutoCs = true; ******************************************************************************/ static void efm_eth_cs(rt_uint8_t enable) { - if (!ethAutoCs) - { - if (enable) - { - GPIO_PinOutClear(ETH_CS_PORT, ETH_CS_PIN); - } - else - { - GPIO_PinOutSet(ETH_CS_PORT, ETH_CS_PIN); - } - } + if (!ethAutoCs) + { + if (enable) + { + GPIO_PinOutClear(ETH_CS_PORT, ETH_CS_PIN); + } + else + { + GPIO_PinOutSet(ETH_CS_PORT, ETH_CS_PIN); + } + } } /***************************************************************************//** @@ -103,93 +103,93 @@ static void efm_eth_cs(rt_uint8_t enable) * Error code ******************************************************************************/ static rt_err_t efm_eth_cmd( - rt_uint8_t cmd, - rt_uint8_t addr, - rt_uint8_t *data) + rt_uint8_t cmd, + rt_uint8_t addr, + rt_uint8_t *data) { - RT_ASSERT(spi != RT_NULL); + RT_ASSERT(spi != RT_NULL); - rt_uint8_t buf_ins[6], buf_res[2]; - rt_uint8_t len_ins, len_res; + rt_uint8_t buf_ins[6], buf_res[2]; + rt_uint8_t len_ins, len_res; - len_ins = 0; - do - { - /* Build instruction buffer */ - /* Check if need to read back */ - if (cmd == ENC28J60_READ_CTRL_REG) - { - buf_ins[len_ins++] = 1; /* Instruction length */ - } - /* Byte 0: Check if no address section */ - if (cmd == ENC28J60_READ_BUF_MEM || cmd == ENC28J60_WRITE_BUF_MEM || \ - cmd == ENC28J60_SOFT_RESET) - { - buf_ins[len_ins++] = cmd; - } - else - { - buf_ins[len_ins++] = cmd | (addr & ADDR_MASK); - } - /* Byte 1: Check if data section is present */ - if (cmd == ENC28J60_WRITE_CTRL_REG || cmd == ENC28J60_BIT_FIELD_SET || \ - cmd == ENC28J60_BIT_FIELD_CLR || cmd == ENC28J60_WRITE_BUF_MEM) - { - buf_ins[len_ins++] = *data; - } + len_ins = 0; + do + { + /* Build instruction buffer */ + /* Check if need to read back */ + if (cmd == ENC28J60_READ_CTRL_REG) + { + buf_ins[len_ins++] = 1; /* Instruction length */ + } + /* Byte 0: Check if no address section */ + if (cmd == ENC28J60_READ_BUF_MEM || cmd == ENC28J60_WRITE_BUF_MEM || \ + cmd == ENC28J60_SOFT_RESET) + { + buf_ins[len_ins++] = cmd; + } + else + { + buf_ins[len_ins++] = cmd | (addr & ADDR_MASK); + } + /* Byte 1: Check if data section is present */ + if (cmd == ENC28J60_WRITE_CTRL_REG || cmd == ENC28J60_BIT_FIELD_SET || \ + cmd == ENC28J60_BIT_FIELD_CLR || cmd == ENC28J60_WRITE_BUF_MEM) + { + buf_ins[len_ins++] = *data; + } - /* Check if reading */ - if (cmd == ENC28J60_READ_CTRL_REG) - { - *(rt_uint8_t **)(&buf_ins[len_ins]) = buf_res; /* Pointer to RX buffer */ - len_ins += 4; + /* Check if reading */ + if (cmd == ENC28J60_READ_CTRL_REG) + { + *(rt_uint8_t **)(&buf_ins[len_ins]) = buf_res; /* Pointer to RX buffer */ + len_ins += 4; - /* Check if MAC or MII register */ - if (addr & SPRD_MASK) - { - len_res = 2; - } - else - { - len_res = 1; - } + /* Check if MAC or MII register */ + if (addr & SPRD_MASK) + { + len_res = 2; + } + else + { + len_res = 1; + } - /* Send command and get response */ - efm_eth_cs(1); - if (spi->read(spi, ETH_SPI_RX_SKIP, buf_ins, len_res) == 0) - { - break; - } - *data = buf_res[len_res - 1]; -// eth_debug("ETH: read RX %x %x (%d)\n", buf_res[0], buf_res[1], len_res); -// eth_debug("ETH: ** read RX %x %x (%d)\n", -// buf_res[0], buf_res[1], buf_res[2], buf_res[3], buf_res[4], -// buf_res[5], buf_res[6], buf_res[7], buf_res[8], buf_res[9], -// len_res); - } - else - { -// eth_debug("ETH: ** write TX %x %x %x %x %x %x (%d) \n", buf_ins[0], -// buf_ins[1], buf_ins[2], buf_ins[3], buf_ins[4], buf_ins[5], -// len_ins); - /* Send command and get response */ - efm_eth_cs(1); - if (spi->write(spi, EFM32_NO_DATA, buf_ins, len_ins) == 0) - { - break; - } - } + /* Send command and get response */ + efm_eth_cs(1); + if (spi->read(spi, ETH_SPI_RX_SKIP, buf_ins, len_res) == 0) + { + break; + } + *data = buf_res[len_res - 1]; +// eth_debug("ETH: read RX %x %x (%d)\n", buf_res[0], buf_res[1], len_res); +// eth_debug("ETH: ** read RX %x %x (%d)\n", +// buf_res[0], buf_res[1], buf_res[2], buf_res[3], buf_res[4], +// buf_res[5], buf_res[6], buf_res[7], buf_res[8], buf_res[9], +// len_res); + } + else + { +// eth_debug("ETH: ** write TX %x %x %x %x %x %x (%d) \n", buf_ins[0], +// buf_ins[1], buf_ins[2], buf_ins[3], buf_ins[4], buf_ins[5], +// len_ins); + /* Send command and get response */ + efm_eth_cs(1); + if (spi->write(spi, EFM32_NO_DATA, buf_ins, len_ins) == 0) + { + break; + } + } - if (!(cmd == ENC28J60_READ_BUF_MEM || cmd == ENC28J60_WRITE_BUF_MEM)) - { - efm_eth_cs(0); - } - return RT_EOK; - } while(0); + if (!(cmd == ENC28J60_READ_BUF_MEM || cmd == ENC28J60_WRITE_BUF_MEM)) + { + efm_eth_cs(0); + } + return RT_EOK; + } while(0); - eth_debug("ETH: Send command failed!\n"); - efm_eth_cs(0); - return -RT_ERROR; + eth_debug("ETH: Send command failed!\n"); + efm_eth_cs(0); + return -RT_ERROR; } /***************************************************************************//** @@ -213,37 +213,37 @@ static rt_err_t efm_eth_cmd( * Error code ******************************************************************************/ static rt_err_t efm_eth_sendCmd( - rt_uint8_t cmd, - rt_uint8_t addr, - rt_uint8_t *data) + rt_uint8_t cmd, + rt_uint8_t addr, + rt_uint8_t *data) { - rt_err_t ret; + rt_err_t ret; - eth_debug("ETH: Send command %x (%x %x)\n", cmd, addr, *data); - do - { - /* Change bank */ - if(((addr & BANK_MASK) != ethBank) && ((addr < EIE) || (addr > ECON1))) - { - rt_uint8_t temp; + eth_debug("ETH: Send command %x (%x %x)\n", cmd, addr, *data); + do + { + /* Change bank */ + if(((addr & BANK_MASK) != ethBank) && ((addr < EIE) || (addr > ECON1))) + { + rt_uint8_t temp; - if ((ret = efm_eth_cmd(ENC28J60_READ_CTRL_REG, ECON1, &temp)) != RT_EOK) - { - break; - } - temp &= 0xFC; - ethBank = (addr & BANK_MASK); - temp |= ethBank >> BANK_SHIFT; - if ((ret = efm_eth_cmd(ENC28J60_WRITE_CTRL_REG, ECON1, &temp)) != RT_EOK) - { - break; - } - } - /* Send command */ - ret = efm_eth_cmd(cmd, addr, data); - } while(0); + if ((ret = efm_eth_cmd(ENC28J60_READ_CTRL_REG, ECON1, &temp)) != RT_EOK) + { + break; + } + temp &= 0xFC; + ethBank = (addr & BANK_MASK); + temp |= ethBank >> BANK_SHIFT; + if ((ret = efm_eth_cmd(ENC28J60_WRITE_CTRL_REG, ECON1, &temp)) != RT_EOK) + { + break; + } + } + /* Send command */ + ret = efm_eth_cmd(cmd, addr, data); + } while(0); - return ret; + return ret; } /***************************************************************************//** @@ -262,11 +262,11 @@ static rt_err_t efm_eth_sendCmd( ******************************************************************************/ static rt_uint8_t efm_eth_readReg(rt_uint8_t addr) { - rt_uint8_t data; + rt_uint8_t data; - efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, addr, &data); + efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, addr, &data); - return data; + return data; } /***************************************************************************//** @@ -285,7 +285,7 @@ static rt_uint8_t efm_eth_readReg(rt_uint8_t addr) ******************************************************************************/ static void efm_eth_writeReg(rt_uint8_t addr, rt_uint8_t data) { - efm_eth_sendCmd(ENC28J60_WRITE_CTRL_REG, addr, &data); + efm_eth_sendCmd(ENC28J60_WRITE_CTRL_REG, addr, &data); } /***************************************************************************//** @@ -304,25 +304,25 @@ static void efm_eth_writeReg(rt_uint8_t addr, rt_uint8_t data) ******************************************************************************/ static rt_uint16_t efm_eth_readPhy(rt_uint8_t addr) { - rt_uint16_t ret; + rt_uint16_t ret; - eth_debug("ETH: *** read PHY %x\n", addr); + eth_debug("ETH: *** read PHY %x\n", addr); - /* Set PHY register address */ - efm_eth_writeReg(MIREGADR, addr); + /* Set PHY register address */ + efm_eth_writeReg(MIREGADR, addr); - /* Start read operation */ - efm_eth_writeReg(MICMD, MICMD_MIIRD); - /* Waiting for at least 10.24 uS */ - while(efm_eth_readReg(MISTAT) & MISTAT_BUSY); + /* Start read operation */ + efm_eth_writeReg(MICMD, MICMD_MIIRD); + /* Waiting for at least 10.24 uS */ + while(efm_eth_readReg(MISTAT) & MISTAT_BUSY); - /* Stop read operation */ - efm_eth_writeReg(MICMD, 0x00); + /* Stop read operation */ + efm_eth_writeReg(MICMD, 0x00); - /* Get the result */ - ret = (rt_uint16_t)efm_eth_readReg(MIRDL); - ret |= (rt_uint16_t)efm_eth_readReg(MIRDH) << 8; - return ret; + /* Get the result */ + ret = (rt_uint16_t)efm_eth_readReg(MIRDL); + ret |= (rt_uint16_t)efm_eth_readReg(MIRDH) << 8; + return ret; } /***************************************************************************//** @@ -341,82 +341,82 @@ static rt_uint16_t efm_eth_readPhy(rt_uint8_t addr) ******************************************************************************/ static void efm_eth_writePhy(rt_uint8_t addr, rt_uint16_t data) { - eth_debug("ETH: *** write PHY %x (%x)\n", addr, data); + eth_debug("ETH: *** write PHY %x (%x)\n", addr, data); - /* Set PHY register address */ - efm_eth_writeReg(MIREGADR, addr); + /* Set PHY register address */ + efm_eth_writeReg(MIREGADR, addr); - /* Set data */ - efm_eth_writeReg(MIWRL, data); - efm_eth_writeReg(MIWRH, data >> 8); - /* Waiting for at least 10.24 uS */ - while(efm_eth_readReg(MISTAT) & MISTAT_BUSY); + /* Set data */ + efm_eth_writeReg(MIWRL, data); + efm_eth_writeReg(MIWRH, data >> 8); + /* Waiting for at least 10.24 uS */ + while(efm_eth_readReg(MISTAT) & MISTAT_BUSY); } /***************************************************************************//** * @brief - * Interrupt handler of Ethernet device + * Interrupt handler of Ethernet device * * @details * * @note * * @param[in] dev - * Pointer to device descriptor + * Pointer to device descriptor ******************************************************************************/ void efm_eth_isr(rt_device_t dev) { - rt_uint8_t reg_eir, data; - volatile rt_uint8_t cnt; + rt_uint8_t reg_eir, data; + volatile rt_uint8_t cnt; - /* Disable RX and other interrutps */ - data = EIE_PKTIE | EIE_INTIE; - efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data); + /* Disable RX and other interrutps */ + data = EIE_PKTIE | EIE_INTIE; + efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data); - /* Get interrupt flag */ - efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, EIR, ®_eir); + /* Get interrupt flag */ + efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, EIR, ®_eir); - data = 0; - /* DMA completed */ - if (reg_eir & EIR_DMAIF) - { - data |= (rt_uint8_t)EIR_DMAIF; - } - /* Link Changed */ - if (reg_eir & EIR_LINKIF) - { - /* Read PHIR to clear the flag */ - efm_eth_readPhy(PHIR); - } - /* TX done */ - if (reg_eir & EIR_TXIF) - { - data |= (rt_uint8_t)EIR_TXIF; - } - /* TX error */ - if (reg_eir & EIR_TXERIF) - { - data |= (rt_uint8_t)EIR_TXERIF; - } - /* RX error */ - if (reg_eir & EIR_RXERIF) - { - data |= (rt_uint8_t)EIR_RXERIF; - } - /* Clear flags */ - efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data); + data = 0; + /* DMA completed */ + if (reg_eir & EIR_DMAIF) + { + data |= (rt_uint8_t)EIR_DMAIF; + } + /* Link Changed */ + if (reg_eir & EIR_LINKIF) + { + /* Read PHIR to clear the flag */ + efm_eth_readPhy(PHIR); + } + /* TX done */ + if (reg_eir & EIR_TXIF) + { + data |= (rt_uint8_t)EIR_TXIF; + } + /* TX error */ + if (reg_eir & EIR_TXERIF) + { + data |= (rt_uint8_t)EIR_TXERIF; + } + /* RX error */ + if (reg_eir & EIR_RXERIF) + { + data |= (rt_uint8_t)EIR_RXERIF; + } + /* Clear flags */ + efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data); - /* Get packet counter (Errata 6) */ - efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, EPKTCNT, (rt_uint8_t *)&cnt); - if (cnt) - { - /* Inform Ethernet thread */ - eth_device_ready(ð_dev); - } + /* Get packet counter (Errata 6) */ + efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, EPKTCNT, (rt_uint8_t *)&cnt); + if (cnt) + { + /* Inform Ethernet thread */ + eth_device_ready(ð_dev); + } - /* Enable other interrupts */ - data = EIE_INTIE; - efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data); + /* Enable other interrupts */ + data = EIE_INTIE; + efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data); } /***************************************************************************//** @@ -435,119 +435,119 @@ void efm_eth_isr(rt_device_t dev) ******************************************************************************/ static rt_err_t efm_eth_init(rt_device_t dev) { - rt_uint16_t reg_phy; - rt_uint8_t data; + rt_uint16_t reg_phy; + rt_uint8_t data; - /* Reset chip select */ - efm_eth_cs(0); - /* Software reset */ - efm_eth_sendCmd(ENC28J60_SOFT_RESET, EFM32_NO_DATA, EFM32_NO_POINTER); - /* Waiting for at least 1 ms (Errata 2) */ - rt_thread_delay(ETH_PERIOD_WAIT_INIT); - ethNxtPkt = RXSTART_INIT; - ethBank = 0; + /* Reset chip select */ + efm_eth_cs(0); + /* Software reset */ + efm_eth_sendCmd(ENC28J60_SOFT_RESET, EFM32_NO_DATA, EFM32_NO_POINTER); + /* Waiting for at least 1 ms (Errata 2) */ + rt_thread_delay(ETH_PERIOD_WAIT_INIT); + ethNxtPkt = RXSTART_INIT; + ethBank = 0; - /* Init RX buffer */ - efm_eth_writeReg(ERXSTL, RXSTART_INIT & 0xFF); - efm_eth_writeReg(ERXSTH, RXSTART_INIT >> 8); - efm_eth_writeReg(ERXNDL, RXSTOP_INIT & 0xFF); - efm_eth_writeReg(ERXNDH, RXSTOP_INIT >> 8); - efm_eth_writeReg(ERXRDPTL, RXSTOP_INIT & 0xFF); - efm_eth_writeReg(ERXRDPTH, RXSTOP_INIT >> 8); + /* Init RX buffer */ + efm_eth_writeReg(ERXSTL, RXSTART_INIT & 0xFF); + efm_eth_writeReg(ERXSTH, RXSTART_INIT >> 8); + efm_eth_writeReg(ERXNDL, RXSTOP_INIT & 0xFF); + efm_eth_writeReg(ERXNDH, RXSTOP_INIT >> 8); + efm_eth_writeReg(ERXRDPTL, RXSTOP_INIT & 0xFF); + efm_eth_writeReg(ERXRDPTH, RXSTOP_INIT >> 8); - /* Init TX buffer */ - efm_eth_writeReg(ETXSTL, TXSTART_INIT & 0xFF); - efm_eth_writeReg(ETXSTH, TXSTART_INIT >> 8); - efm_eth_writeReg(ETXNDL, TXSTOP_INIT & 0xFF); - efm_eth_writeReg(ETXNDH, TXSTOP_INIT >> 8); - efm_eth_writeReg(EWRPTL, TXSTART_INIT & 0xFF); - efm_eth_writeReg(EWRPTH, TXSTART_INIT >> 8); + /* Init TX buffer */ + efm_eth_writeReg(ETXSTL, TXSTART_INIT & 0xFF); + efm_eth_writeReg(ETXSTH, TXSTART_INIT >> 8); + efm_eth_writeReg(ETXNDL, TXSTOP_INIT & 0xFF); + efm_eth_writeReg(ETXNDH, TXSTOP_INIT >> 8); + efm_eth_writeReg(EWRPTL, TXSTART_INIT & 0xFF); + efm_eth_writeReg(EWRPTH, TXSTART_INIT >> 8); - /* Init RX filters */ - /* For broadcast packets we allow only ARP packtets - All other packets should be unicast only for our mac (MAADR) + /* Init RX filters */ + /* For broadcast packets we allow only ARP packtets + All other packets should be unicast only for our mac (MAADR) - The pattern to match on is therefore - Type ETH.DST - ARP BROADCAST - 06 08 -- -- -- -- -- -- ff ff ff ff ff ff - These poitions are: 11 0000 0011 1111 in binary and 30 3f in hex - Checksum for theses bytes is: f7 f9 */ - efm_eth_writeReg(EPMM0, 0x3f); - efm_eth_writeReg(EPMM1, 0x30); - efm_eth_writeReg(EPMCSL, 0xf9); - efm_eth_writeReg(EPMCSH, 0xf7); - efm_eth_writeReg(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_PMEN); - //efm_eth_writeReg(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_BCEN); - /* Waiting For OST: The OST does not expire until 7500 OSC1 clock cycles (300 uS) - pass after Power-on Reset or wake-up from Power-Down mode occurs */ + The pattern to match on is therefore + Type ETH.DST + ARP BROADCAST + 06 08 -- -- -- -- -- -- ff ff ff ff ff ff + These poitions are: 11 0000 0011 1111 in binary and 30 3f in hex + Checksum for theses bytes is: f7 f9 */ + efm_eth_writeReg(EPMM0, 0x3f); + efm_eth_writeReg(EPMM1, 0x30); + efm_eth_writeReg(EPMCSL, 0xf9); + efm_eth_writeReg(EPMCSH, 0xf7); + efm_eth_writeReg(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_PMEN); + //efm_eth_writeReg(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_BCEN); + /* Waiting For OST: The OST does not expire until 7500 OSC1 clock cycles (300 uS) + pass after Power-on Reset or wake-up from Power-Down mode occurs */ - /* Init MAC */ - /* Enable RX, IEEE defined flow control */ - efm_eth_writeReg(MACON1, MACON1_MARXEN | MACON1_TXPAUS | MACON1_RXPAUS); - /* Enable padding to 60 bytes, CRC and frame length status reporting */ + /* Init MAC */ + /* Enable RX, IEEE defined flow control */ + efm_eth_writeReg(MACON1, MACON1_MARXEN | MACON1_TXPAUS | MACON1_RXPAUS); + /* Enable padding to 60 bytes, CRC and frame length status reporting */ #if defined(ETH_HALF_DUPLEX) - efm_eth_writeReg(MACON3, MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN); - efm_eth_writeReg(MACON4, MACON4_DEFER); + efm_eth_writeReg(MACON3, MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN); + efm_eth_writeReg(MACON4, MACON4_DEFER); #else - efm_eth_writeReg(MACON3, \ - MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN | MACON3_FULDPX); + efm_eth_writeReg(MACON3, \ + MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN | MACON3_FULDPX); #endif - /* Set the maximum packet length */ - efm_eth_writeReg(MAMXFLL, MAX_FRAMELEN & 0xFF); - efm_eth_writeReg(MAMXFLH, MAX_FRAMELEN >> 8); - /* Set inter-packet gap (back-to-back). Full-Duplex: 0x15, Half-Duplex: 0x12 */ + /* Set the maximum packet length */ + efm_eth_writeReg(MAMXFLL, MAX_FRAMELEN & 0xFF); + efm_eth_writeReg(MAMXFLH, MAX_FRAMELEN >> 8); + /* Set inter-packet gap (back-to-back). Full-Duplex: 0x15, Half-Duplex: 0x12 */ #if defined(ETH_HALF_DUPLEX) - efm_eth_writeReg(MABBIPG, 0x12); + efm_eth_writeReg(MABBIPG, 0x12); #else - efm_eth_writeReg(MABBIPG, 0x15); + efm_eth_writeReg(MABBIPG, 0x15); #endif - /* Set inter-packet gap (non-back-to-back). - Full-Duplex: 0x0012, Half-Duplex: 0x0C12 */ - efm_eth_writeReg(MAIPGL, 0x12); + /* Set inter-packet gap (non-back-to-back). + Full-Duplex: 0x0012, Half-Duplex: 0x0C12 */ + efm_eth_writeReg(MAIPGL, 0x12); #if defined(ETH_HALF_DUPLEX) - efm_eth_writeReg(MAIPGH, 0x0C); - /* Set retransmission and collision window */ - efm_eth_writeReg(MACLCON1, 0x0F); - efm_eth_writeReg(MACLCON2, 0x37); + efm_eth_writeReg(MAIPGH, 0x0C); + /* Set retransmission and collision window */ + efm_eth_writeReg(MACLCON1, 0x0F); + efm_eth_writeReg(MACLCON2, 0x37); #endif - /* Set MAC address - NOTE: MAC address in ENC28J60 is byte-backward */ - efm_eth_writeReg(MAADR1, eth_addr[0]); - efm_eth_writeReg(MAADR2, eth_addr[1]); - efm_eth_writeReg(MAADR3, eth_addr[2]); - efm_eth_writeReg(MAADR4, eth_addr[3]); - efm_eth_writeReg(MAADR5, eth_addr[4]); - efm_eth_writeReg(MAADR6, eth_addr[5]); + /* Set MAC address + NOTE: MAC address in ENC28J60 is byte-backward */ + efm_eth_writeReg(MAADR1, eth_addr[0]); + efm_eth_writeReg(MAADR2, eth_addr[1]); + efm_eth_writeReg(MAADR3, eth_addr[2]); + efm_eth_writeReg(MAADR4, eth_addr[3]); + efm_eth_writeReg(MAADR5, eth_addr[4]); + efm_eth_writeReg(MAADR6, eth_addr[5]); - /* Init PHY */ + /* Init PHY */ #if defined(ETH_HALF_DUPLEX) - reg_phy = efm_eth_readPhy(PHCON2); - efm_eth_writePhy(PHCON2, reg_phy | PHCON2_HDLDIS); + reg_phy = efm_eth_readPhy(PHCON2); + efm_eth_writePhy(PHCON2, reg_phy | PHCON2_HDLDIS); #else - reg_phy = efm_eth_readPhy(PHCON1); - efm_eth_writePhy(PHCON1, reg_phy | PHCON1_PDPXMD); + reg_phy = efm_eth_readPhy(PHCON1); + efm_eth_writePhy(PHCON1, reg_phy | PHCON1_PDPXMD); #endif - /* LEDA: Display link status; - LEDB: Display transmit and receive activity */ - reg_phy = efm_eth_readPhy(PHLCON); - efm_eth_writePhy(PHLCON, (reg_phy & 0xF00F) | 0x0470); + /* LEDA: Display link status; + LEDB: Display transmit and receive activity */ + reg_phy = efm_eth_readPhy(PHLCON); + efm_eth_writePhy(PHLCON, (reg_phy & 0xF00F) | 0x0470); - /* Disable clock output */ - efm_eth_writeReg(ECOCON, 0x00); + /* Disable clock output */ + efm_eth_writeReg(ECOCON, 0x00); - /* Clear interrutp flags */ - data = EIR_DMAIF | EIR_TXIF | EIR_TXERIF | EIR_RXERIF; - efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data); - /* Enable interrutps */ - data = EIE_INTIE | EIE_PKTIE | EIE_TXIE; - efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data); - /* Enable RX */ - data = ECON1_RXEN; - efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data); + /* Clear interrutp flags */ + data = EIR_DMAIF | EIR_TXIF | EIR_TXERIF | EIR_RXERIF; + efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data); + /* Enable interrutps */ + data = EIE_INTIE | EIE_PKTIE | EIE_TXIE; + efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data); + /* Enable RX */ + data = ECON1_RXEN; + efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data); - eth_debug("ETH: Init OK\n"); - return RT_EOK; + eth_debug("ETH: Init OK\n"); + return RT_EOK; } /***************************************************************************//** @@ -569,8 +569,8 @@ static rt_err_t efm_eth_init(rt_device_t dev) ******************************************************************************/ static rt_err_t efm_eth_open(rt_device_t dev, rt_uint16_t oflag) { - eth_debug("ETH: Open, flag %x\n", eth_dev.parent.flag); - return RT_EOK; + eth_debug("ETH: Open, flag %x\n", eth_dev.parent.flag); + return RT_EOK; } /***************************************************************************//** @@ -589,8 +589,8 @@ static rt_err_t efm_eth_open(rt_device_t dev, rt_uint16_t oflag) ******************************************************************************/ static rt_err_t efm_eth_close(rt_device_t dev) { - eth_debug("ETH: Close, flag %x\n", eth_dev.parent.flag); - return RT_EOK; + eth_debug("ETH: Close, flag %x\n", eth_dev.parent.flag); + return RT_EOK; } /***************************************************************************//** @@ -617,10 +617,10 @@ static rt_err_t efm_eth_close(rt_device_t dev) * Number of read bytes ******************************************************************************/ static rt_size_t efm_eth_read( - rt_device_t dev, - rt_off_t pos, - void *buffer, - rt_size_t size) + rt_device_t dev, + rt_off_t pos, + void *buffer, + rt_size_t size) { rt_set_errno(-RT_ENOSYS); return 0; @@ -650,10 +650,10 @@ static rt_size_t efm_eth_read( * Number of written bytes ******************************************************************************/ static rt_size_t efm_eth_write ( - rt_device_t dev, - rt_off_t pos, - const void *buffer, - rt_size_t size) + rt_device_t dev, + rt_off_t pos, + const void *buffer, + rt_size_t size) { rt_set_errno(-RT_ENOSYS); return 0; @@ -674,35 +674,35 @@ static rt_size_t efm_eth_write ( * Ethernet control command * * @param[in] args -* Arguments +* Arguments * * @return * Error code ******************************************************************************/ static rt_err_t efm_eth_control ( - rt_device_t dev, - rt_uint8_t cmd, - void *args) + rt_device_t dev, + rt_uint8_t cmd, + void *args) { - rt_err_t ret; + rt_err_t ret; - ret = -RT_ERROR; - switch(cmd) - { - case NIOCTL_GADDR: - /* Get MAC address */ - if(args) - { - rt_memcpy(args, eth_addr, sizeof(eth_addr)); - ret = RT_EOK; - } - break; + ret = -RT_ERROR; + switch(cmd) + { + case NIOCTL_GADDR: + /* Get MAC address */ + if(args) + { + rt_memcpy(args, eth_addr, sizeof(eth_addr)); + ret = RT_EOK; + } + break; - default : - break; - } + default : + break; + } - return RT_EOK; + return RT_EOK; } /***************************************************************************//** @@ -721,43 +721,43 @@ static rt_err_t efm_eth_control ( ******************************************************************************/ struct pbuf *efm_eth_rx(rt_device_t dev) { - rt_uint8_t buf_ins[5], buf_read[6]; - rt_uint8_t data, reg_eie; - rt_uint16_t len_rx, sta_rx; - struct pbuf* p; + rt_uint8_t buf_ins[5], buf_read[6]; + rt_uint8_t data, reg_eie; + rt_uint16_t len_rx, sta_rx; + struct pbuf* p; /* Lock device */ rt_sem_take(ðLock, RT_WAITING_FOREVER); /* Disable interrupts */ - data = EIE_INTIE; - efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data); + data = EIE_INTIE; + efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data); - p = RT_NULL; - reg_eie = 0; + p = RT_NULL; + reg_eie = 0; if (efm_eth_readReg(EPKTCNT)) { /* Set read pointer to the start of RX packet */ efm_eth_writeReg(ERDPTL, ethNxtPkt & 0xFF); efm_eth_writeReg(ERDPTH, ethNxtPkt >> 8); - /* Send read buffer command */ - efm_eth_sendCmd(ENC28J60_READ_BUF_MEM, EFM32_NO_DATA, EFM32_NO_POINTER); - /* Build instruction buffer */ - buf_ins[0] = 0x00; - *(rt_uint8_t **)(&buf_ins[1]) = buf_read; - /* Read packet header */ - if (spi->read(spi, EFM32_NO_DATA, buf_ins, sizeof(buf_read)) == 0) - { - eth_debug("ETH: RX header failed!\n"); - } + /* Send read buffer command */ + efm_eth_sendCmd(ENC28J60_READ_BUF_MEM, EFM32_NO_DATA, EFM32_NO_POINTER); + /* Build instruction buffer */ + buf_ins[0] = 0x00; + *(rt_uint8_t **)(&buf_ins[1]) = buf_read; + /* Read packet header */ + if (spi->read(spi, EFM32_NO_DATA, buf_ins, sizeof(buf_read)) == 0) + { + eth_debug("ETH: RX header failed!\n"); + } - ethNxtPkt = buf_read[0] | (buf_read[1] << 8); - len_rx = buf_read[2] | (buf_read[3] << 8); - sta_rx = buf_read[4] | (buf_read[5] << 8); - eth_debug("ETH: RX header ethNxtPkt %x, len_rx %x, sta_rx %x\n", - ethNxtPkt, len_rx, sta_rx); - /* Check if OK */ + ethNxtPkt = buf_read[0] | (buf_read[1] << 8); + len_rx = buf_read[2] | (buf_read[3] << 8); + sta_rx = buf_read[4] | (buf_read[5] << 8); + eth_debug("ETH: RX header ethNxtPkt %x, len_rx %x, sta_rx %x\n", + ethNxtPkt, len_rx, sta_rx); + /* Check if OK */ if (sta_rx & 0x80) { /* Allocate pbuf */ @@ -768,67 +768,67 @@ struct pbuf *efm_eth_rx(rt_device_t dev) for (q = p; q != RT_NULL; q= q->next) { - /* Build instruction buffer */ - buf_ins[0] = 0x00; - *(rt_uint8_t **)(&buf_ins[1]) = q->payload; - /* Read packet header */ - if (spi->read(spi, EFM32_NO_DATA, buf_ins, q->len) == 0) - { - eth_debug("ETH: RX payload failed!\n"); - } + /* Build instruction buffer */ + buf_ins[0] = 0x00; + *(rt_uint8_t **)(&buf_ins[1]) = q->payload; + /* Read packet header */ + if (spi->read(spi, EFM32_NO_DATA, buf_ins, q->len) == 0) + { + eth_debug("ETH: RX payload failed!\n"); + } #ifdef EFM32_ETHERNET_DEBUG - { - rt_uint8_t *temp = (rt_uint8_t *)q->payload; - rt_uint32_t i; + { + rt_uint8_t *temp = (rt_uint8_t *)q->payload; + rt_uint32_t i; - eth_debug("ETH: ***** read RX (q->len %x) *****\n", q->len); - for (i = 0; i < q->len; i += 8) - { - eth_debug("%02x %02x %02x %02x %02x %02x %02x %02x | %c %c %c %c %c %c %c %c\n", - temp[i], temp[i + 1], temp[i + 2], temp[i + 3], - temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7], - temp[i], temp[i + 1], temp[i + 2], temp[i + 3], - temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7]); - } - } + eth_debug("ETH: ***** read RX (q->len %x) *****\n", q->len); + for (i = 0; i < q->len; i += 8) + { + eth_debug("%02x %02x %02x %02x %02x %02x %02x %02x | %c %c %c %c %c %c %c %c\n", + temp[i], temp[i + 1], temp[i + 2], temp[i + 3], + temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7], + temp[i], temp[i + 1], temp[i + 2], temp[i + 3], + temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7]); + } + } #endif } } - else - { - eth_debug("ETH: No memory for pbuf!!!\n"); - } + else + { + eth_debug("ETH: No memory for pbuf!!!\n"); + } } - else - { + else + { eth_debug("ETH: Invalid CRC or symbol error occurred!\n"); } - efm_eth_cs(0); + efm_eth_cs(0); /* Free buffer */ efm_eth_writeReg(ERXRDPTL, ethNxtPkt & 0xFF); efm_eth_writeReg(ERXRDPTH, ethNxtPkt >> 8); /* Decrease counter */ - data = ECON2_PKTDEC; + data = ECON2_PKTDEC; efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON2, &data); } - else - { - /* Enable RX */ - data = ECON1_RXEN; - efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data); + else + { + /* Enable RX */ + data = ECON1_RXEN; + efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data); - reg_eie |= EIE_PKTIE; - eth_debug("ETH: Enable RX interrupt\n"); - } - eth_debug("ETH: RX counter %x\n", efm_eth_readReg(EPKTCNT)); + reg_eie |= EIE_PKTIE; + eth_debug("ETH: Enable RX interrupt\n"); + } + eth_debug("ETH: RX counter %x\n", efm_eth_readReg(EPKTCNT)); /* Enable interrupts */ - reg_eie |= EIE_INTIE; - efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, ®_eie); + reg_eie |= EIE_INTIE; + efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, ®_eie); - /* Unlock device */ + /* Unlock device */ rt_sem_release(ðLock); return p; @@ -849,76 +849,76 @@ struct pbuf *efm_eth_rx(rt_device_t dev) * Pointer to packet buffer * * @return -* Error code +* Error code ******************************************************************************/ rt_err_t efm_eth_tx(rt_device_t dev, struct pbuf* p) { - rt_uint8_t data; - struct pbuf* q; + rt_uint8_t data; + struct pbuf* q; /* Lock device */ rt_sem_take(ðLock, RT_WAITING_FOREVER); /* Disable interrupts */ - data = EIE_INTIE; - efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data); + data = EIE_INTIE; + efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data); - /* Set write pointer to the start of TX buffer */ - efm_eth_writeReg(EWRPTL, TXSTART_INIT & 0xFF); - efm_eth_writeReg(EWRPTH, TXSTART_INIT >> 8); - /* Set buffer end pointer according to the packet size */ - efm_eth_writeReg(ETXNDL, (TXSTART_INIT + p->tot_len + 1) & 0xFF); - efm_eth_writeReg(ETXNDH, (TXSTART_INIT + p->tot_len + 1) >> 8); + /* Set write pointer to the start of TX buffer */ + efm_eth_writeReg(EWRPTL, TXSTART_INIT & 0xFF); + efm_eth_writeReg(EWRPTH, TXSTART_INIT >> 8); + /* Set buffer end pointer according to the packet size */ + efm_eth_writeReg(ETXNDL, (TXSTART_INIT + p->tot_len + 1) & 0xFF); + efm_eth_writeReg(ETXNDH, (TXSTART_INIT + p->tot_len + 1) >> 8); - /* Send write buffer command */ - data = 0x00; /* Control byte */ - efm_eth_sendCmd(ENC28J60_WRITE_BUF_MEM, EFM32_NO_DATA, &data); - /* Send data */ - for (q = p; q != NULL; q = q->next) - { - if (spi->write(spi, EFM32_NO_DATA, q->payload, q->len) == 0) - { - eth_debug("ETH: TX failed!\n"); - return -RT_ERROR; - } + /* Send write buffer command */ + data = 0x00; /* Control byte */ + efm_eth_sendCmd(ENC28J60_WRITE_BUF_MEM, EFM32_NO_DATA, &data); + /* Send data */ + for (q = p; q != NULL; q = q->next) + { + if (spi->write(spi, EFM32_NO_DATA, q->payload, q->len) == 0) + { + eth_debug("ETH: TX failed!\n"); + return -RT_ERROR; + } #ifdef EFM32_ETHERNET_DEBUG - { - rt_uint8_t *temp = (rt_uint8_t *)q->payload; - rt_uint32_t i; + { + rt_uint8_t *temp = (rt_uint8_t *)q->payload; + rt_uint32_t i; - eth_debug("ETH: ***** write TX (len %d) *****\n", p->len); - for (i = 0; i < q->len; i += 8) - { - eth_debug("%02x %02x %02x %02x %02x %02x %02x %02x | %c %c %c %c %c %c %c %c\n", - temp[i], temp[i + 1], temp[i + 2], temp[i + 3], - temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7], - temp[i], temp[i + 1], temp[i + 2], temp[i + 3], - temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7]); - } - } + eth_debug("ETH: ***** write TX (len %d) *****\n", p->len); + for (i = 0; i < q->len; i += 8) + { + eth_debug("%02x %02x %02x %02x %02x %02x %02x %02x | %c %c %c %c %c %c %c %c\n", + temp[i], temp[i + 1], temp[i + 2], temp[i + 3], + temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7], + temp[i], temp[i + 1], temp[i + 2], temp[i + 3], + temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7]); + } + } #endif - } - efm_eth_cs(0); - /* Start TX */ - data = ECON1_TXRTS; - efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data); - /* Errata 12 */ - if (efm_eth_readReg(EIR) & EIR_TXERIF) - { - efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, ECON1, &data); - data = EIR_TXERIF; - efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data); - data = ECON1_TXRTS; - efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data); - } + } + efm_eth_cs(0); + /* Start TX */ + data = ECON1_TXRTS; + efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data); + /* Errata 12 */ + if (efm_eth_readReg(EIR) & EIR_TXERIF) + { + efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, ECON1, &data); + data = EIR_TXERIF; + efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data); + data = ECON1_TXRTS; + efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data); + } - /* Waiting for a while */ - rt_thread_delay(ETH_PERIOD_WAIT_INIT); + /* Waiting for a while */ + rt_thread_delay(ETH_PERIOD_WAIT_INIT); /* Enable interrupts */ - data = EIE_INTIE; - efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data); + data = EIE_INTIE; + efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data); - /* Unlock device */ + /* Unlock device */ rt_sem_release(ðLock); return RT_EOK; @@ -926,164 +926,164 @@ rt_err_t efm_eth_tx(rt_device_t dev, struct pbuf* p) /***************************************************************************//** * @brief -* Initialize all Ethernet related hardware and register the device to kernel +* Initialize all Ethernet related hardware and register the device to kernel * * @details * * @note * * @return -* Error code +* Error code ******************************************************************************/ rt_err_t efm_hw_eth_init(void) { - struct efm32_usart_device_t *usart; - efm32_irq_hook_init_t hook; + struct efm32_usart_device_t *usart; + efm32_irq_hook_init_t hook; - do - { - /* Find SPI device */ - spi = rt_device_find(ETH_USING_DEVICE_NAME); - if (spi == RT_NULL) - { - eth_debug("ETH: Can't find device %s!\n", - ETH_USING_DEVICE_NAME); - break; - } - eth_debug("ETH: Find device %s\n", ETH_USING_DEVICE_NAME); + do + { + /* Find SPI device */ + spi = rt_device_find(ETH_USING_DEVICE_NAME); + if (spi == RT_NULL) + { + eth_debug("ETH: Can't find device %s!\n", + ETH_USING_DEVICE_NAME); + break; + } + eth_debug("ETH: Find device %s\n", ETH_USING_DEVICE_NAME); - /* Config chip slect pin */ - usart = (struct efm32_usart_device_t *)(spi->user_data); - if (!(usart->state & USART_STATE_AUTOCS)) - { - GPIO_PinModeSet(ETH_CS_PORT, ETH_CS_PIN, gpioModePushPull, 1); - ethAutoCs = false; - } - /* Config reset pin */ - GPIO_PinModeSet(ETH_RESET_PORT, ETH_RESET_PIN, gpioModePushPull, 0); - /* Config interrupt pin */ - GPIO_PinModeSet(ETH_INT_PORT, ETH_INT_PIN, gpioModeInput, 1); + /* Config chip slect pin */ + usart = (struct efm32_usart_device_t *)(spi->user_data); + if (!(usart->state & USART_STATE_AUTOCS)) + { + GPIO_PinModeSet(ETH_CS_PORT, ETH_CS_PIN, gpioModePushPull, 1); + ethAutoCs = false; + } + /* Config reset pin */ + GPIO_PinModeSet(ETH_RESET_PORT, ETH_RESET_PIN, gpioModePushPull, 0); + /* Config interrupt pin */ + GPIO_PinModeSet(ETH_INT_PORT, ETH_INT_PIN, gpioModeInput, 1); - /* Config interrupt */ - hook.type = efm32_irq_type_gpio; - hook.unit = ETH_INT_PIN; - hook.cbFunc = efm_eth_isr; - hook.userPtr = RT_NULL; - efm32_irq_hook_register(&hook); - /* Clear pending interrupt */ - BITBAND_Peripheral(&(GPIO->IFC), ETH_INT_PIN, 0x1UL); - /* Set falling edge interrupt and clear/enable it */ - GPIO_IntConfig( - ETH_INT_PORT, - ETH_INT_PIN, - false, - true, - true); - if ((rt_uint8_t)ETH_INT_PIN % 2) - { - NVIC_ClearPendingIRQ(GPIO_ODD_IRQn); - NVIC_SetPriority(GPIO_ODD_IRQn, EFM32_IRQ_PRI_DEFAULT); - NVIC_EnableIRQ(GPIO_ODD_IRQn); - } - else - { - NVIC_ClearPendingIRQ(GPIO_EVEN_IRQn); - NVIC_SetPriority(GPIO_EVEN_IRQn, EFM32_IRQ_PRI_DEFAULT); - NVIC_EnableIRQ(GPIO_EVEN_IRQn); - } + /* Config interrupt */ + hook.type = efm32_irq_type_gpio; + hook.unit = ETH_INT_PIN; + hook.cbFunc = efm_eth_isr; + hook.userPtr = RT_NULL; + efm32_irq_hook_register(&hook); + /* Clear pending interrupt */ + BITBAND_Peripheral(&(GPIO->IFC), ETH_INT_PIN, 0x1UL); + /* Set falling edge interrupt and clear/enable it */ + GPIO_IntConfig( + ETH_INT_PORT, + ETH_INT_PIN, + false, + true, + true); + if ((rt_uint8_t)ETH_INT_PIN % 2) + { + NVIC_ClearPendingIRQ(GPIO_ODD_IRQn); + NVIC_SetPriority(GPIO_ODD_IRQn, EFM32_IRQ_PRI_DEFAULT); + NVIC_EnableIRQ(GPIO_ODD_IRQn); + } + else + { + NVIC_ClearPendingIRQ(GPIO_EVEN_IRQn); + NVIC_SetPriority(GPIO_EVEN_IRQn, EFM32_IRQ_PRI_DEFAULT); + NVIC_EnableIRQ(GPIO_EVEN_IRQn); + } - /* Set SPI speed */ - USART_BaudrateSyncSet(usart->usart_device, 0, ETH_CLK_MAX); + /* Set SPI speed */ + USART_BaudrateSyncSet(usart->usart_device, 0, ETH_CLK_MAX); - /* Initialize semaphore */ - rt_sem_init(ðLock, ETH_DEVICE_NAME, 1, RT_IPC_FLAG_FIFO); + /* Initialize semaphore */ + rt_sem_init(ðLock, ETH_DEVICE_NAME, 1, RT_IPC_FLAG_FIFO); - /* Register Ethernet device */ - eth_dev.parent.init = efm_eth_init; - eth_dev.parent.open = efm_eth_open; - eth_dev.parent.close = efm_eth_close; - eth_dev.parent.read = efm_eth_read; - eth_dev.parent.write = efm_eth_write; - eth_dev.parent.control = efm_eth_control; - eth_dev.eth_rx = efm_eth_rx; - eth_dev.eth_tx = efm_eth_tx; - eth_device_init(ð_dev, ETH_DEVICE_NAME); + /* Register Ethernet device */ + eth_dev.parent.init = efm_eth_init; + eth_dev.parent.open = efm_eth_open; + eth_dev.parent.close = efm_eth_close; + eth_dev.parent.read = efm_eth_read; + eth_dev.parent.write = efm_eth_write; + eth_dev.parent.control = efm_eth_control; + eth_dev.eth_rx = efm_eth_rx; + eth_dev.eth_tx = efm_eth_tx; + eth_device_init(ð_dev, ETH_DEVICE_NAME); - /* Start device */ - GPIO_PinOutSet(ETH_RESET_PORT, ETH_RESET_PIN); + /* Start device */ + GPIO_PinOutSet(ETH_RESET_PORT, ETH_RESET_PIN); - eth_debug("ETH: HW init OK\n"); - return RT_EOK; - } while (0); + eth_debug("ETH: HW init OK\n"); + return RT_EOK; + } while (0); - /* Release buffer */ - rt_kprintf("ETH: HW init failed!\n"); - return -RT_ERROR; + /* Release buffer */ + rt_kprintf("ETH: HW init failed!\n"); + return -RT_ERROR; } /******************************************************************************* - * Export to FINSH + * Export to FINSH ******************************************************************************/ -#if defined(EFM32_USING_ETH_UTILS) +#if defined(EFM32_USING_ETH_UTILS) #ifdef RT_USING_FINSH #include <finsh.h> void list_eth(void) { - rt_uint16_t reg_phy; - rt_uint8_t data; + rt_uint16_t reg_phy; + rt_uint8_t data; - rt_kprintf(" ENC28J60 on %s\n", ETH_USING_DEVICE_NAME); - rt_kprintf(" ------------------------------\n"); - reg_phy = efm_eth_readPhy(PHSTAT2); - if (reg_phy & PHSTAT2_PLRITY) - { - rt_kprintf(" Cable polarity is reversed\n"); - } - else - { - rt_kprintf(" Cable polarity is correct\n"); - } - if (reg_phy & PHSTAT2_DPXSTAT) - { - rt_kprintf(" Full-duplex mode\n"); - } - else - { - rt_kprintf(" Half-duplex mode\n"); - } - if (reg_phy & PHSTAT2_LSTAT) - { - rt_kprintf(" Link is up\n"); - } - else - { - rt_kprintf(" Link is down\n"); - } - if (reg_phy & PHSTAT2_COLSTAT) - { - rt_kprintf(" Collision is occuring\n"); - } - else - { - rt_kprintf(" No collision\n"); - } - if (reg_phy & PHSTAT2_RXSTAT) - { - rt_kprintf(" RX is busy\n"); - } - else - { - rt_kprintf(" RX is idle\n"); - } - if (reg_phy & PHSTAT2_TXSTAT) - { - rt_kprintf(" TX is busy\n"); - } - else - { - rt_kprintf(" TX is idle\n"); - } + rt_kprintf(" ENC28J60 on %s\n", ETH_USING_DEVICE_NAME); + rt_kprintf(" ------------------------------\n"); + reg_phy = efm_eth_readPhy(PHSTAT2); + if (reg_phy & PHSTAT2_PLRITY) + { + rt_kprintf(" Cable polarity is reversed\n"); + } + else + { + rt_kprintf(" Cable polarity is correct\n"); + } + if (reg_phy & PHSTAT2_DPXSTAT) + { + rt_kprintf(" Full-duplex mode\n"); + } + else + { + rt_kprintf(" Half-duplex mode\n"); + } + if (reg_phy & PHSTAT2_LSTAT) + { + rt_kprintf(" Link is up\n"); + } + else + { + rt_kprintf(" Link is down\n"); + } + if (reg_phy & PHSTAT2_COLSTAT) + { + rt_kprintf(" Collision is occuring\n"); + } + else + { + rt_kprintf(" No collision\n"); + } + if (reg_phy & PHSTAT2_RXSTAT) + { + rt_kprintf(" RX is busy\n"); + } + else + { + rt_kprintf(" RX is idle\n"); + } + if (reg_phy & PHSTAT2_TXSTAT) + { + rt_kprintf(" TX is busy\n"); + } + else + { + rt_kprintf(" TX is idle\n"); + } } FINSH_FUNCTION_EXPORT(list_eth, list the Ethernet device status.) @@ -1091,108 +1091,108 @@ FINSH_FUNCTION_EXPORT(list_eth, list the Ethernet device status.) rt_err_t get_ip(char *ip) { - err_t ret; - struct ip_addr server_ip; - struct netconn *conn; - struct netbuf *buf; - char *rq, *rq2; - u16_t len; - const char query[] = "GET / HTTP/1.0\r\nHOST: checkip.dyndns.com\r\n\r\n"; - const char find[] = "body"; + err_t ret; + struct ip_addr server_ip; + struct netconn *conn; + struct netbuf *buf; + char *rq, *rq2; + u16_t len; + const char query[] = "GET / HTTP/1.0\r\nHOST: checkip.dyndns.com\r\n\r\n"; + const char find[] = "body"; - do - { + do + { #if defined(RT_LWIP_DNS) - ret = netconn_gethostbyname("checkip.dyndns.com", &server_ip); - if (ret != ERR_OK) - { - break; - } + ret = netconn_gethostbyname("checkip.dyndns.com", &server_ip); + if (ret != ERR_OK) + { + break; + } #else - IP4_ADDR(&server_ip, 216,146,38,70); // IP address of "checkip.dyndns.com" + IP4_ADDR(&server_ip, 216,146,38,70); // IP address of "checkip.dyndns.com" #endif - conn = netconn_new(NETCONN_TCP); - if (conn == NULL) - { - break; - } + conn = netconn_new(NETCONN_TCP); + if (conn == NULL) + { + break; + } - ret = netconn_connect(conn, &server_ip, 80); - if (ret != ERR_OK) - { - break; - } + ret = netconn_connect(conn, &server_ip, 80); + if (ret != ERR_OK) + { + break; + } - /* Send the query */ - ret = netconn_write(conn, query, sizeof(query) - 1, 0); - if (ret != ERR_OK) - { - break; - } + /* Send the query */ + ret = netconn_write(conn, query, sizeof(query) - 1, 0); + if (ret != ERR_OK) + { + break; + } - buf = netconn_recv(conn); - if (buf != NULL) - { - /* Get the response */ - ret = netbuf_data(buf, (void **)&rq, &len); - if (ret != ERR_OK) - { - break; - } + buf = netconn_recv(conn); + if (buf != NULL) + { + /* Get the response */ + ret = netbuf_data(buf, (void **)&rq, &len); + if (ret != ERR_OK) + { + break; + } - /* Find the IP address */ - rq = rt_strstr(rq, find); - if (rq == RT_NULL) - { - break; - } - rq += 5; - rq2 = rq; - rq2 = rt_strstr(rq2, find); - if (rq2 == RT_NULL) - { - break; - } - rq2 -= 2; - *rq2 = 0x0; -// rt_kprintf("[%s]\n", rq); - } - else - { - break; - } + /* Find the IP address */ + rq = rt_strstr(rq, find); + if (rq == RT_NULL) + { + break; + } + rq += 5; + rq2 = rq; + rq2 = rt_strstr(rq2, find); + if (rq2 == RT_NULL) + { + break; + } + rq2 -= 2; + *rq2 = 0x0; +// rt_kprintf("[%s]\n", rq); + } + else + { + break; + } - /* Copy the IP address to buffer */ - if (ip != NULL) - { - while(*rq < '0' || *rq > '9') - { - rq++; - } - rt_memcpy(ip, rq, rq2 - rq + 1); - } - netconn_delete(conn); - netbuf_delete(buf); - return RT_EOK; - } while (0); + /* Copy the IP address to buffer */ + if (ip != NULL) + { + while(*rq < '0' || *rq > '9') + { + rq++; + } + rt_memcpy(ip, rq, rq2 - rq + 1); + } + netconn_delete(conn); + netbuf_delete(buf); + return RT_EOK; + } while (0); - netconn_delete(conn); - netbuf_delete(buf); - return -RT_ERROR; + netconn_delete(conn); + netbuf_delete(buf); + return -RT_ERROR; } void list_myip(void) { - rt_uint8_t ip[20]; + rt_uint8_t ip[20]; - if (get_ip(ip) != RT_EOK) - { - rt_kprintf("Get IP failed!\n"); - return; - } + if (get_ip(ip) != RT_EOK) + { + rt_kprintf("Get IP failed!\n"); + return; + } - rt_kprintf("Current IP: [%s]\n", ip); + rt_kprintf("Current IP: [%s]\n", ip); } FINSH_FUNCTION_EXPORT(list_myip, list the current IP address.) @@ -1202,122 +1202,122 @@ FINSH_FUNCTION_EXPORT(list_myip, list the current IP address.) rt_err_t update_ip(char *ip) { - err_t ret; - struct ip_addr server_ip; - struct netconn *conn; - struct netbuf *buf; - char *rq; - u16_t len, len2; - char query[200] = "GET /nic/update?hostname="; - const char query2[] = "&myip="; - const char query3[] = " HTTP/1.0\r\nHost: members.dyndns.org\r\nAuthorization: Basic "; - const char query4[] = "\r\nUser-Agent: onelife - EFM32 - 0.4\r\n\r\n"; - const char find[] = "good"; + err_t ret; + struct ip_addr server_ip; + struct netconn *conn; + struct netbuf *buf; + char *rq; + u16_t len, len2; + char query[200] = "GET /nic/update?hostname="; + const char query2[] = "&myip="; + const char query3[] = " HTTP/1.0\r\nHost: members.dyndns.org\r\nAuthorization: Basic "; + const char query4[] = "\r\nUser-Agent: onelife - EFM32 - 0.4\r\n\r\n"; + const char find[] = "good"; - /* Make the query */ - len = rt_strlen(query); - len2 = sizeof(hostName) - 1; - rt_memcpy(&query[len], hostName, len2); - len += len2; + /* Make the query */ + len = rt_strlen(query); + len2 = sizeof(hostName) - 1; + rt_memcpy(&query[len], hostName, len2); + len += len2; - len2 = sizeof(query2) - 1; - rt_memcpy(&query[len], query2, len2); - len += len2; + len2 = sizeof(query2) - 1; + rt_memcpy(&query[len], query2, len2); + len += len2; - len2 = rt_strlen(ip); - rt_memcpy(&query[len], ip, len2); - len += len2; + len2 = rt_strlen(ip); + rt_memcpy(&query[len], ip, len2); + len += len2; - len2 = sizeof(query3) - 1; - rt_memcpy(&query[len], query3, len2); - len += len2; + len2 = sizeof(query3) - 1; + rt_memcpy(&query[len], query3, len2); + len += len2; - len2 = sizeof(userPwdB64) - 1; - rt_memcpy(&query[len], userPwdB64, len2); - len += len2; + len2 = sizeof(userPwdB64) - 1; + rt_memcpy(&query[len], userPwdB64, len2); + len += len2; - len2 = sizeof(query4) - 1; - rt_memcpy(&query[len], query4, len2); - len += len2; + len2 = sizeof(query4) - 1; + rt_memcpy(&query[len], query4, len2); + len += len2; - query[len] = 0x0; -// rt_kprintf("Query: %s\n", &query[100]); + query[len] = 0x0; +// rt_kprintf("Query: %s\n", &query[100]); - do - { + do + { #if defined(RT_LWIP_DNS) - ret = netconn_gethostbyname("members.dyndns.org", &server_ip); - if (ret != ERR_OK) - { - break; - } + ret = netconn_gethostbyname("members.dyndns.org", &server_ip); + if (ret != ERR_OK) + { + break; + } #else - IP4_ADDR(&server_ip, 204,13,248,112); // IP address of "members.dyndns.org" + IP4_ADDR(&server_ip, 204,13,248,112); // IP address of "members.dyndns.org" #endif - conn = netconn_new(NETCONN_TCP); - if (conn == NULL) - { - break; - } + conn = netconn_new(NETCONN_TCP); + if (conn == NULL) + { + break; + } - ret = netconn_connect(conn, &server_ip, 80); - if (ret != ERR_OK) - { - break; - } + ret = netconn_connect(conn, &server_ip, 80); + if (ret != ERR_OK) + { + break; + } - /* Send the query */ - ret = netconn_write(conn, query, len, 0); - if (ret != ERR_OK) - { - break; - } + /* Send the query */ + ret = netconn_write(conn, query, len, 0); + if (ret != ERR_OK) + { + break; + } - /* Get the response */ - buf = netconn_recv(conn); - if (buf != NULL) - { - ret = netbuf_data(buf, (void **)&rq, &len); - if (ret != ERR_OK) - { - break; - } + /* Get the response */ + buf = netconn_recv(conn); + if (buf != NULL) + { + ret = netbuf_data(buf, (void **)&rq, &len); + if (ret != ERR_OK) + { + break; + } - /* Find the result */ - rq = rt_strstr(rq, find); - if (rq == RT_NULL) - { - break; - } -// rt_kprintf("[%s]\n", rq); - } - else - { - break; - } + /* Find the result */ + rq = rt_strstr(rq, find); + if (rq == RT_NULL) + { + break; + } +// rt_kprintf("[%s]\n", rq); + } + else + { + break; + } - netconn_delete(conn); - netbuf_delete(buf); - return RT_EOK; - } while (0); + netconn_delete(conn); + netbuf_delete(buf); + return RT_EOK; + } while (0); - netconn_delete(conn); - netbuf_delete(buf); - return -RT_ERROR; + netconn_delete(conn); + netbuf_delete(buf); + return -RT_ERROR; } void update_myip(char *ip) { - rt_kprintf("Update host, \"%s\", to new IP address %s: ", hostName, ip); + rt_kprintf("Update host, \"%s\", to new IP address %s: ", hostName, ip); - if (update_ip(ip) != RT_EOK) - { - rt_kprintf("failed!\n"); - return; - } + if (update_ip(ip) != RT_EOK) + { + rt_kprintf("failed!\n"); + return; + } - rt_kprintf("succeeded.\n", ip); + rt_kprintf("succeeded.\n", ip); } FINSH_FUNCTION_EXPORT(update_myip, update DDNS with specified IP address.) diff --git a/bsp/efm32/drv_ethernet.h b/bsp/efm32/drv_ethernet.h index 146182f86d..87e12493f6 100644 --- a/bsp/efm32/drv_ethernet.h +++ b/bsp/efm32/drv_ethernet.h @@ -1,11 +1,11 @@ /***************************************************************************//** - * @file drv_ethernet.h - * @brief Ethernet driver (SPI mode) of RT-Thread RTOS for using EFM32 USART + * @file drv_ethernet.h + * @brief Ethernet driver (SPI mode) of RT-Thread RTOS for using EFM32 USART * module - * This driver is tested by using the Microchip ENC28J60 stand-alone Ethernet + * This driver is tested by using the Microchip ENC28J60 stand-alone Ethernet * controller with SPI interface. * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -13,8 +13,8 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes - * 2011-06-22 onelife Initial creation for using EFM32 USART module + * Date Author Notes + * 2011-06-22 onelife Initial creation for using EFM32 USART module ******************************************************************************/ #ifndef __DEV_ETHERNET_H__ #define __DEV_ETHERNET_H__ @@ -25,18 +25,18 @@ /* Exported types ------------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/ -#define ETH_ADDR_LEN (6) -#define ETH_CLK_MAX (10000000) /* Should be more than 8 Mz (Errata 1) */ +#define ETH_ADDR_LEN (6) +#define ETH_CLK_MAX (10000000) /* Should be more than 8 Mz (Errata 1) */ //#define ETH_HALF_DUPLEX -#define ETH_PERIOD_WAIT_INIT (RT_TICK_PER_SECOND/100) -#define ETH_PERIOD_WAIT_TX (RT_TICK_PER_SECOND/100) -#define ETH_SPI_RX_SKIP (1) +#define ETH_PERIOD_WAIT_INIT (RT_TICK_PER_SECOND/100) +#define ETH_PERIOD_WAIT_TX (RT_TICK_PER_SECOND/100) +#define ETH_SPI_RX_SKIP (1) -#define ETH_RESET_PORT (gpioPortB) -#define ETH_RESET_PIN (9) -#define ETH_INT_PORT (gpioPortB) -#define ETH_INT_PIN (10) +#define ETH_RESET_PORT (gpioPortB) +#define ETH_RESET_PIN (9) +#define ETH_INT_PORT (gpioPortB) +#define ETH_INT_PIN (10) /* Exported functions ------------------------------------------------------- */ rt_err_t efm_hw_eth_init(void); diff --git a/bsp/efm32/drv_leuart.c b/bsp/efm32/drv_leuart.c index 23addb48a9..7422956003 100644 --- a/bsp/efm32/drv_leuart.c +++ b/bsp/efm32/drv_leuart.c @@ -1,8 +1,8 @@ /***************************************************************************//** - * @file drv_leuart.c - * @brief LEUART driver of RT-Thread RTOS for EFM32 + * @file drv_leuart.c + * @brief LEUART driver of RT-Thread RTOS for EFM32 * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -10,9 +10,9 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes - * 2011-12-09 onelife Initial creation for EFM32 - * 2011-12-27 onelife Utilize "LEUART_PRESENT" and "LEUART_COUNT" + * Date Author Notes + * 2011-12-09 onelife Initial creation for EFM32 + * 2011-12-27 onelife Utilize "LEUART_PRESENT" and "LEUART_COUNT" ******************************************************************************/ /***************************************************************************//** @@ -41,10 +41,10 @@ /* Private variables ---------------------------------------------------------*/ #if defined(RT_USING_LEUART0) #if (RT_USING_LEUART0 >= EFM32_LEUART_LOCATION_COUNT) - #error "Wrong location number" + #error "Wrong location number" #endif - struct rt_device leuart0_device; - static struct rt_semaphore leuart0_lock; + struct rt_device leuart0_device; + static struct rt_semaphore leuart0_lock; #endif #if defined(RT_USING_LEUART1) @@ -52,10 +52,10 @@ #error "Wrong unit number" #endif #if (RT_USING_LEUART1 >= EFM32_LEUART_LOCATION_COUNT) - #error "Wrong location number" + #error "Wrong location number" #endif - struct rt_device leuart1_device; - static struct rt_semaphore leuart1_lock; + struct rt_device leuart1_device; + static struct rt_semaphore leuart1_lock; #endif /* Private function prototypes -----------------------------------------------*/ @@ -76,37 +76,37 @@ ******************************************************************************/ static rt_err_t rt_leuart_init (rt_device_t dev) { - struct efm32_leuart_device_t *leuart; + struct efm32_leuart_device_t *leuart; - leuart = (struct efm32_leuart_device_t *)(dev->user_data); + leuart = (struct efm32_leuart_device_t *)(dev->user_data); - if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED)) - { - if (dev->flag & RT_DEVICE_FLAG_DMA_TX) - { - struct efm32_leuart_dma_mode_t *dma_tx; + if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED)) + { + if (dev->flag & RT_DEVICE_FLAG_DMA_TX) + { + struct efm32_leuart_dma_mode_t *dma_tx; - dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode); + dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode); - leuart->state |= LEUART_STATE_RX_BUSY; - } + leuart->state |= LEUART_STATE_RX_BUSY; + } - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - struct efm32_leuart_int_mode_t *int_rx; + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + struct efm32_leuart_int_mode_t *int_rx; - int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode); + int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode); - int_rx->data_ptr = RT_NULL; - } + int_rx->data_ptr = RT_NULL; + } - /* Enable LEUART */ - LEUART_Enable(leuart->leuart_device, leuartEnable); + /* Enable LEUART */ + LEUART_Enable(leuart->leuart_device, leuartEnable); - dev->flag |= RT_DEVICE_FLAG_ACTIVATED; - } + dev->flag |= RT_DEVICE_FLAG_ACTIVATED; + } - return RT_EOK; + return RT_EOK; } /***************************************************************************//** @@ -128,68 +128,68 @@ static rt_err_t rt_leuart_init (rt_device_t dev) ******************************************************************************/ static rt_err_t rt_leuart_open(rt_device_t dev, rt_uint16_t oflag) { - RT_ASSERT(dev != RT_NULL); + RT_ASSERT(dev != RT_NULL); - struct efm32_leuart_device_t *leuart; + struct efm32_leuart_device_t *leuart; - leuart = (struct efm32_leuart_device_t *)(dev->user_data); + leuart = (struct efm32_leuart_device_t *)(dev->user_data); - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - IRQn_Type rxIrq; + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + IRQn_Type rxIrq; - //if (leuart->state & LEUART_STATE_CONSOLE) - { /* Allocate new RX buffer */ - struct efm32_leuart_int_mode_t *int_mode; + //if (leuart->state & LEUART_STATE_CONSOLE) + { /* Allocate new RX buffer */ + struct efm32_leuart_int_mode_t *int_mode; - int_mode = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode); + int_mode = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode); - if ((int_mode->data_ptr = rt_malloc(LEUART_RX_BUFFER_SIZE)) == RT_NULL) - { - leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit); - return -RT_ENOMEM; - } - rt_memset(int_mode->data_ptr, 0, LEUART_RX_BUFFER_SIZE); - int_mode->data_size = LEUART_RX_BUFFER_SIZE; - int_mode->read_index = 0; - int_mode->save_index = 0; - } + if ((int_mode->data_ptr = rt_malloc(LEUART_RX_BUFFER_SIZE)) == RT_NULL) + { + leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit); + return -RT_ENOMEM; + } + rt_memset(int_mode->data_ptr, 0, LEUART_RX_BUFFER_SIZE); + int_mode->data_size = LEUART_RX_BUFFER_SIZE; + int_mode->read_index = 0; + int_mode->save_index = 0; + } - /* Enable RX interrupt */ - leuart->leuart_device->IEN = LEUART_IEN_RXDATAV; + /* Enable RX interrupt */ + leuart->leuart_device->IEN = LEUART_IEN_RXDATAV; - /* Enable IRQ */ - switch (leuart->unit) - { - case 0: + /* Enable IRQ */ + switch (leuart->unit) + { + case 0: rxIrq = LEUART0_IRQn; - break; + break; #if (LEUART_COUNT > 1) - case 1: + case 1: rxIrq = LEUART1_IRQn; - break; + break; #endif } - if (oflag != RT_DEVICE_OFLAG_WRONLY) - { - NVIC_ClearPendingIRQ(rxIrq); - NVIC_SetPriority(rxIrq, EFM32_IRQ_PRI_DEFAULT); - NVIC_EnableIRQ(rxIrq); - } - } + if (oflag != RT_DEVICE_OFLAG_WRONLY) + { + NVIC_ClearPendingIRQ(rxIrq); + NVIC_SetPriority(rxIrq, EFM32_IRQ_PRI_DEFAULT); + NVIC_EnableIRQ(rxIrq); + } + } /* Clear Flag */ leuart->leuart_device->IFC = _LEUART_IFC_MASK; - if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (oflag != RT_DEVICE_OFLAG_RDONLY)) - { - /* DMA IRQ is enabled by DMA_Init() */ - NVIC_SetPriority(DMA_IRQn, EFM32_IRQ_PRI_DEFAULT); - } + if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (oflag != RT_DEVICE_OFLAG_RDONLY)) + { + /* DMA IRQ is enabled by DMA_Init() */ + NVIC_SetPriority(DMA_IRQn, EFM32_IRQ_PRI_DEFAULT); + } - leuart->counter++; - leuart_debug("LEUART%d: Open with flag %x\n", leuart->unit, oflag); - return RT_EOK; + leuart->counter++; + leuart_debug("LEUART%d: Open with flag %x\n", leuart->unit, oflag); + return RT_EOK; } /***************************************************************************//** @@ -208,26 +208,26 @@ static rt_err_t rt_leuart_open(rt_device_t dev, rt_uint16_t oflag) ******************************************************************************/ static rt_err_t rt_leuart_close(rt_device_t dev) { - RT_ASSERT(dev != RT_NULL); + RT_ASSERT(dev != RT_NULL); - struct efm32_leuart_device_t *leuart; + struct efm32_leuart_device_t *leuart; - leuart = (struct efm32_leuart_device_t *)(dev->user_data); + leuart = (struct efm32_leuart_device_t *)(dev->user_data); - if (--leuart->counter == 0) - { - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - struct efm32_leuart_int_mode_t *int_rx; + if (--leuart->counter == 0) + { + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + struct efm32_leuart_int_mode_t *int_rx; - int_rx = (struct efm32_leuart_int_mode_t *)leuart->rx_mode; + int_rx = (struct efm32_leuart_int_mode_t *)leuart->rx_mode; - rt_free(int_rx->data_ptr); - int_rx->data_ptr = RT_NULL; - } - } + rt_free(int_rx->data_ptr); + int_rx->data_ptr = RT_NULL; + } + } - return RT_EOK; + return RT_EOK; } /***************************************************************************//** @@ -254,105 +254,105 @@ static rt_err_t rt_leuart_close(rt_device_t dev) * Number of read bytes ******************************************************************************/ static rt_size_t rt_leuart_read ( - rt_device_t dev, - rt_off_t pos, - void *buffer, - rt_size_t size) + rt_device_t dev, + rt_off_t pos, + void *buffer, + rt_size_t size) { - struct efm32_leuart_device_t *leuart; - rt_uint8_t *ptr; - rt_err_t err_code; - rt_size_t read_len; + struct efm32_leuart_device_t *leuart; + rt_uint8_t *ptr; + rt_err_t err_code; + rt_size_t read_len; - leuart = (struct efm32_leuart_device_t *)(dev->user_data); + leuart = (struct efm32_leuart_device_t *)(dev->user_data); - /* Lock device */ - if (rt_hw_interrupt_check()) - { - err_code = rt_sem_take(leuart->lock, RT_WAITING_NO); - } - else - { - err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER); - } - if (err_code != RT_EOK) - { - rt_set_errno(err_code); - return 0; - } + /* Lock device */ + if (rt_hw_interrupt_check()) + { + err_code = rt_sem_take(leuart->lock, RT_WAITING_NO); + } + else + { + err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER); + } + if (err_code != RT_EOK) + { + rt_set_errno(err_code); + return 0; + } - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - ptr = buffer; + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + ptr = buffer; - /* interrupt mode Rx */ - while (size) - { - rt_base_t level; - struct efm32_leuart_int_mode_t *int_rx; + /* interrupt mode Rx */ + while (size) + { + rt_base_t level; + struct efm32_leuart_int_mode_t *int_rx; - int_rx = (struct efm32_leuart_int_mode_t *)\ - (((struct efm32_leuart_device_t *)(dev->user_data))->rx_mode); + int_rx = (struct efm32_leuart_int_mode_t *)\ + (((struct efm32_leuart_device_t *)(dev->user_data))->rx_mode); - /* disable interrupt */ - level = rt_hw_interrupt_disable(); + /* disable interrupt */ + level = rt_hw_interrupt_disable(); - if (int_rx->read_index != int_rx->save_index) - { - /* read a character */ - *ptr++ = int_rx->data_ptr[int_rx->read_index]; - size--; + if (int_rx->read_index != int_rx->save_index) + { + /* read a character */ + *ptr++ = int_rx->data_ptr[int_rx->read_index]; + size--; - /* move to next position */ - int_rx->read_index ++; - if (int_rx->read_index >= LEUART_RX_BUFFER_SIZE) - { - int_rx->read_index = 0; - } - } - else - { - /* set error code */ - err_code = -RT_EEMPTY; + /* move to next position */ + int_rx->read_index ++; + if (int_rx->read_index >= LEUART_RX_BUFFER_SIZE) + { + int_rx->read_index = 0; + } + } + else + { + /* set error code */ + err_code = -RT_EEMPTY; - /* enable interrupt */ - rt_hw_interrupt_enable(level); - break; - } + /* enable interrupt */ + rt_hw_interrupt_enable(level); + break; + } - /* enable interrupt */ - rt_hw_interrupt_enable(level); - } + /* enable interrupt */ + rt_hw_interrupt_enable(level); + } - read_len = (rt_uint32_t)ptr - (rt_uint32_t)buffer; - } - else - { - LEUART_TypeDef *leuart_device; + read_len = (rt_uint32_t)ptr - (rt_uint32_t)buffer; + } + else + { + LEUART_TypeDef *leuart_device; - leuart = (struct efm32_leuart_device_t *)(dev->user_data); - leuart_device = ((struct efm32_leuart_device_t *)(dev->user_data))->leuart_device; - ptr = buffer; + leuart = (struct efm32_leuart_device_t *)(dev->user_data); + leuart_device = ((struct efm32_leuart_device_t *)(dev->user_data))->leuart_device; + ptr = buffer; - /* polling mode */ - while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size) - { - while (leuart_device->STATUS & LEUART_STATUS_RXDATAV) - { - *ptr = leuart_device->RXDATA & 0xff; - ptr ++; - } - } + /* polling mode */ + while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size) + { + while (leuart_device->STATUS & LEUART_STATUS_RXDATAV) + { + *ptr = leuart_device->RXDATA & 0xff; + ptr ++; + } + } - read_len = size; - } + read_len = size; + } - /* Unlock device */ - rt_sem_release(leuart->lock); + /* Unlock device */ + rt_sem_release(leuart->lock); - /* set error code */ - rt_set_errno(err_code); - return read_len; + /* set error code */ + rt_set_errno(err_code); + return read_len; } /***************************************************************************//** @@ -379,504 +379,504 @@ static rt_size_t rt_leuart_read ( * Number of written bytes ******************************************************************************/ static rt_size_t rt_leuart_write ( - rt_device_t dev, - rt_off_t pos, - const void* buffer, - rt_size_t size) + rt_device_t dev, + rt_off_t pos, + const void* buffer, + rt_size_t size) { - rt_err_t err_code; - rt_size_t write_size; - struct efm32_leuart_device_t* leuart; + rt_err_t err_code; + rt_size_t write_size; + struct efm32_leuart_device_t* leuart; - write_size = 0; - leuart = (struct efm32_leuart_device_t*)(dev->user_data); + write_size = 0; + leuart = (struct efm32_leuart_device_t*)(dev->user_data); - /* Lock device */ - if (rt_hw_interrupt_check()) - { - err_code = rt_sem_take(leuart->lock, RT_WAITING_NO); - } - else - { - err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER); - } - if (err_code != RT_EOK) - { - rt_set_errno(err_code); - return 0; - } + /* Lock device */ + if (rt_hw_interrupt_check()) + { + err_code = rt_sem_take(leuart->lock, RT_WAITING_NO); + } + else + { + err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER); + } + if (err_code != RT_EOK) + { + rt_set_errno(err_code); + return 0; + } - if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (size > 2)) - { /* DMA mode Tx */ - struct efm32_leuart_dma_mode_t *dma_tx; + if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (size > 2)) + { /* DMA mode Tx */ + struct efm32_leuart_dma_mode_t *dma_tx; - if (dev->flag & RT_DEVICE_FLAG_STREAM) - { - if (*((rt_uint8_t *)buffer + size - 1) == '\n') - { - *((rt_uint8_t *)buffer + size - 1) = '\r'; - *((rt_uint8_t *)buffer + size++) = '\n'; - *((rt_uint8_t *)buffer + size) = 0; - } - } + if (dev->flag & RT_DEVICE_FLAG_STREAM) + { + if (*((rt_uint8_t *)buffer + size - 1) == '\n') + { + *((rt_uint8_t *)buffer + size - 1) = '\r'; + *((rt_uint8_t *)buffer + size++) = '\n'; + *((rt_uint8_t *)buffer + size) = 0; + } + } - dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode); - dma_tx->data_ptr = (rt_uint32_t *)buffer; - dma_tx->data_size = size; + dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode); + dma_tx->data_ptr = (rt_uint32_t *)buffer; + dma_tx->data_size = size; - leuart->state |= LEUART_STATE_TX_BUSY; + leuart->state |= LEUART_STATE_TX_BUSY; - DMA_ActivateBasic( - dma_tx->dma_channel, - true, - false, - (void *)&(leuart->leuart_device->TXDATA), - (void *)buffer, - (rt_uint32_t)(size - 1)); + DMA_ActivateBasic( + dma_tx->dma_channel, + true, + false, + (void *)&(leuart->leuart_device->TXDATA), + (void *)buffer, + (rt_uint32_t)(size - 1)); - /* Wait, otherwise the TX buffer is overwrite */ -// if (leuart->state & LEUART_STATE_CONSOLE) -// { - while(leuart->state & LEUART_STATE_TX_BUSY); -// } -// else -// { -// while(leuart->state & LEUART_STATE_TX_BUSY) -// { -// rt_thread_sleep(LEUART_WAIT_TIME_TX); -// } -// } + /* Wait, otherwise the TX buffer is overwrite */ +// if (leuart->state & LEUART_STATE_CONSOLE) +// { + while(leuart->state & LEUART_STATE_TX_BUSY); +// } +// else +// { +// while(leuart->state & LEUART_STATE_TX_BUSY) +// { +// rt_thread_sleep(LEUART_WAIT_TIME_TX); +// } +// } // TODO: This function blocks the process - write_size = size; - } - else - { /* polling mode */ - rt_uint8_t *ptr = (rt_uint8_t *)buffer; + write_size = size; + } + else + { /* polling mode */ + rt_uint8_t *ptr = (rt_uint8_t *)buffer; - if (dev->flag & RT_DEVICE_FLAG_STREAM) - { - /* stream mode */ - while (size) - { - if (*ptr == '\n') - { - while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL)); - leuart->leuart_device->TXDATA = '\r'; - } + if (dev->flag & RT_DEVICE_FLAG_STREAM) + { + /* stream mode */ + while (size) + { + if (*ptr == '\n') + { + while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL)); + leuart->leuart_device->TXDATA = '\r'; + } - while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL)); - leuart->leuart_device->TXDATA = (rt_uint32_t)*ptr; - ++ptr; --size; - } - } - else - { - /* write data directly */ - while (size) - { - while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL)); - leuart->leuart_device->TXDATA = (rt_uint32_t)*ptr; - ++ptr; --size; - } - } + while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL)); + leuart->leuart_device->TXDATA = (rt_uint32_t)*ptr; + ++ptr; --size; + } + } + else + { + /* write data directly */ + while (size) + { + while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL)); + leuart->leuart_device->TXDATA = (rt_uint32_t)*ptr; + ++ptr; --size; + } + } - write_size = (rt_size_t)ptr - (rt_size_t)buffer; - } + write_size = (rt_size_t)ptr - (rt_size_t)buffer; + } - /* Unlock device */ - rt_sem_release(leuart->lock); + /* Unlock device */ + rt_sem_release(leuart->lock); - /* set error code */ - rt_set_errno(err_code); - return write_size; + /* set error code */ + rt_set_errno(err_code); + return write_size; } /***************************************************************************//** * @brief -* Configure LEUART device +* Configure LEUART device * * @details * * @note * * @param[in] dev -* Pointer to device descriptor +* Pointer to device descriptor * * @param[in] cmd -* IIC control command +* IIC control command * * @param[in] args -* Arguments +* Arguments * * @return -* Error code +* Error code ******************************************************************************/ static rt_err_t rt_leuart_control ( - rt_device_t dev, - rt_uint8_t cmd, - void *args) + rt_device_t dev, + rt_uint8_t cmd, + void *args) { - RT_ASSERT(dev != RT_NULL); + RT_ASSERT(dev != RT_NULL); - rt_err_t err_code; - struct efm32_leuart_device_t *leuart; + rt_err_t err_code; + struct efm32_leuart_device_t *leuart; - leuart = (struct efm32_leuart_device_t *)(dev->user_data); + leuart = (struct efm32_leuart_device_t *)(dev->user_data); - /* Lock device */ - if (rt_hw_interrupt_check()) - { - err_code = rt_sem_take(leuart->lock, RT_WAITING_NO); - } - else - { - err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER); - } - if (err_code != RT_EOK) - { - return err_code; - } + /* Lock device */ + if (rt_hw_interrupt_check()) + { + err_code = rt_sem_take(leuart->lock, RT_WAITING_NO); + } + else + { + err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER); + } + if (err_code != RT_EOK) + { + return err_code; + } - switch (cmd) - { - case RT_DEVICE_CTRL_SUSPEND: - /* Suspend device */ - dev->flag |= RT_DEVICE_FLAG_SUSPENDED; - LEUART_Enable(leuart->leuart_device, leuartDisable); - break; + switch (cmd) + { + case RT_DEVICE_CTRL_SUSPEND: + /* Suspend device */ + dev->flag |= RT_DEVICE_FLAG_SUSPENDED; + LEUART_Enable(leuart->leuart_device, leuartDisable); + break; - case RT_DEVICE_CTRL_RESUME: - /* Resume device */ - dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED; - LEUART_Enable(leuart->leuart_device, leuartEnable); - break; + case RT_DEVICE_CTRL_RESUME: + /* Resume device */ + dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED; + LEUART_Enable(leuart->leuart_device, leuartEnable); + break; - case RT_DEVICE_CTRL_LEUART_RBUFFER: - /* Set RX buffer */ - { - struct efm32_leuart_int_mode_t *int_rx; - rt_uint8_t size; + case RT_DEVICE_CTRL_LEUART_RBUFFER: + /* Set RX buffer */ + { + struct efm32_leuart_int_mode_t *int_rx; + rt_uint8_t size; - int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode); - size = (rt_uint8_t)((rt_uint32_t)args & 0xFFUL); + int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode); + size = (rt_uint8_t)((rt_uint32_t)args & 0xFFUL); - /* Free previous RX buffer */ - if (int_rx->data_ptr != RT_NULL) - { - if (size == 0) - { /* Free RX buffer */ - rt_free(int_rx->data_ptr); - int_rx->data_ptr = RT_NULL; - } - else if (size != int_rx->data_size) - { - /* Re-allocate RX buffer */ - if ((int_rx->data_ptr = rt_realloc(int_rx->data_ptr, size)) \ - == RT_NULL) - { - leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit); - err_code = -RT_ENOMEM; - break; - } - // TODO: Is the following line necessary? - //rt_memset(int_rx->data_ptr, 0, size); - } - } - else - { - /* Allocate new RX buffer */ - if ((int_rx->data_ptr = rt_malloc(size)) == RT_NULL) - { - leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit); - err_code = -RT_ENOMEM; - break; - } - } - int_rx->data_size = size; - int_rx->read_index = 0; - int_rx->save_index = 0; - } - break; + /* Free previous RX buffer */ + if (int_rx->data_ptr != RT_NULL) + { + if (size == 0) + { /* Free RX buffer */ + rt_free(int_rx->data_ptr); + int_rx->data_ptr = RT_NULL; + } + else if (size != int_rx->data_size) + { + /* Re-allocate RX buffer */ + if ((int_rx->data_ptr = rt_realloc(int_rx->data_ptr, size)) \ + == RT_NULL) + { + leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit); + err_code = -RT_ENOMEM; + break; + } + // TODO: Is the following line necessary? + //rt_memset(int_rx->data_ptr, 0, size); + } + } + else + { + /* Allocate new RX buffer */ + if ((int_rx->data_ptr = rt_malloc(size)) == RT_NULL) + { + leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit); + err_code = -RT_ENOMEM; + break; + } + } + int_rx->data_size = size; + int_rx->read_index = 0; + int_rx->save_index = 0; + } + break; - } + } - /* Unlock device */ - rt_sem_release(leuart->lock); + /* Unlock device */ + rt_sem_release(leuart->lock); - return err_code; + return err_code; } /***************************************************************************//** * @brief - * LEUART RX data valid interrupt handler + * LEUART RX data valid interrupt handler * * @details * * @note * * @param[in] dev - * Pointer to device descriptor + * Pointer to device descriptor ******************************************************************************/ void rt_hw_leuart_rx_isr(rt_device_t dev) { - struct efm32_leuart_device_t *leuart; - struct efm32_leuart_int_mode_t *int_rx; + struct efm32_leuart_device_t *leuart; + struct efm32_leuart_int_mode_t *int_rx; rt_uint32_t flag; - /* interrupt mode receive */ - RT_ASSERT(dev->flag & RT_DEVICE_FLAG_INT_RX); + /* interrupt mode receive */ + RT_ASSERT(dev->flag & RT_DEVICE_FLAG_INT_RX); - leuart = (struct efm32_leuart_device_t *)(dev->user_data); - int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode); + leuart = (struct efm32_leuart_device_t *)(dev->user_data); + int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode); - RT_ASSERT(int_rx->data_ptr != RT_NULL); + RT_ASSERT(int_rx->data_ptr != RT_NULL); - /* Set status */ - leuart->state |= LEUART_STATE_RX_BUSY; + /* Set status */ + leuart->state |= LEUART_STATE_RX_BUSY; - /* save into rx buffer */ - while (leuart->leuart_device->STATUS & LEUART_STATUS_RXDATAV) - { - rt_base_t level; + /* save into rx buffer */ + while (leuart->leuart_device->STATUS & LEUART_STATUS_RXDATAV) + { + rt_base_t level; - /* disable interrupt */ - level = rt_hw_interrupt_disable(); + /* disable interrupt */ + level = rt_hw_interrupt_disable(); - /* save character */ - int_rx->data_ptr[int_rx->save_index] = \ - (rt_uint8_t)(leuart->leuart_device->RXDATA & 0xFFUL); - int_rx->save_index ++; - if (int_rx->save_index >= LEUART_RX_BUFFER_SIZE) - int_rx->save_index = 0; + /* save character */ + int_rx->data_ptr[int_rx->save_index] = \ + (rt_uint8_t)(leuart->leuart_device->RXDATA & 0xFFUL); + int_rx->save_index ++; + if (int_rx->save_index >= LEUART_RX_BUFFER_SIZE) + int_rx->save_index = 0; - /* if the next position is read index, discard this 'read char' */ - if (int_rx->save_index == int_rx->read_index) - { - int_rx->read_index ++; - if (int_rx->read_index >= LEUART_RX_BUFFER_SIZE) - { - int_rx->read_index = 0; - } - } + /* if the next position is read index, discard this 'read char' */ + if (int_rx->save_index == int_rx->read_index) + { + int_rx->read_index ++; + if (int_rx->read_index >= LEUART_RX_BUFFER_SIZE) + { + int_rx->read_index = 0; + } + } - /* enable interrupt */ - rt_hw_interrupt_enable(level); - } + /* enable interrupt */ + rt_hw_interrupt_enable(level); + } - /* invoke callback */ - if (dev->rx_indicate != RT_NULL) - { - rt_size_t rx_length; + /* invoke callback */ + if (dev->rx_indicate != RT_NULL) + { + rt_size_t rx_length; - /* get rx length */ - rx_length = int_rx->read_index > int_rx->save_index ? - LEUART_RX_BUFFER_SIZE - int_rx->read_index + int_rx->save_index : \ - int_rx->save_index - int_rx->read_index; + /* get rx length */ + rx_length = int_rx->read_index > int_rx->save_index ? + LEUART_RX_BUFFER_SIZE - int_rx->read_index + int_rx->save_index : \ + int_rx->save_index - int_rx->read_index; - dev->rx_indicate(dev, rx_length); - } + dev->rx_indicate(dev, rx_length); + } } /***************************************************************************//** * @brief - * DMA for LEUART TX interrupt handler + * DMA for LEUART TX interrupt handler * * @details * * @note * * @param[in] dev - * Pointer to device descriptor + * Pointer to device descriptor ******************************************************************************/ void rt_hw_leuart_dma_tx_isr(rt_device_t dev) { - /* DMA mode receive */ - struct efm32_leuart_device_t *leuart; - struct efm32_leuart_dma_mode_t *dma_tx; + /* DMA mode receive */ + struct efm32_leuart_device_t *leuart; + struct efm32_leuart_dma_mode_t *dma_tx; - RT_ASSERT(dev->flag & RT_DEVICE_FLAG_DMA_TX); + RT_ASSERT(dev->flag & RT_DEVICE_FLAG_DMA_TX); - leuart = (struct efm32_leuart_device_t *)(dev->user_data); - dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode); + leuart = (struct efm32_leuart_device_t *)(dev->user_data); + dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode); - /* invoke call to notify tx complete */ - if (dev->tx_complete != RT_NULL) - { - dev->tx_complete(dev, dma_tx->data_ptr); - } + /* invoke call to notify tx complete */ + if (dev->tx_complete != RT_NULL) + { + dev->tx_complete(dev, dma_tx->data_ptr); + } - /* Set status */ - leuart->state &= ~(rt_uint32_t)LEUART_STATE_TX_BUSY; + /* Set status */ + leuart->state &= ~(rt_uint32_t)LEUART_STATE_TX_BUSY; } /***************************************************************************//** * @brief -* Register LEUART device +* Register LEUART device * * @details * * @note * * @param[in] device -* Pointer to device descriptor +* Pointer to device descriptor * * @param[in] name -* Device name +* Device name * * @param[in] flag -* Configuration flags +* Configuration flags * * @param[in] leuart -* Pointer to LEUART device descriptor +* Pointer to LEUART device descriptor * * @return -* Error code +* Error code ******************************************************************************/ rt_err_t rt_hw_leuart_register( - rt_device_t device, - const char *name, - rt_uint32_t flag, - struct efm32_leuart_device_t *leuart) + rt_device_t device, + const char *name, + rt_uint32_t flag, + struct efm32_leuart_device_t *leuart) { - RT_ASSERT(device != RT_NULL); + RT_ASSERT(device != RT_NULL); - if ((flag & RT_DEVICE_FLAG_DMA_RX) || - (flag & RT_DEVICE_FLAG_INT_TX)) - { - RT_ASSERT(0); - } + if ((flag & RT_DEVICE_FLAG_DMA_RX) || + (flag & RT_DEVICE_FLAG_INT_TX)) + { + RT_ASSERT(0); + } - device->type = RT_Device_Class_Char; - device->rx_indicate = RT_NULL; - device->tx_complete = RT_NULL; - device->init = rt_leuart_init; - device->open = rt_leuart_open; - device->close = rt_leuart_close; - device->read = rt_leuart_read; - device->write = rt_leuart_write; - device->control = rt_leuart_control; - device->user_data = leuart; + device->type = RT_Device_Class_Char; + device->rx_indicate = RT_NULL; + device->tx_complete = RT_NULL; + device->init = rt_leuart_init; + device->open = rt_leuart_open; + device->close = rt_leuart_close; + device->read = rt_leuart_read; + device->write = rt_leuart_write; + device->control = rt_leuart_control; + device->user_data = leuart; - /* register a character device */ - return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag); + /* register a character device */ + return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag); } /***************************************************************************//** * @brief -* Initialize the specified LEUART unit +* Initialize the specified LEUART unit * * @details * * @note * * @param[in] device -* Pointer to device descriptor +* Pointer to device descriptor * * @param[in] unitNumber -* Unit number +* Unit number * * @param[in] location -* Pin location number +* Pin location number * * @param[in] flag -* Configuration flag +* Configuration flag * * @param[in] dmaChannel -* DMA channel number for TX +* DMA channel number for TX * * @param[in] console -* Indicate if using as console +* Indicate if using as console * * @return -* Pointer to LEUART device +* Pointer to LEUART device ******************************************************************************/ static struct efm32_leuart_device_t *rt_hw_leuart_unit_init( - rt_device_t device, - rt_uint8_t unitNumber, - rt_uint8_t location, - rt_uint32_t flag, - rt_uint32_t dmaChannel, - rt_uint8_t config) + rt_device_t device, + rt_uint8_t unitNumber, + rt_uint8_t location, + rt_uint32_t flag, + rt_uint32_t dmaChannel, + rt_uint8_t config) { - struct efm32_leuart_device_t *leuart; - struct efm32_leuart_dma_mode_t *dma_mode; - DMA_CB_TypeDef *callback; - CMU_Clock_TypeDef leuartClock; - rt_uint32_t txDmaSelect; - GPIO_Port_TypeDef port_tx, port_rx, port_clk, port_cs; - rt_uint32_t pin_tx, pin_rx, pin_clk, pin_cs; + struct efm32_leuart_device_t *leuart; + struct efm32_leuart_dma_mode_t *dma_mode; + DMA_CB_TypeDef *callback; + CMU_Clock_TypeDef leuartClock; + rt_uint32_t txDmaSelect; + GPIO_Port_TypeDef port_tx, port_rx, port_clk, port_cs; + rt_uint32_t pin_tx, pin_rx, pin_clk, pin_cs; LEUART_Init_TypeDef init = LEUART_INIT_DEFAULT; - efm32_irq_hook_init_t hook; + efm32_irq_hook_init_t hook; - do - { - /* Allocate device */ - leuart = rt_malloc(sizeof(struct efm32_leuart_device_t)); - if (leuart == RT_NULL) - { - leuart_debug("LEUART%d err: no mem\n", unitNumber); - break; - } - leuart->counter = 0; - leuart->unit = unitNumber; - leuart->state = config; - leuart->tx_mode = RT_NULL; - leuart->rx_mode = RT_NULL; + do + { + /* Allocate device */ + leuart = rt_malloc(sizeof(struct efm32_leuart_device_t)); + if (leuart == RT_NULL) + { + leuart_debug("LEUART%d err: no mem\n", unitNumber); + break; + } + leuart->counter = 0; + leuart->unit = unitNumber; + leuart->state = config; + leuart->tx_mode = RT_NULL; + leuart->rx_mode = RT_NULL; - /* Allocate TX */ - dma_mode = RT_NULL; - if (flag & RT_DEVICE_FLAG_DMA_TX) - { - leuart->tx_mode = dma_mode = rt_malloc(sizeof(struct efm32_leuart_dma_mode_t)); - if (dma_mode == RT_NULL) - { - leuart_debug("LEUART%d err: no mem for DMA TX\n", unitNumber); - break; - } - dma_mode->dma_channel = dmaChannel; - } + /* Allocate TX */ + dma_mode = RT_NULL; + if (flag & RT_DEVICE_FLAG_DMA_TX) + { + leuart->tx_mode = dma_mode = rt_malloc(sizeof(struct efm32_leuart_dma_mode_t)); + if (dma_mode == RT_NULL) + { + leuart_debug("LEUART%d err: no mem for DMA TX\n", unitNumber); + break; + } + dma_mode->dma_channel = dmaChannel; + } - /* Allocate RX */ - if (flag & RT_DEVICE_FLAG_INT_RX) - { - leuart->rx_mode = rt_malloc(sizeof(struct efm32_leuart_int_mode_t)); - if (leuart->rx_mode == RT_NULL) - { - leuart_debug("LEUART%d err: no mem for INT RX\n, unitNumber"); - break; - } - } + /* Allocate RX */ + if (flag & RT_DEVICE_FLAG_INT_RX) + { + leuart->rx_mode = rt_malloc(sizeof(struct efm32_leuart_int_mode_t)); + if (leuart->rx_mode == RT_NULL) + { + leuart_debug("LEUART%d err: no mem for INT RX\n, unitNumber"); + break; + } + } - /* Initialization */ - if (unitNumber >= LEUART_COUNT) - { - break; - } - switch (unitNumber) - { - case 0: - leuart->leuart_device = LEUART0; - leuartClock = (CMU_Clock_TypeDef)cmuClock_LEUART0; - txDmaSelect = DMAREQ_LEUART0_TXBL; - port_tx = AF_LEUART0_TX_PORT(location); - pin_tx = AF_LEUART0_TX_PIN(location); - port_rx = AF_LEUART0_RX_PORT(location); - pin_rx = AF_LEUART0_RX_PIN(location); - break; + /* Initialization */ + if (unitNumber >= LEUART_COUNT) + { + break; + } + switch (unitNumber) + { + case 0: + leuart->leuart_device = LEUART0; + leuartClock = (CMU_Clock_TypeDef)cmuClock_LEUART0; + txDmaSelect = DMAREQ_LEUART0_TXBL; + port_tx = AF_LEUART0_TX_PORT(location); + pin_tx = AF_LEUART0_TX_PIN(location); + port_rx = AF_LEUART0_RX_PORT(location); + pin_rx = AF_LEUART0_RX_PIN(location); + break; #if (LEUART_COUNT > 1) - case 1: - leuart->leuart_device = LEUART1; - leuartClock = (CMU_Clock_TypeDef)cmuClock_LEUART1; - txDmaSelect = DMAREQ_LEUART1_TXBL; - port_tx = AF_LEUART1_TX_PORT(location); - pin_tx = AF_LEUART1_TX_PIN(location); - port_rx = AF_LEUART1_RX_PORT(location); - pin_rx = AF_LEUART1_RX_PIN(location); - break; + case 1: + leuart->leuart_device = LEUART1; + leuartClock = (CMU_Clock_TypeDef)cmuClock_LEUART1; + txDmaSelect = DMAREQ_LEUART1_TXBL; + port_tx = AF_LEUART1_TX_PORT(location); + pin_tx = AF_LEUART1_TX_PIN(location); + port_rx = AF_LEUART1_RX_PORT(location); + pin_rx = AF_LEUART1_RX_PIN(location); + break; #endif - default: - break; - } + default: + break; + } /* Do not prescale clock */ CMU_ClockDivSet(leuartClock, cmuClkDiv_1); @@ -884,98 +884,98 @@ static struct efm32_leuart_device_t *rt_hw_leuart_unit_init( /* Enable LEUART clock */ CMU_ClockEnable(leuartClock, true); - /* Config GPIO */ - GPIO_PinModeSet( - port_tx, - pin_tx, - gpioModePushPull, - 0); - GPIO_PinModeSet( - port_rx, - pin_rx, - gpioModeInputPull, - 1); + /* Config GPIO */ + GPIO_PinModeSet( + port_tx, + pin_tx, + gpioModePushPull, + 0); + GPIO_PinModeSet( + port_rx, + pin_rx, + gpioModeInputPull, + 1); - /* Config interrupt and NVIC */ - if (flag & RT_DEVICE_FLAG_INT_RX) - { - hook.type = efm32_irq_type_leuart; - hook.unit = unitNumber; - hook.cbFunc = rt_hw_leuart_rx_isr; - hook.userPtr = device; - efm32_irq_hook_register(&hook); - } + /* Config interrupt and NVIC */ + if (flag & RT_DEVICE_FLAG_INT_RX) + { + hook.type = efm32_irq_type_leuart; + hook.unit = unitNumber; + hook.cbFunc = rt_hw_leuart_rx_isr; + hook.userPtr = device; + efm32_irq_hook_register(&hook); + } - /* Config DMA */ - if (flag & RT_DEVICE_FLAG_DMA_TX) - { - DMA_CfgChannel_TypeDef chnlCfg; - DMA_CfgDescr_TypeDef descrCfg; + /* Config DMA */ + if (flag & RT_DEVICE_FLAG_DMA_TX) + { + DMA_CfgChannel_TypeDef chnlCfg; + DMA_CfgDescr_TypeDef descrCfg; - hook.type = efm32_irq_type_dma; - hook.unit = dmaChannel; - hook.cbFunc = rt_hw_leuart_dma_tx_isr; - hook.userPtr = device; - efm32_irq_hook_register(&hook); + hook.type = efm32_irq_type_dma; + hook.unit = dmaChannel; + hook.cbFunc = rt_hw_leuart_dma_tx_isr; + hook.userPtr = device; + efm32_irq_hook_register(&hook); - callback = (DMA_CB_TypeDef *)rt_malloc(sizeof(DMA_CB_TypeDef)); - if (callback == RT_NULL) - { - leuart_debug("LEUART%d err: no mem for callback\n", unitNumber); - break; - } - callback->cbFunc = DMA_IRQHandler_All; - callback->userPtr = RT_NULL; - callback->primary = 0; + callback = (DMA_CB_TypeDef *)rt_malloc(sizeof(DMA_CB_TypeDef)); + if (callback == RT_NULL) + { + leuart_debug("LEUART%d err: no mem for callback\n", unitNumber); + break; + } + callback->cbFunc = DMA_IRQHandler_All; + callback->userPtr = RT_NULL; + callback->primary = 0; - /* Setting up DMA channel */ - chnlCfg.highPri = false; /* Can't use with peripherals */ - chnlCfg.enableInt = true; /* Interrupt for callback function */ - chnlCfg.select = txDmaSelect; - chnlCfg.cb = callback; - DMA_CfgChannel(dmaChannel, &chnlCfg); + /* Setting up DMA channel */ + chnlCfg.highPri = false; /* Can't use with peripherals */ + chnlCfg.enableInt = true; /* Interrupt for callback function */ + chnlCfg.select = txDmaSelect; + chnlCfg.cb = callback; + DMA_CfgChannel(dmaChannel, &chnlCfg); - /* Setting up DMA channel descriptor */ - descrCfg.dstInc = dmaDataIncNone; - descrCfg.srcInc = dmaDataInc1; - descrCfg.size = dmaDataSize1; - descrCfg.arbRate = dmaArbitrate1; - descrCfg.hprot = 0; - DMA_CfgDescr(dmaChannel, true, &descrCfg); - } + /* Setting up DMA channel descriptor */ + descrCfg.dstInc = dmaDataIncNone; + descrCfg.srcInc = dmaDataInc1; + descrCfg.size = dmaDataSize1; + descrCfg.arbRate = dmaArbitrate1; + descrCfg.hprot = 0; + DMA_CfgDescr(dmaChannel, true, &descrCfg); + } - /* Init specified LEUART unit */ + /* Init specified LEUART unit */ LEUART_Init(leuart->leuart_device, &init); - /* Enable RX and TX pins and set location */ - leuart->leuart_device->ROUTE = LEUART_ROUTE_RXPEN | LEUART_ROUTE_TXPEN | \ - (location << _LEUART_ROUTE_LOCATION_SHIFT); + /* Enable RX and TX pins and set location */ + leuart->leuart_device->ROUTE = LEUART_ROUTE_RXPEN | LEUART_ROUTE_TXPEN | \ + (location << _LEUART_ROUTE_LOCATION_SHIFT); - /* Clear RX/TX buffers */ - leuart->leuart_device->CMD = LEUART_CMD_CLEARRX | LEUART_CMD_CLEARTX; + /* Clear RX/TX buffers */ + leuart->leuart_device->CMD = LEUART_CMD_CLEARRX | LEUART_CMD_CLEARTX; - return leuart; - } while(0); + return leuart; + } while(0); - if (leuart->rx_mode) - { - rt_free(leuart->rx_mode); - } - if (leuart->tx_mode) - { - rt_free(leuart->tx_mode); - } - if (leuart) - { - rt_free(leuart); - } - if (callback) - { - rt_free(leuart); - } + if (leuart->rx_mode) + { + rt_free(leuart->rx_mode); + } + if (leuart->tx_mode) + { + rt_free(leuart->tx_mode); + } + if (leuart) + { + rt_free(leuart); + } + if (callback) + { + rt_free(leuart); + } leuart_debug("LEUART%d err: init failed!\n", unitNumber); - return RT_NULL; + return RT_NULL; } /***************************************************************************//** @@ -989,12 +989,12 @@ static struct efm32_leuart_device_t *rt_hw_leuart_unit_init( ******************************************************************************/ void rt_hw_leuart_init(void) { - struct efm32_leuart_device_t *leuart; - rt_uint32_t flag; - rt_uint8_t config; + struct efm32_leuart_device_t *leuart; + rt_uint32_t flag; + rt_uint8_t config; - do - { + do + { #ifdef RT_USING_LEUART0 config = 0; flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX; @@ -1073,11 +1073,11 @@ void rt_hw_leuart_init(void) } #endif - leuart_debug("LEUART: H/W init OK!\n"); - return; - } while (0); + leuart_debug("LEUART: H/W init OK!\n"); + return; + } while (0); - rt_kprintf("LEUART: H/W init failed!\n"); + rt_kprintf("LEUART: H/W init failed!\n"); } #endif /* (defined(RT_USING_LEUART0) || defined(RT_USING_LEUART1)) */ diff --git a/bsp/efm32/drv_leuart.h b/bsp/efm32/drv_leuart.h index 692ff0d520..b7c24bb025 100644 --- a/bsp/efm32/drv_leuart.h +++ b/bsp/efm32/drv_leuart.h @@ -1,8 +1,8 @@ /***************************************************************************//** - * @file drv_leuart.h - * @brief LEUART driver of RT-Thread RTOS for EFM32 + * @file drv_leuart.h + * @brief LEUART driver of RT-Thread RTOS for EFM32 * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -10,8 +10,8 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes - * 2011-12-09 onelife Initial creation for EFM32 + * Date Author Notes + * 2011-12-09 onelife Initial creation for EFM32 ******************************************************************************/ #ifndef __DRV_LEUSART_H__ #define __DRV_LEUSART_H__ @@ -20,37 +20,37 @@ /* Exported types ------------------------------------------------------------*/ struct efm32_leuart_int_mode_t { - rt_uint8_t *data_ptr; - rt_uint8_t data_size; - rt_uint32_t read_index, save_index; + rt_uint8_t *data_ptr; + rt_uint8_t data_size; + rt_uint32_t read_index, save_index; }; struct efm32_leuart_dma_mode_t { - /* DMA Channel */ - rt_uint32_t dma_channel; + /* DMA Channel */ + rt_uint32_t dma_channel; - /* buffer info */ - rt_uint32_t *data_ptr; - rt_uint8_t data_size; + /* buffer info */ + rt_uint32_t *data_ptr; + rt_uint8_t data_size; }; struct efm32_leuart_device_t { - /* Counter */ - rt_uint32_t counter; - /* Lock */ - struct rt_semaphore *lock; - /* Unit number */ - rt_uint8_t unit; - /* State */ - volatile rt_uint8_t state; - /* Pointer to LEUART device structure */ - LEUART_TypeDef *leuart_device; - /* Pointer to RX structure */ - void *rx_mode; - /* Pointer to TX structure */ - void *tx_mode; + /* Counter */ + rt_uint32_t counter; + /* Lock */ + struct rt_semaphore *lock; + /* Unit number */ + rt_uint8_t unit; + /* State */ + volatile rt_uint8_t state; + /* Pointer to LEUART device structure */ + LEUART_TypeDef *leuart_device; + /* Pointer to RX structure */ + void *rx_mode; + /* Pointer to TX structure */ + void *tx_mode; }; /* Exported constants --------------------------------------------------------*/ diff --git a/bsp/efm32/drv_rtc.c b/bsp/efm32/drv_rtc.c index 16604a3919..75713fe3b4 100644 --- a/bsp/efm32/drv_rtc.c +++ b/bsp/efm32/drv_rtc.c @@ -10,7 +10,7 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes + * Date Author Notes * 2009-01-05 Bernard the first version * 2010-12-27 onelife Modify for EFM32 * 2011-06-16 onelife Modify init function for efm32lib v2 upgrading @@ -33,7 +33,7 @@ /* Private define ------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/ #ifdef RT_RTC_DEBUG -#define rtc_debug(format,args...) rt_kprintf(format, ##args) +#define rtc_debug(format,args...) rt_kprintf(format, ##args) #else #define rtc_debug(format,args...) #endif @@ -55,10 +55,10 @@ static rt_err_t rt_rtc_open(rt_device_t dev, rt_uint16_t oflag) } static rt_size_t rt_rtc_read( - rt_device_t dev, - rt_off_t pos, - void* buffer, - rt_size_t size) + rt_device_t dev, + rt_off_t pos, + void* buffer, + rt_size_t size) { return 0; } @@ -91,16 +91,16 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args) { case RT_DEVICE_CTRL_RTC_GET_TIME: *(rt_uint32_t *)args = rtc_time + RTC_CounterGet(); - rtc_debug("RTC: get rtc_time %x + %x\n", rtc_time, RTC_CounterGet()); + rtc_debug("RTC: get rtc_time %x + %x\n", rtc_time, RTC_CounterGet()); break; case RT_DEVICE_CTRL_RTC_SET_TIME: { rtc_time = *(rt_uint32_t *)args; - rtc_debug("RTC: set rtc_time %x\n", rtc_time); + rtc_debug("RTC: set rtc_time %x\n", rtc_time); - /* Reset counter */ - RTC_CounterReset(); + /* Reset counter */ + RTC_CounterReset(); } break; } @@ -118,12 +118,12 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args) ******************************************************************************/ void rt_hw_rtc_isr(rt_device_t device) { - if (RTC->IF & RTC_IFC_OF) - { - rtc_time += _RTC_CNT_MASK; - } + if (RTC->IF & RTC_IFC_OF) + { + rtc_time += _RTC_CNT_MASK; + } - RTC->IFC = _RTC_IFC_MASK; + RTC->IFC = _RTC_IFC_MASK; } /***************************************************************************//** @@ -147,25 +147,25 @@ void rt_hw_rtc_isr(rt_device_t device) * Error code ******************************************************************************/ rt_err_t rt_hw_rtc_register( - rt_device_t device, - const char *name, - rt_uint32_t flag) + rt_device_t device, + const char *name, + rt_uint32_t flag) { - RT_ASSERT(device != RT_NULL); + RT_ASSERT(device != RT_NULL); - device->type = RT_Device_Class_RTC; - device->rx_indicate = RT_NULL; - device->tx_complete = RT_NULL; - device->init = RT_NULL; - device->open = rt_rtc_open; - device->close = RT_NULL; - device->read = rt_rtc_read; - device->write = RT_NULL; - device->control = rt_rtc_control; - device->user_data = RT_NULL; /* no private */ + device->type = RT_Device_Class_RTC; + device->rx_indicate = RT_NULL; + device->tx_complete = RT_NULL; + device->init = RT_NULL; + device->open = rt_rtc_open; + device->close = RT_NULL; + device->read = rt_rtc_read; + device->write = RT_NULL; + device->control = rt_rtc_control; + device->user_data = RT_NULL; /* no private */ - /* register a character device */ - return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag); + /* register a character device */ + return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag); } @@ -179,50 +179,50 @@ rt_err_t rt_hw_rtc_register( ******************************************************************************/ void rt_hw_rtc_init(void) { - rt_uint32_t reset; + rt_uint32_t reset; - reset = RMU_ResetCauseGet(); + reset = RMU_ResetCauseGet(); - // TODO: What is the current reset mode? - if (reset & RMU_RSTCAUSE_PORST || reset & RMU_RSTCAUSE_EXTRST) + // TODO: What is the current reset mode? + if (reset & RMU_RSTCAUSE_PORST || reset & RMU_RSTCAUSE_EXTRST) { - RTC_Init_TypeDef rtcInit; - efm32_irq_hook_init_t hook; + RTC_Init_TypeDef rtcInit; + efm32_irq_hook_init_t hook; - rtcInit.enable = true; - rtcInit.debugRun = false; - rtcInit.comp0Top = false; + rtcInit.enable = true; + rtcInit.debugRun = false; + rtcInit.comp0Top = false; - rtc_time = 0UL; + rtc_time = 0UL; rt_kprintf("rtc is not configured\n"); rt_kprintf("please configure with set_date and set_time\n"); - /* Configuring clock */ + /* Configuring clock */ CMU_ClockDivSet(cmuClock_RTC,cmuClkDiv_32768); CMU_ClockEnable(cmuClock_RTC, true); - /* Initialize and enable RTC */ - RTC_Reset(); - RTC_Init(&rtcInit); + /* Initialize and enable RTC */ + RTC_Reset(); + RTC_Init(&rtcInit); - hook.type = efm32_irq_type_rtc; - hook.unit = 0; - hook.cbFunc = rt_hw_rtc_isr; - hook.userPtr = RT_NULL; - efm32_irq_hook_register(&hook); + hook.type = efm32_irq_type_rtc; + hook.unit = 0; + hook.cbFunc = rt_hw_rtc_isr; + hook.userPtr = RT_NULL; + efm32_irq_hook_register(&hook); - /* Enabling Interrupt from RTC */ - RTC_IntEnable(RTC_IFC_OF); - RTC_IntClear(RTC_IFC_OF); + /* Enabling Interrupt from RTC */ + RTC_IntEnable(RTC_IFC_OF); + RTC_IntClear(RTC_IFC_OF); - NVIC_ClearPendingIRQ(RTC_IRQn); - NVIC_SetPriority(RTC_IRQn, EFM32_IRQ_PRI_DEFAULT); - NVIC_EnableIRQ(RTC_IRQn); + NVIC_ClearPendingIRQ(RTC_IRQn); + NVIC_SetPriority(RTC_IRQn, EFM32_IRQ_PRI_DEFAULT); + NVIC_EnableIRQ(RTC_IRQn); } /* register rtc device */ - rt_hw_rtc_register(&rtc, RT_RTC_NAME, EFM32_NO_DATA); + rt_hw_rtc_register(&rtc, RT_RTC_NAME, EFM32_NO_DATA); } #endif diff --git a/bsp/efm32/drv_rtc.h b/bsp/efm32/drv_rtc.h index 492fc59d56..7e33c03896 100644 --- a/bsp/efm32/drv_rtc.h +++ b/bsp/efm32/drv_rtc.h @@ -10,7 +10,7 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes + * Date Author Notes * 2009-01-05 Bernard the first version * 2010-12-27 onelife Modification for EFM32 *********************************************************************/ diff --git a/bsp/efm32/drv_sdcard.h b/bsp/efm32/drv_sdcard.h index 17c94209c9..2c9a1bfc39 100644 --- a/bsp/efm32/drv_sdcard.h +++ b/bsp/efm32/drv_sdcard.h @@ -1,9 +1,9 @@ /***************************************************************************//** - * @file drv_sdcard.h - * @brief Memory card driver (SPI mode) of RT-Thread RTOS for using EFM32 + * @file drv_sdcard.h + * @brief Memory card driver (SPI mode) of RT-Thread RTOS for using EFM32 * USART module * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -11,9 +11,9 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes - * 2011-05-13 onelife Initial creation for using EFM32 USART module - * 2011-07-07 onelife Modify initialization function to return error code + * Date Author Notes + * 2011-05-13 onelife Initial creation for using EFM32 USART module + * 2011-07-07 onelife Modify initialization function to return error code ******************************************************************************/ #ifndef __DEV_SDCARD_H__ #define __DEV_SDCARD_H__ @@ -33,43 +33,43 @@ #error "EFM32 SPI clock should not be more than (EFM32_HFXO_FREQUENCY/2)" #endif -#define SD_SPEED_LOW (0) -#define SD_SPEED_HIGH (1) -#define SD_WAIT_PERIOD (RT_TICK_PER_SECOND) +#define SD_SPEED_LOW (0) +#define SD_SPEED_HIGH (1) +#define SD_WAIT_PERIOD (RT_TICK_PER_SECOND) -#define SD_SECTOR_SIZE_SHIFT (9) -#define SD_SECTOR_SIZE (1 << SD_SECTOR_SIZE_SHIFT) -#define SD_BLOCK_SIZE_CSD (16) -#define SD_BLOCK_SIZE_CID (16) -#define SD_BLOCK_SIZE_OCR (4) -#define SD_BLOCK_SIZE_SDSTAT (64) +#define SD_SECTOR_SIZE_SHIFT (9) +#define SD_SECTOR_SIZE (1 << SD_SECTOR_SIZE_SHIFT) +#define SD_BLOCK_SIZE_CSD (16) +#define SD_BLOCK_SIZE_CID (16) +#define SD_BLOCK_SIZE_OCR (4) +#define SD_BLOCK_SIZE_SDSTAT (64) /* Card type definitions (CardType) */ -#define CT_MMC (0x01) -#define CT_SD1 (0x02) -#define CT_SD2 (0x04) -#define CT_SDC (CT_SD1|CT_SD2) -#define CT_BLOCK (0x08) +#define CT_MMC (0x01) +#define CT_SD1 (0x02) +#define CT_SD2 (0x04) +#define CT_SDC (CT_SD1|CT_SD2) +#define CT_BLOCK (0x08) /* Definitions for MMC/SDC command */ -#define CMD0 (0) /* GO_IDLE_STATE */ -#define CMD1 (1) /* SEND_OP_COND */ -#define ACMD41 (41|0x80) /* SEND_OP_COND (SDC) */ -#define CMD8 (8) /* SEND_IF_COND */ -#define CMD9 (9) /* SEND_CSD */ -#define CMD10 (10) /* SEND_CID */ -#define CMD12 (12) /* STOP_TRANSMISSION */ -#define ACMD13 (13|0x80) /* SD_STATUS (SDC) */ -#define CMD16 (16) /* SET_BLOCKLEN */ -#define CMD17 (17) /* READ_SINGLE_BLOCK */ -#define CMD18 (18) /* READ_MULTIPLE_BLOCK */ -#define CMD23 (23) /* SET_BLOCK_COUNT */ -#define ACMD23 (23|0x80) /* SET_WR_BLK_ERASE_COUNT (SDC) */ -#define CMD24 (24) /* WRITE_BLOCK */ -#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */ -#define CMD41 (41) /* SEND_OP_COND (ACMD) */ -#define CMD55 (55) /* APP_CMD */ -#define CMD58 (58) /* READ_OCR */ +#define CMD0 (0) /* GO_IDLE_STATE */ +#define CMD1 (1) /* SEND_OP_COND */ +#define ACMD41 (41|0x80) /* SEND_OP_COND (SDC) */ +#define CMD8 (8) /* SEND_IF_COND */ +#define CMD9 (9) /* SEND_CSD */ +#define CMD10 (10) /* SEND_CID */ +#define CMD12 (12) /* STOP_TRANSMISSION */ +#define ACMD13 (13|0x80) /* SD_STATUS (SDC) */ +#define CMD16 (16) /* SET_BLOCKLEN */ +#define CMD17 (17) /* READ_SINGLE_BLOCK */ +#define CMD18 (18) /* READ_MULTIPLE_BLOCK */ +#define CMD23 (23) /* SET_BLOCK_COUNT */ +#define ACMD23 (23|0x80) /* SET_WR_BLK_ERASE_COUNT (SDC) */ +#define CMD24 (24) /* WRITE_BLOCK */ +#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */ +#define CMD41 (41) /* SEND_OP_COND (ACMD) */ +#define CMD55 (55) /* APP_CMD */ +#define CMD58 (58) /* READ_OCR */ /* Exported functions ------------------------------------------------------- */ rt_err_t efm_spiSd_init(void); diff --git a/bsp/efm32/drv_timer.c b/bsp/efm32/drv_timer.c index ccfb96ab0e..12e347544c 100644 --- a/bsp/efm32/drv_timer.c +++ b/bsp/efm32/drv_timer.c @@ -10,7 +10,7 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes + * Date Author Notes * 2011-01-18 onelife Initial creation for EFM32 * 2011-06-17 onelife Modify init function for efm32lib v2 upgrading ******************************************************************************/ diff --git a/bsp/efm32/drv_usart.c b/bsp/efm32/drv_usart.c index 7cfb50b0a7..c511a31475 100644 --- a/bsp/efm32/drv_usart.c +++ b/bsp/efm32/drv_usart.c @@ -34,9 +34,9 @@ * 2011-12-20 onelife Add 9-bit SPI mode support * 2011-12-20 onelife Change SPI write format (same as SPI read) * 2011-12-20 onelife Change USART status format - * 2011-12-27 onelife Utilize "USART_PRESENT", "USART_COUNT", + * 2011-12-27 onelife Utilize "USART_PRESENT", "USART_COUNT", * "UART_PRESENT" and "UART_COUNT" - * 2012-05-16 onelife Fix a bug in rt_hw_usart_init() + * 2012-05-16 onelife Fix a bug in rt_hw_usart_init() ******************************************************************************/ /***************************************************************************//** diff --git a/bsp/efm32/enc28j60.h b/bsp/efm32/enc28j60.h index 4f9c7046fe..5955c603e7 100644 --- a/bsp/efm32/enc28j60.h +++ b/bsp/efm32/enc28j60.h @@ -193,9 +193,9 @@ #define MACON3_FRMLNEN 0x02 #define MACON3_FULDPX 0x01 // ENC28J60 MACON4 Register Bit Definitions -#define MACON4_DEFER (1<<6) -#define MACON4_BPEN (1<<5) -#define MACON4_NOBKOFF (1<<4) +#define MACON4_DEFER (1<<6) +#define MACON4_BPEN (1<<5) +#define MACON4_NOBKOFF (1<<4) // ENC28J60 MICMD Register Bit Definitions #define MICMD_MIISCAN 0x02 #define MICMD_MIIRD 0x01 @@ -214,12 +214,12 @@ #define PHSTAT1_LLSTAT 0x0004 #define PHSTAT1_JBSTAT 0x0002 /* ENC28J60 PHY PHSTAT2 Register Bit Definitions */ -#define PHSTAT2_TXSTAT (1 << 13) -#define PHSTAT2_RXSTAT (1 << 12) -#define PHSTAT2_COLSTAT (1 << 11) -#define PHSTAT2_LSTAT (1 << 10) -#define PHSTAT2_DPXSTAT (1 << 9) -#define PHSTAT2_PLRITY (1 << 5) +#define PHSTAT2_TXSTAT (1 << 13) +#define PHSTAT2_RXSTAT (1 << 12) +#define PHSTAT2_COLSTAT (1 << 11) +#define PHSTAT2_LSTAT (1 << 10) +#define PHSTAT2_DPXSTAT (1 << 9) +#define PHSTAT2_PLRITY (1 << 5) // ENC28J60 PHY PHCON2 Register Bit Definitions #define PHCON2_FRCLINK 0x4000 #define PHCON2_TXDIS 0x2000 @@ -278,13 +278,13 @@ #define RSV_GETBIT(x, y) (((x) & RSV_BITMASK(y)) ? 1 : 0) // SPI operation codes -#define ENC28J60_READ_CTRL_REG (0x00) -#define ENC28J60_READ_BUF_MEM (0x20 | 0x1A) -#define ENC28J60_WRITE_CTRL_REG (0x40) -#define ENC28J60_WRITE_BUF_MEM (0x60 | 0x1A) -#define ENC28J60_BIT_FIELD_SET (0x80) -#define ENC28J60_BIT_FIELD_CLR (0xA0) -#define ENC28J60_SOFT_RESET (0xE0 | 0x1F) +#define ENC28J60_READ_CTRL_REG (0x00) +#define ENC28J60_READ_BUF_MEM (0x20 | 0x1A) +#define ENC28J60_WRITE_CTRL_REG (0x40) +#define ENC28J60_WRITE_BUF_MEM (0x60 | 0x1A) +#define ENC28J60_BIT_FIELD_SET (0x80) +#define ENC28J60_BIT_FIELD_CLR (0xA0) +#define ENC28J60_SOFT_RESET (0xE0 | 0x1F) // The RXSTART_INIT should be zero. See Rev. B4 Silicon Errata // buffer boundaries applied to internal 8K ram @@ -292,17 +292,17 @@ // // start with recbuf at 0/ -#define RXSTART_INIT 0x0 +#define RXSTART_INIT 0x0 // receive buffer end -#define RXSTOP_INIT (0x1FFF - 0x0600 - 1) +#define RXSTOP_INIT (0x1FFF - 0x0600 - 1) // start TX buffer at 0x1FFF-0x0600, pace for one full ethernet frame (~1500 bytes) -#define TXSTART_INIT (0x1FFF - 0x0600) +#define TXSTART_INIT (0x1FFF - 0x0600) // stp TX buffer at end of mem -#define TXSTOP_INIT 0x1FFF +#define TXSTOP_INIT 0x1FFF // max frame length which the conroller will accept: -#define MAX_FRAMELEN 1518 +#define MAX_FRAMELEN 1518 void rt_hw_enc28j60_init(void); diff --git a/bsp/efm32/graphics/tftspi.h b/bsp/efm32/graphics/tftspi.h index 1399fc552e..27e8ce8078 100644 --- a/bsp/efm32/graphics/tftspi.h +++ b/bsp/efm32/graphics/tftspi.h @@ -1,8 +1,8 @@ /***************************************************************************//** - * @file tftspi.h - * @brief Stub functions of EFM32 LCD driver + * @file tftspi.h + * @brief Stub functions of EFM32 LCD driver * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -10,7 +10,7 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes + * Date Author Notes * 2011-12-20 onelife Initial creation for EFM32 ******************************************************************************/ #ifndef __TFTSPI_H__ diff --git a/bsp/efm32/hdl_interrupt.c b/bsp/efm32/hdl_interrupt.c index de91a9f9a0..8017414e55 100644 --- a/bsp/efm32/hdl_interrupt.c +++ b/bsp/efm32/hdl_interrupt.c @@ -13,10 +13,10 @@ * Date Author Notes * 2010-12-29 onelife Initial creation for EFM32 * 2011-07-12 onelife Disable interrupts in GPIO handler - * 2011-12-09 onelife Add giant gecko support + * 2011-12-09 onelife Add giant gecko support * 2011-12-09 onelife Add UART module support * 2011-12-09 onelife Add LEUART module support - * 2011-12-27 onelife Utilize "XXX_PRESENT" and "XXX_COUNT" + * 2011-12-27 onelife Utilize "XXX_PRESENT" and "XXX_COUNT" ******************************************************************************/ /* Includes ------------------------------------------------------------------*/ @@ -32,20 +32,20 @@ /* Private define ------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/ #ifdef RT_IRQHDL_DEBUG -#define hdl_debug(format,args...) rt_kprintf(format, ##args) +#define hdl_debug(format,args...) rt_kprintf(format, ##args) #else #define hdl_debug(format,args...) #endif /* Private variables ---------------------------------------------------------*/ -efm32_irq_hook_t dmaCbTable[DMA_CHAN_COUNT * 2] = {RT_NULL}; -efm32_irq_hook_t timerCbTable[TIMER_COUNT] = {RT_NULL}; +efm32_irq_hook_t dmaCbTable[DMA_CHAN_COUNT * 2] = {RT_NULL}; +efm32_irq_hook_t timerCbTable[TIMER_COUNT] = {RT_NULL}; #if defined(LETIMER_PRESENT) efm32_irq_hook_t letimerCbTable[LETIMER_COUNT] = {RT_NULL}; #endif -efm32_irq_hook_t rtcCbTable[RTC_COUNT] = {RT_NULL}; -efm32_irq_hook_t gpioCbTable[16] = {RT_NULL}; -efm32_irq_hook_t acmpCbTable[ACMP_COUNT] = {RT_NULL}; +efm32_irq_hook_t rtcCbTable[RTC_COUNT] = {RT_NULL}; +efm32_irq_hook_t gpioCbTable[16] = {RT_NULL}; +efm32_irq_hook_t acmpCbTable[ACMP_COUNT] = {RT_NULL}; #if defined(USART_PRESENT) #if defined(UART_PRESENT) efm32_irq_hook_t usartCbTable[USART_COUNT * 2 + UART_COUNT * 2] = {RT_NULL}; @@ -57,7 +57,7 @@ efm32_irq_hook_t usartCbTable[USART_COUNT * 2] = {RT_NULL}; efm32_irq_hook_t leuartCbTable[LEUART_COUNT] = {RT_NULL}; #endif #if defined(I2C_PRESENT) -efm32_irq_hook_t iicCbTable[I2C_COUNT] = {RT_NULL}; +efm32_irq_hook_t iicCbTable[I2C_COUNT] = {RT_NULL}; #endif /* Private function prototypes -----------------------------------------------*/ @@ -65,7 +65,7 @@ efm32_irq_hook_t iicCbTable[I2C_COUNT] = {RT_NULL}; /***************************************************************************//** * @brief - * NMI exception handler + * NMI exception handler * * @details * @@ -73,12 +73,12 @@ efm32_irq_hook_t iicCbTable[I2C_COUNT] = {RT_NULL}; ******************************************************************************/ void NMI_Handler(void) { - hdl_debug("[NMI_Handler: NOP]\n"); + hdl_debug("[NMI_Handler: NOP]\n"); } /***************************************************************************//** * @brief - * Memory manage exception handler + * Memory manage exception handler * * @details * @@ -86,13 +86,13 @@ void NMI_Handler(void) ******************************************************************************/ void MemManage_Handler(void) { - hdl_debug("[MemManage_Handler: infinite loop]\n"); - while (1); + hdl_debug("[MemManage_Handler: infinite loop]\n"); + while (1); } /***************************************************************************//** * @brief - * Bus fault exception handler + * Bus fault exception handler * * @details * @@ -100,13 +100,13 @@ void MemManage_Handler(void) ******************************************************************************/ void BusFault_Handler(void) { - hdl_debug("[BusFault_Handler: infinite loop]\n"); - while (1); + hdl_debug("[BusFault_Handler: infinite loop]\n"); + while (1); } /***************************************************************************//** * @brief - * Usage fault exception handler + * Usage fault exception handler * * @details * @@ -114,13 +114,13 @@ void BusFault_Handler(void) ******************************************************************************/ void UsageFault_Handler(void) { - hdl_debug("[UsageFault_Handler: infinite loop]\n"); - while (1); + hdl_debug("[UsageFault_Handler: infinite loop]\n"); + while (1); } /***************************************************************************//** * @brief - * Supervisor call exception handler + * Supervisor call exception handler * * @details * @@ -128,12 +128,12 @@ void UsageFault_Handler(void) ******************************************************************************/ void SVC_Handler(void) { - hdl_debug("[SVC_Handler: NOP]\n"); + hdl_debug("[SVC_Handler: NOP]\n"); } /***************************************************************************//** * @brief - * Debug monitor exception handler + * Debug monitor exception handler * * @details * @@ -141,12 +141,12 @@ void SVC_Handler(void) ******************************************************************************/ void DebugMon_Handler(void) { - hdl_debug("[DebugMon_Handler: NOP]\n"); + hdl_debug("[DebugMon_Handler: NOP]\n"); } /***************************************************************************//** * @brief - * System tick timer interrupt handler + * System tick timer interrupt handler * * @details * @@ -155,13 +155,13 @@ void DebugMon_Handler(void) ******************************************************************************/ void SysTick_Handler(void) { - /* enter interrupt */ - rt_interrupt_enter(); + /* enter interrupt */ + rt_interrupt_enter(); - rt_tick_increase(); + rt_tick_increase(); - /* leave interrupt */ - rt_interrupt_leave(); + /* leave interrupt */ + rt_interrupt_leave(); } /******************************************************************************* @@ -173,7 +173,7 @@ void SysTick_Handler(void) /***************************************************************************//** * @brief - * Common DMA interrupt handler + * Common DMA interrupt handler * * @details * @@ -185,11 +185,11 @@ void DMA_IRQHandler_All(rt_uint32_t channel, rt_bool_t primary, void *user) /* enter interrupt */ rt_interrupt_enter(); - /* invoke callback function */ - if (dmaCbTable[channel].cbFunc != RT_NULL) - { - (dmaCbTable[channel].cbFunc)(dmaCbTable[channel].userPtr); - } + /* invoke callback function */ + if (dmaCbTable[channel].cbFunc != RT_NULL) + { + (dmaCbTable[channel].cbFunc)(dmaCbTable[channel].userPtr); + } /* leave interrupt */ rt_interrupt_leave(); @@ -197,95 +197,95 @@ void DMA_IRQHandler_All(rt_uint32_t channel, rt_bool_t primary, void *user) /***************************************************************************//** * @brief - * Common Timer0 interrupt handler + * Common Timer0 interrupt handler * * @details - * This function handles Timer0 counter overflow interrupt request + * This function handles Timer0 counter overflow interrupt request * * @note * ******************************************************************************/ void TIMER0_IRQHandler(void) { - if (TIMER0->IF & TIMER_IF_OF) - { - /* invoke callback function */ - if (timerCbTable[0].cbFunc != RT_NULL) - { - (timerCbTable[0].cbFunc)(timerCbTable[0].userPtr); - } + if (TIMER0->IF & TIMER_IF_OF) + { + /* invoke callback function */ + if (timerCbTable[0].cbFunc != RT_NULL) + { + (timerCbTable[0].cbFunc)(timerCbTable[0].userPtr); + } - /* clear interrupt */ - BITBAND_Peripheral(&(TIMER0->IFC), _TIMER_IF_OF_SHIFT, 0x1UL); - } + /* clear interrupt */ + BITBAND_Peripheral(&(TIMER0->IFC), _TIMER_IF_OF_SHIFT, 0x1UL); + } } /***************************************************************************//** * @brief - * Common Timer1 interrupt handler + * Common Timer1 interrupt handler * * @details - * This function handles Timer1 counter overflow interrupt request + * This function handles Timer1 counter overflow interrupt request * * @note * ******************************************************************************/ void TIMER1_IRQHandler(void) { - if (TIMER1->IF & TIMER_IF_OF) - { - /* invoke callback function */ - if (timerCbTable[1].cbFunc != RT_NULL) - { - (timerCbTable[1].cbFunc)(timerCbTable[1].userPtr); - } + if (TIMER1->IF & TIMER_IF_OF) + { + /* invoke callback function */ + if (timerCbTable[1].cbFunc != RT_NULL) + { + (timerCbTable[1].cbFunc)(timerCbTable[1].userPtr); + } - /* clear interrupt */ - BITBAND_Peripheral(&(TIMER1->IFC), _TIMER_IF_OF_SHIFT, 0x1UL); - } + /* clear interrupt */ + BITBAND_Peripheral(&(TIMER1->IFC), _TIMER_IF_OF_SHIFT, 0x1UL); + } } /***************************************************************************//** * @brief - * Common Timer2 interrupt handler + * Common Timer2 interrupt handler * * @details - * This function handles Timer2 counter overflow interrupt request + * This function handles Timer2 counter overflow interrupt request * * @note * ******************************************************************************/ void TIMER2_IRQHandler(void) { - if (TIMER2->IF & TIMER_IF_OF) - { - /* invoke callback function */ - if (timerCbTable[2].cbFunc != RT_NULL) - { - (timerCbTable[2].cbFunc)(timerCbTable[2].userPtr); - } + if (TIMER2->IF & TIMER_IF_OF) + { + /* invoke callback function */ + if (timerCbTable[2].cbFunc != RT_NULL) + { + (timerCbTable[2].cbFunc)(timerCbTable[2].userPtr); + } - /* clear interrupt */ - BITBAND_Peripheral(&(TIMER2->IFC), _TIMER_IF_OF_SHIFT, 0x1UL); - } + /* clear interrupt */ + BITBAND_Peripheral(&(TIMER2->IFC), _TIMER_IF_OF_SHIFT, 0x1UL); + } } #if defined(LETIMER_PRESENT) /***************************************************************************//** * @brief - * Common Low Energy Timer0 interrupt handler + * Common Low Energy Timer0 interrupt handler * * @details - * This function handles Timer0 counter overflow interrupt request + * This function handles Timer0 counter overflow interrupt request * * @note * ******************************************************************************/ void LETIMER0_IRQHandler(void) { - if (LETIMER0->IF & LETIMER_IF_UF) - { + if (LETIMER0->IF & LETIMER_IF_UF) + { /* enter interrupt */ rt_interrupt_enter(); @@ -294,24 +294,24 @@ void LETIMER0_IRQHandler(void) /* leave interrupt */ rt_interrupt_leave(); - /* invoke callback function */ -/* if (letimerCbTable[0].cbFunc != RT_NULL) - { - (letimerCbTable[0].cbFunc)(letimerCbTable[0].userPtr); - } + /* invoke callback function */ +/* if (letimerCbTable[0].cbFunc != RT_NULL) + { + (letimerCbTable[0].cbFunc)(letimerCbTable[0].userPtr); + } */ - /* clear interrupt */ - BITBAND_Peripheral(&(LETIMER0->IFC), _LETIMER_IF_UF_SHIFT, 0x1UL); - } + /* clear interrupt */ + BITBAND_Peripheral(&(LETIMER0->IFC), _LETIMER_IF_UF_SHIFT, 0x1UL); + } } #endif /***************************************************************************//** * @brief - * Common RTC interrupt handler + * Common RTC interrupt handler * * @details - * This function handles RTC counter overflow interrupt request + * This function handles RTC counter overflow interrupt request * * @note * @@ -321,14 +321,14 @@ void RTC_IRQHandler(void) /* enter interrupt */ rt_interrupt_enter(); - if (RTC->IF & RTC_IF_OF) - { - /* invoke callback function */ - if (rtcCbTable[0].cbFunc != RT_NULL) - { - (rtcCbTable[0].cbFunc)(rtcCbTable[0].userPtr); - } - } + if (RTC->IF & RTC_IF_OF) + { + /* invoke callback function */ + if (rtcCbTable[0].cbFunc != RT_NULL) + { + (rtcCbTable[0].cbFunc)(rtcCbTable[0].userPtr); + } + } /* leave interrupt */ rt_interrupt_leave(); @@ -336,7 +336,7 @@ void RTC_IRQHandler(void) /***************************************************************************//** * @brief - * Common even number GPIO interrupt handler + * Common even number GPIO interrupt handler * * @details * @@ -345,36 +345,36 @@ void RTC_IRQHandler(void) ******************************************************************************/ void GPIO_EVEN_IRQHandler(void) { - rt_uint16_t flag, n; - rt_base_t level; + rt_uint16_t flag, n; + rt_base_t level; - /* Disable interrupt */ - level = rt_hw_interrupt_disable(); + /* Disable interrupt */ + level = rt_hw_interrupt_disable(); /* Enter ISR */ rt_interrupt_enter(); - /* invoke callback function */ - flag = (rt_uint16_t)(GPIO->IF & 0xFFFF); - for ( n = 0; flag > 0; flag = flag >> 2, n = n + 2) - { - if ((flag & 0x0001) && (gpioCbTable[n].cbFunc != RT_NULL)) - { - (gpioCbTable[n].cbFunc)(gpioCbTable[n].userPtr); - } - } + /* invoke callback function */ + flag = (rt_uint16_t)(GPIO->IF & 0xFFFF); + for ( n = 0; flag > 0; flag = flag >> 2, n = n + 2) + { + if ((flag & 0x0001) && (gpioCbTable[n].cbFunc != RT_NULL)) + { + (gpioCbTable[n].cbFunc)(gpioCbTable[n].userPtr); + } + } - /* clear interrupt */ - GPIO->IFC = 0x5555UL; + /* clear interrupt */ + GPIO->IFC = 0x5555UL; /* Leave ISR */ - rt_interrupt_leave(); - /* Enable interrupt */ + rt_interrupt_leave(); + /* Enable interrupt */ rt_hw_interrupt_enable(level); } /***************************************************************************//** * @brief - * Common odd number GPIO interrupt handler + * Common odd number GPIO interrupt handler * * @details * @@ -383,39 +383,39 @@ void GPIO_EVEN_IRQHandler(void) ******************************************************************************/ void GPIO_ODD_IRQHandler(void) { - rt_uint16_t flag, n; - rt_base_t level; + rt_uint16_t flag, n; + rt_base_t level; - /* Disable interrupt */ - level = rt_hw_interrupt_disable(); - /* Enter ISR */ + /* Disable interrupt */ + level = rt_hw_interrupt_disable(); + /* Enter ISR */ rt_interrupt_enter(); - /* invoke callback function */ - flag = (rt_uint16_t)(GPIO->IF & 0xFFFF) >> 1; - for ( n = 1; flag > 0; flag = flag >> 2, n = n + 2) - { - if ((flag & 0x0001) && (gpioCbTable[n].cbFunc != RT_NULL)) - { - (gpioCbTable[n].cbFunc)(gpioCbTable[n].userPtr); - } - } + /* invoke callback function */ + flag = (rt_uint16_t)(GPIO->IF & 0xFFFF) >> 1; + for ( n = 1; flag > 0; flag = flag >> 2, n = n + 2) + { + if ((flag & 0x0001) && (gpioCbTable[n].cbFunc != RT_NULL)) + { + (gpioCbTable[n].cbFunc)(gpioCbTable[n].userPtr); + } + } - /* clear interrupt */ - GPIO->IFC = 0xAAAAUL; + /* clear interrupt */ + GPIO->IFC = 0xAAAAUL; /* Leave ISR */ - rt_interrupt_leave(); - /* Enable interrupt */ + rt_interrupt_leave(); + /* Enable interrupt */ rt_hw_interrupt_enable(level); } /***************************************************************************//** * @brief - * Common ACMP interrupt handler + * Common ACMP interrupt handler * * @details - * This function handles ACMP edge trigger interrupt request + * This function handles ACMP edge trigger interrupt request * * @note * @@ -425,29 +425,29 @@ void ACMP0_IRQHandler(void) /* enter interrupt */ rt_interrupt_enter(); - if (ACMP0->IF & ACMP_IF_EDGE) - { - /* invoke callback function */ - if (acmpCbTable[0].cbFunc != RT_NULL) - { - (acmpCbTable[0].cbFunc)(acmpCbTable[0].userPtr); - } + if (ACMP0->IF & ACMP_IF_EDGE) + { + /* invoke callback function */ + if (acmpCbTable[0].cbFunc != RT_NULL) + { + (acmpCbTable[0].cbFunc)(acmpCbTable[0].userPtr); + } - /* clear interrupt */ - BITBAND_Peripheral(&(ACMP0->IFC), _ACMP_IF_EDGE_SHIFT, 0x1UL); - } + /* clear interrupt */ + BITBAND_Peripheral(&(ACMP0->IFC), _ACMP_IF_EDGE_SHIFT, 0x1UL); + } - if (ACMP1->IF & ACMP_IF_EDGE) - { - /* invoke callback function */ - if (acmpCbTable[1].cbFunc != RT_NULL) - { - (acmpCbTable[1].cbFunc)(acmpCbTable[1].userPtr); - } + if (ACMP1->IF & ACMP_IF_EDGE) + { + /* invoke callback function */ + if (acmpCbTable[1].cbFunc != RT_NULL) + { + (acmpCbTable[1].cbFunc)(acmpCbTable[1].userPtr); + } - /* clear interrupt */ - BITBAND_Peripheral(&(ACMP1->IFC), _ACMP_IF_EDGE_SHIFT, 0x1UL); - } + /* clear interrupt */ + BITBAND_Peripheral(&(ACMP1->IFC), _ACMP_IF_EDGE_SHIFT, 0x1UL); + } /* leave interrupt */ rt_interrupt_leave(); @@ -456,10 +456,10 @@ void ACMP0_IRQHandler(void) #if defined(USART_PRESENT) /***************************************************************************//** * @brief - * Common USART0 TX interrupt handler + * Common USART0 TX interrupt handler * * @details - * This function handles USART0 TX complete interrupt request + * This function handles USART0 TX complete interrupt request * * @note * @@ -469,17 +469,17 @@ void USART0_TX_IRQHandler(void) /* enter interrupt */ rt_interrupt_enter(); - if (USART0->IF & USART_IF_TXC) - { - /* invoke callback function */ - if (usartCbTable[0].cbFunc != RT_NULL) - { - (usartCbTable[0].cbFunc)(usartCbTable[0].userPtr); - } + if (USART0->IF & USART_IF_TXC) + { + /* invoke callback function */ + if (usartCbTable[0].cbFunc != RT_NULL) + { + (usartCbTable[0].cbFunc)(usartCbTable[0].userPtr); + } - /* clear interrupt */ - BITBAND_Peripheral(&(USART0->IFC), _USART_IF_TXC_SHIFT, 0x1UL); - } + /* clear interrupt */ + BITBAND_Peripheral(&(USART0->IFC), _USART_IF_TXC_SHIFT, 0x1UL); + } /* leave interrupt */ rt_interrupt_leave(); @@ -487,34 +487,34 @@ void USART0_TX_IRQHandler(void) /***************************************************************************//** * @brief - * Common USART0 RX interrupt handler + * Common USART0 RX interrupt handler * * @details - * This function handles USART0 RX data valid interrupt request + * This function handles USART0 RX data valid interrupt request * * @note * ******************************************************************************/ void USART0_RX_IRQHandler(void) { - if (USART0->IF & USART_IF_RXDATAV) - { - /* invoke callback function */ - if (usartCbTable[1].cbFunc != RT_NULL) - { - (usartCbTable[1].cbFunc)(usartCbTable[1].userPtr); - } - } + if (USART0->IF & USART_IF_RXDATAV) + { + /* invoke callback function */ + if (usartCbTable[1].cbFunc != RT_NULL) + { + (usartCbTable[1].cbFunc)(usartCbTable[1].userPtr); + } + } } #endif #if (defined(USART_PRESENT) && (USART_COUNT > 1)) /***************************************************************************//** * @brief - * Common USART1 TX interrupt handler + * Common USART1 TX interrupt handler * * @details - * This function handles USART1 TX complete interrupt request + * This function handles USART1 TX complete interrupt request * * @note * @@ -524,17 +524,17 @@ void USART1_TX_IRQHandler(void) /* enter interrupt */ rt_interrupt_enter(); - if (USART1->IF & USART_IF_TXC) - { - /* invoke callback function */ - if (usartCbTable[2].cbFunc != RT_NULL) - { - (usartCbTable[2].cbFunc)(usartCbTable[2].userPtr); - } + if (USART1->IF & USART_IF_TXC) + { + /* invoke callback function */ + if (usartCbTable[2].cbFunc != RT_NULL) + { + (usartCbTable[2].cbFunc)(usartCbTable[2].userPtr); + } - /* clear interrupt */ - BITBAND_Peripheral(&(USART1->IFC), _USART_IF_TXC_SHIFT, 0x1UL); - } + /* clear interrupt */ + BITBAND_Peripheral(&(USART1->IFC), _USART_IF_TXC_SHIFT, 0x1UL); + } /* leave interrupt */ rt_interrupt_leave(); @@ -542,34 +542,34 @@ void USART1_TX_IRQHandler(void) /***************************************************************************//** * @brief - * Common USART1 RX interrupt handler + * Common USART1 RX interrupt handler * * @details - * This function handles USART1 RX data valid interrupt request + * This function handles USART1 RX data valid interrupt request * * @note * ******************************************************************************/ void USART1_RX_IRQHandler(void) { - if (USART1->IF & USART_IF_RXDATAV) - { - /* invoke callback function */ - if (usartCbTable[3].cbFunc != RT_NULL) - { - (usartCbTable[3].cbFunc)(usartCbTable[3].userPtr); - } - } + if (USART1->IF & USART_IF_RXDATAV) + { + /* invoke callback function */ + if (usartCbTable[3].cbFunc != RT_NULL) + { + (usartCbTable[3].cbFunc)(usartCbTable[3].userPtr); + } + } } #endif #if (defined(USART_PRESENT) && (USART_COUNT > 2)) /***************************************************************************//** * @brief - * Common USART2 TX interrupt handler + * Common USART2 TX interrupt handler * * @details - * This function handles USART2 TX complete interrupt request + * This function handles USART2 TX complete interrupt request * * @note * @@ -579,17 +579,17 @@ void USART2_TX_IRQHandler(void) /* enter interrupt */ rt_interrupt_enter(); - if (USART2->IF & USART_IF_TXC) - { - /* invoke callback function */ - if (usartCbTable[4].cbFunc != RT_NULL) - { - (usartCbTable[4].cbFunc)(usartCbTable[4].userPtr); - } + if (USART2->IF & USART_IF_TXC) + { + /* invoke callback function */ + if (usartCbTable[4].cbFunc != RT_NULL) + { + (usartCbTable[4].cbFunc)(usartCbTable[4].userPtr); + } - /* clear interrupt */ - BITBAND_Peripheral(&(USART2->IFC), _USART_IF_TXC_SHIFT, 0x1UL); - } + /* clear interrupt */ + BITBAND_Peripheral(&(USART2->IFC), _USART_IF_TXC_SHIFT, 0x1UL); + } /* leave interrupt */ rt_interrupt_leave(); @@ -597,34 +597,34 @@ void USART2_TX_IRQHandler(void) /***************************************************************************//** * @brief - * Common USART2 RX interrupt handler + * Common USART2 RX interrupt handler * * @details - * This function handles USART2 RX data valid interrupt request + * This function handles USART2 RX data valid interrupt request * * @note * ******************************************************************************/ void USART2_RX_IRQHandler(void) { - if (USART2->IF & USART_IF_RXDATAV) - { - /* invoke callback function */ - if (usartCbTable[5].cbFunc != RT_NULL) - { - (usartCbTable[5].cbFunc)(usartCbTable[5].userPtr); - } - } + if (USART2->IF & USART_IF_RXDATAV) + { + /* invoke callback function */ + if (usartCbTable[5].cbFunc != RT_NULL) + { + (usartCbTable[5].cbFunc)(usartCbTable[5].userPtr); + } + } } #endif #if defined(UART_PRESENT) /***************************************************************************//** * @brief - * Common UART0 TX interrupt handler + * Common UART0 TX interrupt handler * * @details - * This function handles UART0 TX complete interrupt request + * This function handles UART0 TX complete interrupt request * * @note * @@ -634,17 +634,17 @@ void UART0_TX_IRQHandler(void) /* enter interrupt */ rt_interrupt_enter(); - if (UART0->IF & UART_IF_TXC) - { - /* invoke callback function */ - if (usartCbTable[USART_COUNT * 2].cbFunc != RT_NULL) - { - (usartCbTable[USART_COUNT * 2].cbFunc)(usartCbTable[USART_COUNT * 2].userPtr); - } + if (UART0->IF & UART_IF_TXC) + { + /* invoke callback function */ + if (usartCbTable[USART_COUNT * 2].cbFunc != RT_NULL) + { + (usartCbTable[USART_COUNT * 2].cbFunc)(usartCbTable[USART_COUNT * 2].userPtr); + } - /* clear interrupt */ - BITBAND_Peripheral(&(UART0->IFC), _UART_IF_TXC_SHIFT, 0x1UL); - } + /* clear interrupt */ + BITBAND_Peripheral(&(UART0->IFC), _UART_IF_TXC_SHIFT, 0x1UL); + } /* leave interrupt */ rt_interrupt_leave(); @@ -652,34 +652,34 @@ void UART0_TX_IRQHandler(void) /***************************************************************************//** * @brief - * Common UART0 RX interrupt handler + * Common UART0 RX interrupt handler * * @details - * This function handles UART0 RX data valid interrupt request + * This function handles UART0 RX data valid interrupt request * * @note * ******************************************************************************/ void UART0_RX_IRQHandler(void) { - if (UART0->IF & UART_IF_RXDATAV) - { - /* invoke callback function */ - if (usartCbTable[USART_COUNT * 2 + 1].cbFunc != RT_NULL) - { - (usartCbTable[USART_COUNT * 2 + 1].cbFunc)(usartCbTable[USART_COUNT * 2 + 1].userPtr); - } - } + if (UART0->IF & UART_IF_RXDATAV) + { + /* invoke callback function */ + if (usartCbTable[USART_COUNT * 2 + 1].cbFunc != RT_NULL) + { + (usartCbTable[USART_COUNT * 2 + 1].cbFunc)(usartCbTable[USART_COUNT * 2 + 1].userPtr); + } + } } #endif #if (defined(UART_PRESENT) && (UART_COUNT > 1)) /***************************************************************************//** * @brief - * Common UART1 TX interrupt handler + * Common UART1 TX interrupt handler * * @details - * This function handles UART1 TX complete interrupt request + * This function handles UART1 TX complete interrupt request * * @note * @@ -689,17 +689,17 @@ void UART1_TX_IRQHandler(void) /* enter interrupt */ rt_interrupt_enter(); - if (UART1->IF & UART_IF_TXC) - { - /* invoke callback function */ - if (usartCbTable[USART_COUNT * 2 + 2].cbFunc != RT_NULL) - { - (usartCbTable[USART_COUNT * 2 + 2].cbFunc)(usartCbTable[USART_COUNT * 2 + 2].userPtr); - } + if (UART1->IF & UART_IF_TXC) + { + /* invoke callback function */ + if (usartCbTable[USART_COUNT * 2 + 2].cbFunc != RT_NULL) + { + (usartCbTable[USART_COUNT * 2 + 2].cbFunc)(usartCbTable[USART_COUNT * 2 + 2].userPtr); + } - /* clear interrupt */ - BITBAND_Peripheral(&(UART1->IFC), _UART_IF_TXC_SHIFT, 0x1UL); - } + /* clear interrupt */ + BITBAND_Peripheral(&(UART1->IFC), _UART_IF_TXC_SHIFT, 0x1UL); + } /* leave interrupt */ rt_interrupt_leave(); @@ -707,106 +707,106 @@ void UART1_TX_IRQHandler(void) /***************************************************************************//** * @brief - * Common UART1 RX interrupt handler + * Common UART1 RX interrupt handler * * @details - * This function handles UART1 RX data valid interrupt request + * This function handles UART1 RX data valid interrupt request * * @note * ******************************************************************************/ void UART1_RX_IRQHandler(void) { - if (UART1->IF & UART_IF_RXDATAV) - { - /* invoke callback function */ - if (usartCbTable[USART_COUNT * 2 + 3].cbFunc != RT_NULL) - { - (usartCbTable[USART_COUNT * 2 + 3].cbFunc)(usartCbTable[USART_COUNT * 2 + 3].userPtr); - } - } + if (UART1->IF & UART_IF_RXDATAV) + { + /* invoke callback function */ + if (usartCbTable[USART_COUNT * 2 + 3].cbFunc != RT_NULL) + { + (usartCbTable[USART_COUNT * 2 + 3].cbFunc)(usartCbTable[USART_COUNT * 2 + 3].userPtr); + } + } } #endif #if defined(LEUART_PRESENT) /***************************************************************************//** * @brief - * Common LEUART0 interrupt handler + * Common LEUART0 interrupt handler * * @details - * This function handles LEUART0 interrupt request + * This function handles LEUART0 interrupt request * * @note * ******************************************************************************/ void LEUART0_IRQHandler(void) { - if (LEUART0->IF & LEUART_IF_RXDATAV) - { - /* invoke callback function */ - if (leuartCbTable[0].cbFunc != RT_NULL) - { - (leuartCbTable[0].cbFunc)(leuartCbTable[0].userPtr); - } - } + if (LEUART0->IF & LEUART_IF_RXDATAV) + { + /* invoke callback function */ + if (leuartCbTable[0].cbFunc != RT_NULL) + { + (leuartCbTable[0].cbFunc)(leuartCbTable[0].userPtr); + } + } } #endif #if (defined(LEUART_PRESENT) && (LEUART_COUNT > 1)) /***************************************************************************//** * @brief - * Common LEUART1 interrupt handler + * Common LEUART1 interrupt handler * * @details - * This function handles LEUART1 interrupt request + * This function handles LEUART1 interrupt request * * @note * ******************************************************************************/ void LEUART1_IRQHandler(void) { - if (LEUART1->IF & LEUART_IF_RXDATAV) - { - /* invoke callback function */ - if (leuartCbTable[1].cbFunc != RT_NULL) - { - (leuartCbTable[1].cbFunc)(leuartCbTable[1].userPtr); - } - } + if (LEUART1->IF & LEUART_IF_RXDATAV) + { + /* invoke callback function */ + if (leuartCbTable[1].cbFunc != RT_NULL) + { + (leuartCbTable[1].cbFunc)(leuartCbTable[1].userPtr); + } + } } #endif #if defined(I2C_PRESENT) /***************************************************************************//** * @brief - * Common IIC0 interrupt handler + * Common IIC0 interrupt handler * * @details - * This function handles IIC0 slave mode interrupt requests + * This function handles IIC0 slave mode interrupt requests * * @note * ******************************************************************************/ void I2C0_IRQHandler(void) { - if ((I2C0->IF & I2C_IF_ADDR) || \ - (I2C0->IF & I2C_IF_RXDATAV) || \ - (I2C0->IF & I2C_IF_SSTOP)) - { - /* invoke callback function */ - if (iicCbTable[0].cbFunc != RT_NULL) - { - (iicCbTable[0].cbFunc)(iicCbTable[0].userPtr); - } - } + if ((I2C0->IF & I2C_IF_ADDR) || \ + (I2C0->IF & I2C_IF_RXDATAV) || \ + (I2C0->IF & I2C_IF_SSTOP)) + { + /* invoke callback function */ + if (iicCbTable[0].cbFunc != RT_NULL) + { + (iicCbTable[0].cbFunc)(iicCbTable[0].userPtr); + } + } - I2C_IntClear(I2C0, I2C_IFC_ADDR | I2C_IFC_SSTOP); + I2C_IntClear(I2C0, I2C_IFC_ADDR | I2C_IFC_SSTOP); } #endif /***************************************************************************//** * @brief - * EFM32 common interrupt handlers register function + * EFM32 common interrupt handlers register function * * @details * @@ -815,42 +815,42 @@ void I2C0_IRQHandler(void) ******************************************************************************/ void efm32_irq_hook_register(efm32_irq_hook_init_t *hook) { - switch (hook->type) - { - case efm32_irq_type_dma: - dmaCbTable[hook->unit].cbFunc = hook->cbFunc; - dmaCbTable[hook->unit].userPtr = hook->userPtr; - break; + switch (hook->type) + { + case efm32_irq_type_dma: + dmaCbTable[hook->unit].cbFunc = hook->cbFunc; + dmaCbTable[hook->unit].userPtr = hook->userPtr; + break; - case efm32_irq_type_rtc: - rtcCbTable[hook->unit].cbFunc = hook->cbFunc; - rtcCbTable[hook->unit].userPtr = hook->userPtr; - break; + case efm32_irq_type_rtc: + rtcCbTable[hook->unit].cbFunc = hook->cbFunc; + rtcCbTable[hook->unit].userPtr = hook->userPtr; + break; - case efm32_irq_type_timer: - timerCbTable[hook->unit].cbFunc = hook->cbFunc; - timerCbTable[hook->unit].userPtr = hook->userPtr; - break; + case efm32_irq_type_timer: + timerCbTable[hook->unit].cbFunc = hook->cbFunc; + timerCbTable[hook->unit].userPtr = hook->userPtr; + break; - case efm32_irq_type_letimer: - letimerCbTable[hook->unit].cbFunc = hook->cbFunc; - letimerCbTable[hook->unit].userPtr = hook->userPtr; - break; + case efm32_irq_type_letimer: + letimerCbTable[hook->unit].cbFunc = hook->cbFunc; + letimerCbTable[hook->unit].userPtr = hook->userPtr; + break; - case efm32_irq_type_gpio: - gpioCbTable[hook->unit].cbFunc = hook->cbFunc; - gpioCbTable[hook->unit].userPtr = hook->userPtr; - break; + case efm32_irq_type_gpio: + gpioCbTable[hook->unit].cbFunc = hook->cbFunc; + gpioCbTable[hook->unit].userPtr = hook->userPtr; + break; - case efm32_irq_type_acmp: - acmpCbTable[hook->unit].cbFunc = hook->cbFunc; - acmpCbTable[hook->unit].userPtr = hook->userPtr; - break; + case efm32_irq_type_acmp: + acmpCbTable[hook->unit].cbFunc = hook->cbFunc; + acmpCbTable[hook->unit].userPtr = hook->userPtr; + break; #if defined(USART_PRESENT) - case efm32_irq_type_usart: - usartCbTable[hook->unit].cbFunc = hook->cbFunc; - usartCbTable[hook->unit].userPtr = hook->userPtr; - break; + case efm32_irq_type_usart: + usartCbTable[hook->unit].cbFunc = hook->cbFunc; + usartCbTable[hook->unit].userPtr = hook->userPtr; + break; #endif #if defined(LEUART_PRESENT) case efm32_irq_type_leuart: @@ -859,17 +859,17 @@ void efm32_irq_hook_register(efm32_irq_hook_init_t *hook) break; #endif #if defined(I2C_PRESENT) - case efm32_irq_type_iic: - iicCbTable[hook->unit].cbFunc = hook->cbFunc; - iicCbTable[hook->unit].userPtr = hook->userPtr; - break; + case efm32_irq_type_iic: + iicCbTable[hook->unit].cbFunc = hook->cbFunc; + iicCbTable[hook->unit].userPtr = hook->userPtr; + break; #endif - default: - break; - } + default: + break; + } - hdl_debug("Hook Registered: type: %s, unit: %x, cbFunc: %x, userPtr: %x\n", \ - hook->type, hook->unit, hook->cbFunc, hook->userPtr); + hdl_debug("Hook Registered: type: %s, unit: %x, cbFunc: %x, userPtr: %x\n", \ + hook->type, hook->unit, hook->cbFunc, hook->userPtr); } /***************************************************************************//** diff --git a/bsp/efm32/hdl_interrupt.h b/bsp/efm32/hdl_interrupt.h index 01f7adf9f8..d2f73bda57 100644 --- a/bsp/efm32/hdl_interrupt.h +++ b/bsp/efm32/hdl_interrupt.h @@ -21,31 +21,31 @@ /* Exported types ------------------------------------------------------------*/ enum efm32_irq_hook_type_t { - efm32_irq_type_dma = 0, - efm32_irq_type_rtc, - efm32_irq_type_timer, + efm32_irq_type_dma = 0, + efm32_irq_type_rtc, + efm32_irq_type_timer, efm32_irq_type_letimer, - efm32_irq_type_gpio, - efm32_irq_type_acmp, - efm32_irq_type_usart, - efm32_irq_type_leuart, - efm32_irq_type_iic + efm32_irq_type_gpio, + efm32_irq_type_acmp, + efm32_irq_type_usart, + efm32_irq_type_leuart, + efm32_irq_type_iic }; typedef void (*efm32_irq_callback_t)(rt_device_t device); typedef struct { - enum efm32_irq_hook_type_t type; - rt_uint8_t unit; - efm32_irq_callback_t cbFunc; - void *userPtr; + enum efm32_irq_hook_type_t type; + rt_uint8_t unit; + efm32_irq_callback_t cbFunc; + void *userPtr; } efm32_irq_hook_init_t; typedef struct { - efm32_irq_callback_t cbFunc; - void *userPtr; + efm32_irq_callback_t cbFunc; + void *userPtr; } efm32_irq_hook_t; /* Exported constants --------------------------------------------------------*/ diff --git a/bsp/efm32/httpd.c b/bsp/efm32/httpd.c index c7094d509a..02c81be84d 100644 --- a/bsp/efm32/httpd.c +++ b/bsp/efm32/httpd.c @@ -1,8 +1,8 @@ /***************************************************************************//** - * @file httpd.c - * @brief Simple http server demo application + * @file httpd.c + * @brief Simple http server demo application * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -10,8 +10,8 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes - * 2011-07-04 onelife Derive from Energy Micro demo application + * Date Author Notes + * 2011-07-04 onelife Derive from Energy Micro demo application ******************************************************************************/ /**************************************************************************//** @@ -94,29 +94,29 @@ static int temp, vdd; static char indexdata[700]; static const char indexdata1[] = - "HTTP/1.0 200 OK\r\n\ - Content-type: text/html\r\n\ - Pragma: no-cache\r\n\ - Refresh: 5\r\n\ - \r\n\ - <html>\ - <head><title>EFM32 HTTPD DEMO</title><head>\ - <body>\ - <h1>This is a simple http server</h1>\ - <br><br><B>Ethernet controller: ENC28J60</B>\ - <br><br><B>Refreshing timers: "; + "HTTP/1.0 200 OK\r\n\ + Content-type: text/html\r\n\ + Pragma: no-cache\r\n\ + Refresh: 5\r\n\ + \r\n\ + <html>\ + <head><title>EFM32 HTTPD DEMO</title><head>\ + <body>\ + <h1>This is a simple http server</h1>\ + <br><br><B>Ethernet controller: ENC28J60</B>\ + <br><br><B>Refreshing timers: "; static const char indexdata2[] = - "<br><br><B>Current Vdd: "; + "<br><br><B>Current Vdd: "; static const char indexdata3[] = - " V</B>\ - <br><br><B>Current temperature: "; + " V</B>\ + <br><br><B>Current temperature: "; static const char indexdata4[] = - " C</B>\ - </body>\ - </html>"; + " C</B>\ + </body>\ + </html>"; /* Private function prototypes -----------------------------------------------*/ /* Private functions ---------------------------------------------------------*/ @@ -169,9 +169,9 @@ static err_t http_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err counter++; } - vdd = rt_hw_get_vdd(); - rt_sprintf(&indexdata[counter], "%1d.%02d", vdd / 100, vdd % 100); - counter += 4; + vdd = rt_hw_get_vdd(); + rt_sprintf(&indexdata[counter], "%1d.%02d", vdd / 100, vdd % 100); + counter += 4; for (i = 0; i < sizeof(indexdata3) - 1; i++) { @@ -179,15 +179,15 @@ static err_t http_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err counter++; } - temp = rt_hw_get_temp(); + temp = rt_hw_get_temp(); /*Set temperature sign*/ if (temp < 0) { indexdata[counter] = '-'; counter++; } - rt_sprintf(&indexdata[counter], "%02d.%02d\n", temp / 100, temp % 100); - counter += 5; + rt_sprintf(&indexdata[counter], "%02d.%02d\n", temp / 100, temp % 100); + counter += 5; for (i = 0; i < sizeof(indexdata4); i++) { diff --git a/bsp/efm32/mma7455l.h b/bsp/efm32/mma7455l.h index 2ea2cdf34e..c746fd45da 100644 --- a/bsp/efm32/mma7455l.h +++ b/bsp/efm32/mma7455l.h @@ -1,9 +1,9 @@ /***************************************************************************//** - * @file mma7455l.c - * @brief Header file of Freescale MMA7455L 3 axis Low-g digital output + * @file mma7455l.c + * @brief Header file of Freescale MMA7455L 3 axis Low-g digital output * accelerometer * COPYRIGHT (C) 2012, RT-Thread Development Team - * @author onelife + * @author onelife * @version 1.0 ******************************************************************************* * @section License @@ -11,101 +11,101 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes - * 2011-08-02 onelife Initial creation + * Date Author Notes + * 2011-08-02 onelife Initial creation ******************************************************************************/ #ifndef __MMA7455L_H__ #define __MMA7455L_H__ -#define XOUTL 0x00 //00 10 bits output value X LSB (Read only) -#define XOUTH 0x01 //01 10 bits output value X MSB (Read only) -#define YOUTL 0x02 //02 10 bits output value Y LSB (Read only) -#define YOUTH 0x03 //03 10 bits output value Y MSB (Read only) -#define ZOUTL 0x04 //04 10 bits output value Z LSB (Read only) -#define ZOUTH 0x05 //05 10 bits output value Z MSB (Read only) -#define XOUT8 0x06 //06 8 bits Output value X (Read only) -#define YOUT8 0x07 //07 8 bits Output value Y (Read only) -#define ZOUT8 0x08 //08 8 bits Output value Z (Read only) -#define STATUS 0x09 //09 Status registers (Read only) -#define DETSRC 0x0A //10 Detection source registers (Read only) -#define TOUT 0x0B //11 Temperature output value (Optional) -#define RESERVED1 0x0C //12 Reserved -#define I2CAD 0x0D //13 I2C device address (Bit[6:0]: Read only, Bit[7]: Read/Write) -#define USRINF 0x0E //14 User information (Optional, Read only) -#define WHOAMI 0x0F //15 Who am I value (Optional, Read only) -#define XOFFL 0x10 //16 Offset drift X value (LSB) (Read/Write) -#define XOFFH 0x11 //17 Offset drift X value (MSB) (Read/Write) -#define YOFFL 0x12 //18 Offset drift Y value (LSB) (Read/Write) -#define YOFFH 0x13 //19 Offset drift Y value (MSB) (Read/Write) -#define ZOFFL 0x14 //20 Offset drift Z value (LSB) (Read/Write) -#define ZOFFH 0x15 //21 Offset drift Z value (MSB) (Read/Write) -#define MCTL 0x16 //22 Mode control (Read/Write) -#define INTRST 0x17 //23 Interrupt latch reset (Read/Write) -#define CTL1 0x18 //24 Control 1 (Read/Write) -#define CTL2 0x19 //25 Control 2 (Read/Write) -#define LDTH 0x1A //26 Level detection threshold limit value (Read/Write) -#define PDTH 0x1B //27 Pulse detection threshold limit value (Read/Write) -#define PW 0x1C //28 Pulse duration value (Read/Write) -#define LT 0x1D //29 Latency time value (Read/Write) -#define TW 0x1E //30 Time window for second pulse value(Read/Write) -#define RESERVED2 0x1F //31 Reserved +#define XOUTL 0x00 //00 10 bits output value X LSB (Read only) +#define XOUTH 0x01 //01 10 bits output value X MSB (Read only) +#define YOUTL 0x02 //02 10 bits output value Y LSB (Read only) +#define YOUTH 0x03 //03 10 bits output value Y MSB (Read only) +#define ZOUTL 0x04 //04 10 bits output value Z LSB (Read only) +#define ZOUTH 0x05 //05 10 bits output value Z MSB (Read only) +#define XOUT8 0x06 //06 8 bits Output value X (Read only) +#define YOUT8 0x07 //07 8 bits Output value Y (Read only) +#define ZOUT8 0x08 //08 8 bits Output value Z (Read only) +#define STATUS 0x09 //09 Status registers (Read only) +#define DETSRC 0x0A //10 Detection source registers (Read only) +#define TOUT 0x0B //11 Temperature output value (Optional) +#define RESERVED1 0x0C //12 Reserved +#define I2CAD 0x0D //13 I2C device address (Bit[6:0]: Read only, Bit[7]: Read/Write) +#define USRINF 0x0E //14 User information (Optional, Read only) +#define WHOAMI 0x0F //15 Who am I value (Optional, Read only) +#define XOFFL 0x10 //16 Offset drift X value (LSB) (Read/Write) +#define XOFFH 0x11 //17 Offset drift X value (MSB) (Read/Write) +#define YOFFL 0x12 //18 Offset drift Y value (LSB) (Read/Write) +#define YOFFH 0x13 //19 Offset drift Y value (MSB) (Read/Write) +#define ZOFFL 0x14 //20 Offset drift Z value (LSB) (Read/Write) +#define ZOFFH 0x15 //21 Offset drift Z value (MSB) (Read/Write) +#define MCTL 0x16 //22 Mode control (Read/Write) +#define INTRST 0x17 //23 Interrupt latch reset (Read/Write) +#define CTL1 0x18 //24 Control 1 (Read/Write) +#define CTL2 0x19 //25 Control 2 (Read/Write) +#define LDTH 0x1A //26 Level detection threshold limit value (Read/Write) +#define PDTH 0x1B //27 Pulse detection threshold limit value (Read/Write) +#define PW 0x1C //28 Pulse duration value (Read/Write) +#define LT 0x1D //29 Latency time value (Read/Write) +#define TW 0x1E //30 Time window for second pulse value(Read/Write) +#define RESERVED2 0x1F //31 Reserved /* For DETSRC */ -#define DETSRC_INT_1 (0x01 << 0) -#define DETSRC_INT_2 (0x01 << 1) -#define DETSRC_PULSE_Z (0x01 << 2) -#define DETSRC_PULSE_Y (0x01 << 3) -#define DETSRC_PULSE_X (0x01 << 4) -#define DETSRC_LEVEL_Z (0x01 << 5) -#define DETSRC_LEVEL_Y (0x01 << 6) -#define DETSRC_LEVEL_X (0x01 << 7) +#define DETSRC_INT_1 (0x01 << 0) +#define DETSRC_INT_2 (0x01 << 1) +#define DETSRC_PULSE_Z (0x01 << 2) +#define DETSRC_PULSE_Y (0x01 << 3) +#define DETSRC_PULSE_X (0x01 << 4) +#define DETSRC_LEVEL_Z (0x01 << 5) +#define DETSRC_LEVEL_Y (0x01 << 6) +#define DETSRC_LEVEL_X (0x01 << 7) /* For MCTL */ -#define MCTL_SHIFT_MODE (0) -#define MCTL_SHIFT_G (2) -#define MCTL_MASK_MODE (0x03) -#define MCTL_MASK_G (0x0c) -#define MCTL_MODE_STANDBY (0x00 << MCTL_SHIFT_MODE) -#define MCTL_MODE_MEASUREMENT (0x01 << MCTL_SHIFT_MODE) -#define MCTL_MODE_LEVEL (0x02 << MCTL_SHIFT_MODE) -#define MCTL_MODE_PULSE (0x03 << MCTL_SHIFT_MODE) -#define MCTL_RANGE_8G (0x00 << MCTL_SHIFT_G) -#define MCTL_RANGE_4G (0x02 << MCTL_SHIFT_G) -#define MCTL_RANGE_2G (0x01 << MCTL_SHIFT_G) -#define MCTL_PIN_INT1 (0x01 << 6) +#define MCTL_SHIFT_MODE (0) +#define MCTL_SHIFT_G (2) +#define MCTL_MASK_MODE (0x03) +#define MCTL_MASK_G (0x0c) +#define MCTL_MODE_STANDBY (0x00 << MCTL_SHIFT_MODE) +#define MCTL_MODE_MEASUREMENT (0x01 << MCTL_SHIFT_MODE) +#define MCTL_MODE_LEVEL (0x02 << MCTL_SHIFT_MODE) +#define MCTL_MODE_PULSE (0x03 << MCTL_SHIFT_MODE) +#define MCTL_RANGE_8G (0x00 << MCTL_SHIFT_G) +#define MCTL_RANGE_4G (0x02 << MCTL_SHIFT_G) +#define MCTL_RANGE_2G (0x01 << MCTL_SHIFT_G) +#define MCTL_PIN_INT1 (0x01 << 6) /* For INTRST */ -#define INTRST_INT_1 (0x01 << 0) -#define INTRST_INT_2 (0x01 << 1) +#define INTRST_INT_1 (0x01 << 0) +#define INTRST_INT_2 (0x01 << 1) /* For CTL1 */ -#define CTL1_SHIFT_INTPIN (0) -#define CTL1_SHIFT_INT (1) -#define CTL1_SHIFT_AXES (3) -#define CTL1_SHIFT_THRESHOLD (6) -#define CTL1_SHIFT_BANDWIDTH (7) -#define CTL1_MASK_AXES (0x38) -#define CTL1_INTPIN_INVERSE (0x01 << CTL1_SHIFT_INTPIN) -#define CTL1_INT_LEVEL_PULSE (0x00 << CTL1_SHIFT_INT) -#define CTL1_INT_PULSE_LEVEL (0x01 << CTL1_SHIFT_INT) -#define CTL1_INT_SINGLE_DOUBLE (0x02 << CTL1_SHIFT_INT) -#define CTL1_X_DISABLE (0x01 << CTL1_SHIFT_AXES) -#define CTL1_Y_DISABLE (0x02 << CTL1_SHIFT_AXES) -#define CTL1_Z_DISABLE (0x04 << CTL1_SHIFT_AXES) -#define CTL1_THRESHOLD_ABSOLUTE (0x00 << CTL1_SHIFT_THRESHOLD) -#define CTL1_THRESHOLD_INTEGER (0x01 << CTL1_SHIFT_THRESHOLD) -#define CTL1_BANDWIDTH_62_5HZ (0x00 << CTL1_SHIFT_BANDWIDTH) -#define CTL1_BANDWIDTH_125HZ (0x01 << CTL1_SHIFT_BANDWIDTH) +#define CTL1_SHIFT_INTPIN (0) +#define CTL1_SHIFT_INT (1) +#define CTL1_SHIFT_AXES (3) +#define CTL1_SHIFT_THRESHOLD (6) +#define CTL1_SHIFT_BANDWIDTH (7) +#define CTL1_MASK_AXES (0x38) +#define CTL1_INTPIN_INVERSE (0x01 << CTL1_SHIFT_INTPIN) +#define CTL1_INT_LEVEL_PULSE (0x00 << CTL1_SHIFT_INT) +#define CTL1_INT_PULSE_LEVEL (0x01 << CTL1_SHIFT_INT) +#define CTL1_INT_SINGLE_DOUBLE (0x02 << CTL1_SHIFT_INT) +#define CTL1_X_DISABLE (0x01 << CTL1_SHIFT_AXES) +#define CTL1_Y_DISABLE (0x02 << CTL1_SHIFT_AXES) +#define CTL1_Z_DISABLE (0x04 << CTL1_SHIFT_AXES) +#define CTL1_THRESHOLD_ABSOLUTE (0x00 << CTL1_SHIFT_THRESHOLD) +#define CTL1_THRESHOLD_INTEGER (0x01 << CTL1_SHIFT_THRESHOLD) +#define CTL1_BANDWIDTH_62_5HZ (0x00 << CTL1_SHIFT_BANDWIDTH) +#define CTL1_BANDWIDTH_125HZ (0x01 << CTL1_SHIFT_BANDWIDTH) /* For CTL2 */ -#define CTL1_SHIFT_LEVEL (0) -#define CTL1_SHIFT_PULSE (1) -#define CTL1_SHIFT_DRIVE (2) -#define CTL2_LEVEL_OR (0x00 << CTL1_SHIFT_LEVEL) -#define CTL2_LEVEL_AND (0x01 << CTL1_SHIFT_LEVEL) -#define CTL2_PULSE_OR (0x00 << CTL1_SHIFT_PULSE) -#define CTL2_PULSE_AND (0x01 << CTL1_SHIFT_PULSE) -#define CTL2_DRIVE_STANDARD (0x00 << CTL1_SHIFT_DRIVE) -#define CTL2_DRIVE_STRONG (0x01 << CTL1_SHIFT_DRIVE) +#define CTL1_SHIFT_LEVEL (0) +#define CTL1_SHIFT_PULSE (1) +#define CTL1_SHIFT_DRIVE (2) +#define CTL2_LEVEL_OR (0x00 << CTL1_SHIFT_LEVEL) +#define CTL2_LEVEL_AND (0x01 << CTL1_SHIFT_LEVEL) +#define CTL2_PULSE_OR (0x00 << CTL1_SHIFT_PULSE) +#define CTL2_PULSE_AND (0x01 << CTL1_SHIFT_PULSE) +#define CTL2_DRIVE_STANDARD (0x00 << CTL1_SHIFT_DRIVE) +#define CTL2_DRIVE_STRONG (0x01 << CTL1_SHIFT_DRIVE) #endif /* __MMA7455L_H__ */ diff --git a/bsp/efm32/rtconfig.h b/bsp/efm32/rtconfig.h index 040f07fa02..6e12d1ff6b 100644 --- a/bsp/efm32/rtconfig.h +++ b/bsp/efm32/rtconfig.h @@ -1,7 +1,7 @@ /***************************************************************************//** * @file rtconfig.h * @brief RT-Thread config file - * COPYRIGHT (C) 2009, RT-Thread Development Team + * COPYRIGHT (C) 2009, RT-Thread Development Team * @author * @version 1.0 ******************************************************************************* @@ -22,23 +22,23 @@ #define EFM32GG_DK3750 /* RT_NAME_MAX */ -#define RT_NAME_MAX (8) +#define RT_NAME_MAX (8) /* RT_ALIGN_SIZE */ -#define RT_ALIGN_SIZE (4) +#define RT_ALIGN_SIZE (4) /* PRIORITY_MAX */ -#define RT_THREAD_PRIORITY_MAX (32) +#define RT_THREAD_PRIORITY_MAX (32) /* Tick per Second */ -#define RT_TICK_PER_SECOND (100) +#define RT_TICK_PER_SECOND (100) /* SECTION: RT_DEBUG */ #define RT_DEBUG #define RT_DEBUG_COLOR -//#define RT_DEBUG_MEM (1) -//#define RT_DEBUG_SCHEDULER (1) -//#define RT_DEBUG_IPC (1) +//#define RT_DEBUG_MEM (1) +//#define RT_DEBUG_SCHEDULER (1) +//#define RT_DEBUG_IPC (1) //#define THREAD_DEBUG //#define IRQ_DEBUG #define RT_USING_OVERFLOW_CHECK @@ -69,9 +69,9 @@ /* Using Software Timer */ /* #define RT_USING_TIMER_SOFT */ -#define RT_TIMER_THREAD_PRIO (4) -#define RT_TIMER_THREAD_STACK_SIZE (512) -#define RT_TIMER_TICK_PER_SECOND (10) +#define RT_TIMER_THREAD_PRIO (4) +#define RT_TIMER_THREAD_STACK_SIZE (512) +#define RT_TIMER_TICK_PER_SECOND (10) /* SECTION: IPC */ /* Using Semaphore*/ @@ -134,10 +134,10 @@ #define EFM32_SPI_CLK_MODE(mode) (mode << 3) /* clock mode */ #if defined(EFM32_G8XX_STK) -//#define RT_USING_USART0 (0x0UL) -//#define RT_USART0_SYNC_MODE (EFM32_SPI_MASTER) -//#define RT_USART0_NAME "spi0" -//#define RT_USART0_USING_DMA (0x1UL) +//#define RT_USING_USART0 (0x0UL) +//#define RT_USART0_SYNC_MODE (EFM32_SPI_MASTER) +//#define RT_USART0_NAME "spi0" +//#define RT_USART0_USING_DMA (0x1UL) #elif defined(EFM32_GXXX_DK) #define RT_USING_USART0 (0x2UL) #define RT_USART0_SYNC_MODE (EFM32_SPI_MASTER | EFM32_SPI_AUTOCS | \ @@ -165,28 +165,28 @@ #endif /* SECTION: IIC options */ -//#define RT_USING_IIC0 0x3UL -#define RT_IIC0_NAME "iic0" +//#define RT_USING_IIC0 0x3UL +#define RT_IIC0_NAME "iic0" /* SECTION: ACMP options */ //#define RT_USING_ACMP0 -#define RT_ACMP0_NAME "acmp0" +#define RT_ACMP0_NAME "acmp0" /* SECTION: ADC options */ #define RT_USING_ADC0 -#define RT_ADC0_NAME "adc0" +#define RT_ADC0_NAME "adc0" #if defined(RT_USING_ADC0) #define RT_USING_MISC #endif /* SECTION: TIMER options */ -//#define RT_USING_TIMER2 (0x00) /* Continuous mode */ -#define RT_TIMER2_NAME "tmr2" +//#define RT_USING_TIMER2 (0x00) /* Continuous mode */ +#define RT_TIMER2_NAME "tmr2" /* SECTION: RTC options */ #if (defined(EFM32_G8XX_STK) || defined(EFM32_GXXX_DK) || defined(EFM32GG_DK3750)) #define RT_USING_RTC -#define RT_RTC_NAME "rtc" +#define RT_RTC_NAME "rtc" #endif /* SECTION: Serial options */ @@ -199,9 +199,9 @@ #define EFM_LEUART1 (0x21UL) #if defined(EFM32_G8XX_STK) -#define RT_CONSOLE_DEVICE (EFM_USART1) +#define RT_CONSOLE_DEVICE (EFM_USART1) #elif defined(EFM32_GXXX_DK) -#define RT_CONSOLE_DEVICE (EFM_USART1) +#define RT_CONSOLE_DEVICE (EFM_USART1) #elif defined(EFM32GG_DK3750) #if defined(EFM32GG_DK3750_USING_LEUART1) #define RT_CONSOLE_DEVICE (EFM_LEUART1) @@ -218,7 +218,7 @@ /* SECTION: Console options */ #define RT_USING_CONSOLE /* the buffer size of console*/ -#define RT_CONSOLEBUF_SIZE (128) +#define RT_CONSOLEBUF_SIZE (128) /* SECTION: finsh, a C-Express shell */ #define RT_USING_FINSH @@ -227,12 +227,12 @@ #define FINSH_USING_DESCRIPTION /* SECTION: Peripheral devices */ -#define EFM32_INTERFACE_ADC (0) -#define EFM32_INTERFACE_IIC (1) -#define EFM32_INTERFACE_SPI (2) +#define EFM32_INTERFACE_ADC (0) +#define EFM32_INTERFACE_IIC (1) +#define EFM32_INTERFACE_SPI (2) #if (defined(EFM32_GXXX_DK) || defined(EFM32GG_DK3750)) -//#define EFM32_USING_ACCEL EFM32_INTERFACE_IIC /* Three axis accelerometer */ -//#define EFM32_USING_SFLASH /* SPI Flash */ +//#define EFM32_USING_ACCEL EFM32_INTERFACE_IIC /* Three axis accelerometer */ +//#define EFM32_USING_SFLASH /* SPI Flash */ #define EFM32_USING_SPISD /* MicroSD card */ //#define EFM32_USING_ETHERNET /* Ethernet controller */ //#define EFM32_USING_LCD /* TFT LCD */ @@ -241,30 +241,30 @@ #if defined(EFM32_USING_ACCEL) #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC) -#define ACCEL_USING_DEVICE_NAME RT_ADC0_NAME -#define ACCEL_USING_DMA (0x3UL) /* For multiple channels scan mode */ +#define ACCEL_USING_DEVICE_NAME RT_ADC0_NAME +#define ACCEL_USING_DMA (0x3UL) /* For multiple channels scan mode */ #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC) -#define ACCEL_USING_DEVICE_NAME RT_IIC0_NAME +#define ACCEL_USING_DEVICE_NAME RT_IIC0_NAME #endif #endif #if defined(EFM32_USING_SFLASH) -#define SFLASH_USING_DEVICE_NAME RT_USART0_NAME +#define SFLASH_USING_DEVICE_NAME RT_USART0_NAME #endif #if defined(EFM32_USING_SPISD) -#define SPISD_USING_DEVICE_NAME RT_USART0_NAME -#define SPISD_DEVICE_NAME "spiSd" +#define SPISD_USING_DEVICE_NAME RT_USART0_NAME +#define SPISD_DEVICE_NAME "spiSd" #endif #if defined(EFM32_USING_ETHERNET) #if defined(EFM32_GXXX_DK) - #define ETH_USING_DEVICE_NAME RT_USART2_NAME + #define ETH_USING_DEVICE_NAME RT_USART2_NAME #elif defined(EFM32GG_DK3750) - #define ETH_USING_DEVICE_NAME RT_USART1_NAME + #define ETH_USING_DEVICE_NAME RT_USART1_NAME #endif -#define ETH_DEVICE_NAME "spiEth" -#define ETH_ADDR_DEFAULT {0x00, 0x01, 0x02, 0x03, 0x04, 0x05} +#define ETH_DEVICE_NAME "spiEth" +#define ETH_ADDR_DEFAULT {0x00, 0x01, 0x02, 0x03, 0x04, 0x05} #endif /* SECTION: device filesystem */ @@ -272,9 +272,9 @@ #define RT_USING_DFS /* the max number of mounted filesystem */ #define DFS_FILESYSTEMS_MAX (2) -/* the max number of opened files */ +/* the max number of opened files */ #define DFS_FD_MAX (4) -/* the max number of cached sector */ +/* the max number of cached sector */ #define DFS_CACHE_MAX_NUM (4) #endif /* defined(RT_USING_NEWLIB) || defined(EFM32_USING_SPISD) */ #if defined(EFM32_USING_SPISD) @@ -289,8 +289,8 @@ #if defined(EFM32_USING_ETHERNET) #define EFM32_USING_ETH_HTTPD //#define EFM32_USING_ETH_UTILS -//#define hostName "onelife.dyndns.org" -//#define userPwdB64 "dXNlcjpwYXNzd2Q=" +//#define hostName "onelife.dyndns.org" +//#define userPwdB64 "dXNlcjpwYXNzd2Q=" //#define RT_USING_LWIP //#define RT_USING_NETUTILS @@ -309,37 +309,37 @@ //#define RT_LWIP_DNS /* the number of simulatenously active TCP connections*/ -#define RT_LWIP_TCP_PCB_NUM (2) +#define RT_LWIP_TCP_PCB_NUM (2) /* ip address of target*/ -#define RT_LWIP_IPADDR0 (192) -#define RT_LWIP_IPADDR1 (168) -#define RT_LWIP_IPADDR2 (1) -#define RT_LWIP_IPADDR3 (118) +#define RT_LWIP_IPADDR0 (192) +#define RT_LWIP_IPADDR1 (168) +#define RT_LWIP_IPADDR2 (1) +#define RT_LWIP_IPADDR3 (118) /* gateway address of target*/ -#define RT_LWIP_GWADDR0 (192) -#define RT_LWIP_GWADDR1 (168) -#define RT_LWIP_GWADDR2 (1) -#define RT_LWIP_GWADDR3 (1) +#define RT_LWIP_GWADDR0 (192) +#define RT_LWIP_GWADDR1 (168) +#define RT_LWIP_GWADDR2 (1) +#define RT_LWIP_GWADDR3 (1) /* mask address of target*/ -#define RT_LWIP_MSKADDR0 (255) -#define RT_LWIP_MSKADDR1 (255) -#define RT_LWIP_MSKADDR2 (255) -#define RT_LWIP_MSKADDR3 (0) +#define RT_LWIP_MSKADDR0 (255) +#define RT_LWIP_MSKADDR1 (255) +#define RT_LWIP_MSKADDR2 (255) +#define RT_LWIP_MSKADDR3 (0) /* tcp thread options */ -#define RT_LWIP_TCPTHREAD_PRIORITY (12) -#define RT_LWIP_TCPTHREAD_MBOX_SIZE (4) -#define RT_LWIP_TCPTHREAD_STACKSIZE (1024) +#define RT_LWIP_TCPTHREAD_PRIORITY (12) +#define RT_LWIP_TCPTHREAD_MBOX_SIZE (4) +#define RT_LWIP_TCPTHREAD_STACKSIZE (1024) /* ethernet if thread options */ -#define RT_LWIP_ETHTHREAD_PRIORITY (15) -#define RT_LWIP_ETHTHREAD_MBOX_SIZE (4) -#define RT_LWIP_ETHTHREAD_STACKSIZE (512) +#define RT_LWIP_ETHTHREAD_PRIORITY (15) +#define RT_LWIP_ETHTHREAD_MBOX_SIZE (4) +#define RT_LWIP_ETHTHREAD_STACKSIZE (512) #endif /* defined(EFM32_USING_ETHERNET) */ /* SECTION: RTGUI support */ #if defined(EFM32_USING_LCD) -#define LCD_USING_DEVICE_NAME RT_USART1_NAME +#define LCD_USING_DEVICE_NAME RT_USART1_NAME #define LCD_DEVICE_NAME "lcd" /* using RTGUI support */ // #define RT_USING_RTGUI diff --git a/bsp/efm32/startup.c b/bsp/efm32/startup.c index f997c6aadd..b5af1d5833 100644 --- a/bsp/efm32/startup.c +++ b/bsp/efm32/startup.c @@ -10,12 +10,12 @@ * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE ******************************************************************************* * @section Change Logs - * Date Author Notes + * Date Author Notes * 2006-08-31 Bernard first implementation * 2010-12-29 onelife Modify for EFM32 * 2011-12-20 onelife Add RTGUI initialization routine * 2012-02-21 onelife Add energy management initialization routine - * 2012-05-15 onelife Modified to compatible with CMSIS v3 + * 2012-05-15 onelife Modified to compatible with CMSIS v3 ******************************************************************************/ /***************************************************************************//** |