diff options
Diffstat (limited to 'bsp/gd32303e-eval/drivers/drv_gpio.c')
| -rw-r--r-- | bsp/gd32303e-eval/drivers/drv_gpio.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/bsp/gd32303e-eval/drivers/drv_gpio.c b/bsp/gd32303e-eval/drivers/drv_gpio.c index 2270ec1b89..a96cecc13e 100644 --- a/bsp/gd32303e-eval/drivers/drv_gpio.c +++ b/bsp/gd32303e-eval/drivers/drv_gpio.c @@ -257,7 +257,7 @@ void gd32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) /* GPIO Periph clock enable */ rcu_periph_clock_enable(index->clk); pin_mode = GPIO_MODE_OUT_PP; - + switch(mode) { case PIN_MODE_OUTPUT: @@ -438,7 +438,7 @@ rt_err_t gd32_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_ return RT_EINVAL; } irqmap = &pin_irq_map[hdr_index]; - + switch (pin_irq_hdr_tab[hdr_index].mode) { case PIN_IRQ_MODE_RISING: @@ -459,14 +459,14 @@ rt_err_t gd32_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_ /* enable and set interrupt priority */ nvic_irq_enable(irqmap->irqno, 5U, 0U); - + /* connect EXTI line to GPIO pin */ gpio_exti_source_select(index->port_src, index->pin_src); /* configure EXTI line */ exti_init((exti_line_enum)(index->pin), EXTI_INTERRUPT, trigger_mode); exti_interrupt_flag_clear((exti_line_enum)(index->pin)); - + rt_hw_interrupt_enable(level); } else if (enabled == PIN_IRQ_DISABLE) @@ -501,7 +501,7 @@ int rt_hw_pin_init(void) int result; result = rt_device_pin_register("pin", &_gd32_pin_ops, RT_NULL); - + return result; } INIT_BOARD_EXPORT(rt_hw_pin_init); @@ -520,7 +520,7 @@ void GD32_GPIO_EXTI_IRQHandler(rt_int8_t exti_line) { pin_irq_hdr(exti_line); exti_interrupt_flag_clear((exti_line_enum)(1 << exti_line)); - } + } } void EXTI0_IRQHandler(void) { |