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-rw-r--r--bsp/lpc2148/applications/application.c2
-rw-r--r--bsp/lpc2148/applications/startup.c2
-rw-r--r--bsp/lpc2148/drivers/board.c82
-rw-r--r--bsp/lpc2148/drivers/board.h8
-rw-r--r--bsp/lpc2148/drivers/dm9000.c88
-rw-r--r--bsp/lpc2148/drivers/sd.c82
-rw-r--r--bsp/lpc2148/drivers/serial.c450
-rw-r--r--bsp/lpc2148/rtconfig.h46
8 files changed, 380 insertions, 380 deletions
diff --git a/bsp/lpc2148/applications/application.c b/bsp/lpc2148/applications/application.c
index fd07f22f05..731b30a510 100644
--- a/bsp/lpc2148/applications/application.c
+++ b/bsp/lpc2148/applications/application.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
diff --git a/bsp/lpc2148/applications/startup.c b/bsp/lpc2148/applications/startup.c
index 5b699a8613..3b245604ee 100644
--- a/bsp/lpc2148/applications/startup.c
+++ b/bsp/lpc2148/applications/startup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
diff --git a/bsp/lpc2148/drivers/board.c b/bsp/lpc2148/drivers/board.c
index 96a4aa62f4..757e1cb8f0 100644
--- a/bsp/lpc2148/drivers/board.c
+++ b/bsp/lpc2148/drivers/board.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -25,13 +25,13 @@
*/
void rt_hw_timer_handler(int vector, void *param)
{
- rt_tick_increase();
+ rt_tick_increase();
- /* clear interrupt flag */
- T0IR |= 0x01;
+ /* clear interrupt flag */
+ T0IR |= 0x01;
- /* acknowledge Interrupt */
- VICVectAddr = 0;
+ /* acknowledge Interrupt */
+ VICVectAddr = 0;
}
/**
@@ -42,37 +42,37 @@ void rt_hw_timer_handler(int vector, void *param)
*/
void rt_hw_console_output(const char* str)
{
- while (*str)
- {
- if (*str=='\n')
- {
- while (!(U0LSR & 0x20));
- U0THR = '\r';
- }
+ while (*str)
+ {
+ if (*str=='\n')
+ {
+ while (!(U0LSR & 0x20));
+ U0THR = '\r';
+ }
- while (!(U0LSR & 0x20));
- U0THR = *str;
+ while (!(U0LSR & 0x20));
+ U0THR = *str;
- str ++;
- }
+ str ++;
+ }
}
-#define BAUD_RATE 115200
-#define U0PINS 0x05
+#define BAUD_RATE 115200
+#define U0PINS 0x05
void rt_hw_console_init()
{
- /* Enable RxD and TxD pins */
- PINSEL0 = U0PINS;
+ /* Enable RxD and TxD pins */
+ PINSEL0 = U0PINS;
- /* 8 bits, no Parity, 1 Stop bit */
- U0LCR = 0x83;
+ /* 8 bits, no Parity, 1 Stop bit */
+ U0LCR = 0x83;
- /* Setup Baudrate */
- U0DLL = (PCLK/16/BAUD_RATE) & 0xFF;
- U0DLM = ((PCLK/16/BAUD_RATE) >> 8) & 0xFF;
+ /* Setup Baudrate */
+ U0DLL = (PCLK/16/BAUD_RATE) & 0xFF;
+ U0DLM = ((PCLK/16/BAUD_RATE) >> 8) & 0xFF;
- /* DLAB = 0 */
- U0LCR = 0x03;
+ /* DLAB = 0 */
+ U0LCR = 0x03;
}
/**
@@ -80,23 +80,23 @@ void rt_hw_console_init()
*/
void rt_hw_board_init(void)
{
- /* console init */
- rt_hw_console_init();
+ /* console init */
+ rt_hw_console_init();
- /* prescaler = 0*/
- T0PR = 0;
- T0PC = 0;
+ /* prescaler = 0*/
+ T0PR = 0;
+ T0PC = 0;
- /* reset and enable MR0 interrupt */
- T0MCR = 0x3;
- T0MR0 = PCLK / RT_TICK_PER_SECOND;
+ /* reset and enable MR0 interrupt */
+ T0MCR = 0x3;
+ T0MR0 = PCLK / RT_TICK_PER_SECOND;
- /* enable timer 0 */
- T0TCR = 1;
+ /* enable timer 0 */
+ T0TCR = 1;
- /* install timer handler */
- rt_hw_interrupt_install(TIMER0_INT, rt_hw_timer_handler, RT_NULL, "TIMER0");
- rt_hw_interrupt_umask(TIMER0_INT);
+ /* install timer handler */
+ rt_hw_interrupt_install(TIMER0_INT, rt_hw_timer_handler, RT_NULL, "TIMER0");
+ rt_hw_interrupt_umask(TIMER0_INT);
}
/*@}*/
diff --git a/bsp/lpc2148/drivers/board.h b/bsp/lpc2148/drivers/board.h
index 346f10182f..957f360652 100644
--- a/bsp/lpc2148/drivers/board.h
+++ b/bsp/lpc2148/drivers/board.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -12,13 +12,13 @@
#define __BOARD_H__
#include <rtthread.h>
-#define CCLK 60000000 /* Fosc = 12MHz, M = 5 */
-#define PCLK 15000000 /* CCLK/4, use default */
+#define CCLK 60000000 /* Fosc = 12MHz, M = 5 */
+#define PCLK 15000000 /* CCLK/4, use default */
/* RT_USING_UART */
#define RT_USING_UART1
#define RT_USING_UART2
-#define RT_UART_RX_BUFFER_SIZE 64
+#define RT_UART_RX_BUFFER_SIZE 64
void rt_hw_board_init(void);
diff --git a/bsp/lpc2148/drivers/dm9000.c b/bsp/lpc2148/drivers/dm9000.c
index 169be59f12..9bc8d445f9 100644
--- a/bsp/lpc2148/drivers/dm9000.c
+++ b/bsp/lpc2148/drivers/dm9000.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -15,11 +15,11 @@
#define MAX_ADDR_LEN 6
struct rt_dm9000_eth
{
- /* inherit from ethernet device */
- struct eth_device parent;
+ /* inherit from ethernet device */
+ struct eth_device parent;
- /* interface address info. */
- rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
+ /* interface address info. */
+ rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
};
static struct rt_dm9000_eth dm9000_device;
@@ -52,67 +52,67 @@ static rt_err_t rt_dm9000_init(rt_device_t dev)
static rt_err_t rt_dm9000_open(rt_device_t dev, rt_uint16_t oflag)
{
- return RT_EOK;
+ return RT_EOK;
}
static rt_err_t rt_dm9000_close(rt_device_t dev)
{
- return RT_EOK;
+ return RT_EOK;
}
static rt_size_t rt_dm9000_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
- rt_set_errno(-RT_ENOSYS);
- return 0;
+ rt_set_errno(-RT_ENOSYS);
+ return 0;
}
static rt_size_t rt_dm9000_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
- rt_set_errno(-RT_ENOSYS);
- return 0;
+ rt_set_errno(-RT_ENOSYS);
+ return 0;
}
static rt_err_t rt_dm9000_control(rt_device_t dev, int cmd, void *args)
{
- switch(cmd)
- {
- case NIOCTL_GADDR:
- /* get mac address */
- if(args) rt_memcpy(args, dm9000_device.dev_addr, 6);
- else return -RT_ERROR;
- break;
+ switch(cmd)
+ {
+ case NIOCTL_GADDR:
+ /* get mac address */
+ if(args) rt_memcpy(args, dm9000_device.dev_addr, 6);
+ else return -RT_ERROR;
+ break;
- default :
- break;
- }
+ default :
+ break;
+ }
- return RT_EOK;
+ return RT_EOK;
}
/* ethernet device interface */
/* transmit packet. */
rt_err_t rt_dm9000_tx( rt_device_t dev, struct pbuf* p)
{
- struct pbuf* q;
- rt_uint32_t len;
- rt_uint8_t* ptr;
+ struct pbuf* q;
+ rt_uint32_t len;
+ rt_uint8_t* ptr;
- for (q = p; q != NULL; q = q->next)
- {
- len = q->len;
- ptr = q->payload;
+ for (q = p; q != NULL; q = q->next)
+ {
+ len = q->len;
+ ptr = q->payload;
- /* write data to device */
- }
+ /* write data to device */
+ }
- return RT_EOK;
+ return RT_EOK;
}
/* reception packet. */
struct pbuf *rt_dm9000_rx(rt_device_t dev)
{
struct pbuf* p;
- rt_uint32_t len;
+ rt_uint32_t len;
/* init p pointer */
p = RT_NULL;
@@ -149,17 +149,17 @@ struct pbuf *rt_dm9000_rx(rt_device_t dev)
void rt_hw_dm9000_init()
{
- dm9000_device.parent.parent.init = rt_dm9000_init;
- dm9000_device.parent.parent.open = rt_dm9000_open;
- dm9000_device.parent.parent.close = rt_dm9000_close;
- dm9000_device.parent.parent.read = rt_dm9000_read;
- dm9000_device.parent.parent.write = rt_dm9000_write;
- dm9000_device.parent.parent.control = rt_dm9000_control;
- dm9000_device.parent.parent.user_data = RT_NULL;
+ dm9000_device.parent.parent.init = rt_dm9000_init;
+ dm9000_device.parent.parent.open = rt_dm9000_open;
+ dm9000_device.parent.parent.close = rt_dm9000_close;
+ dm9000_device.parent.parent.read = rt_dm9000_read;
+ dm9000_device.parent.parent.write = rt_dm9000_write;
+ dm9000_device.parent.parent.control = rt_dm9000_control;
+ dm9000_device.parent.parent.user_data = RT_NULL;
- dm9000_device.parent.eth_rx = rt_dm9000_rx;
- dm9000_device.parent.eth_tx = rt_dm9000_tx;
+ dm9000_device.parent.eth_rx = rt_dm9000_rx;
+ dm9000_device.parent.eth_tx = rt_dm9000_tx;
- rt_device_register((rt_device_t)&dm9000_device,
- "E0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX);
+ rt_device_register((rt_device_t)&dm9000_device,
+ "E0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX);
}
diff --git a/bsp/lpc2148/drivers/sd.c b/bsp/lpc2148/drivers/sd.c
index d7b6769621..144c9f2ff5 100644
--- a/bsp/lpc2148/drivers/sd.c
+++ b/bsp/lpc2148/drivers/sd.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -22,12 +22,12 @@ static rt_err_t rt_sdcard_init(rt_device_t dev)
static rt_err_t rt_sdcard_open(rt_device_t dev, rt_uint16_t oflag)
{
- return RT_EOK;
+ return RT_EOK;
}
static rt_err_t rt_sdcard_close(rt_device_t dev)
{
- return RT_EOK;
+ return RT_EOK;
}
static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
@@ -48,54 +48,54 @@ static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buf
static rt_err_t rt_sdcard_control(rt_device_t dev, int cmd, void *args)
{
- return RT_EOK;
+ return RT_EOK;
}
void rt_hw_sdcard_init()
{
rt_size_t length;
- rt_uint8_t* sector;
+ rt_uint8_t* sector;
/* sdcard hardware init */
- sd.type = RT_Device_Class_Block;
- sd.init = rt_sdcard_init;
- sd.open = rt_sdcard_open;
- sd.close = rt_sdcard_close;
- sd.read = rt_sdcard_read;
- sd.write = rt_sdcard_write;
- sd.control = rt_sdcard_control;
- sd.user_data = RT_NULL;
+ sd.type = RT_Device_Class_Block;
+ sd.init = rt_sdcard_init;
+ sd.open = rt_sdcard_open;
+ sd.close = rt_sdcard_close;
+ sd.read = rt_sdcard_read;
+ sd.write = rt_sdcard_write;
+ sd.control = rt_sdcard_control;
+ sd.user_data = RT_NULL;
- /* get the first sector to read partition table */
- sector = (rt_uint8_t*) rt_malloc (512);
- if (sector == RT_NULL)
- {
- rt_kprintf("allocate partition sector buffer failed\n");
- return;
- }
+ /* get the first sector to read partition table */
+ sector = (rt_uint8_t*) rt_malloc (512);
+ if (sector == RT_NULL)
+ {
+ rt_kprintf("allocate partition sector buffer failed\n");
+ return;
+ }
- length = rt_sdcard_read((rt_device_t)&sd, 0, sector, 512);
- if (length == 512)
- {
- rt_err_t status;
+ length = rt_sdcard_read((rt_device_t)&sd, 0, sector, 512);
+ if (length == 512)
+ {
+ rt_err_t status;
- /* get the first partition */
- status = dfs_filesystem_get_partition(&part, sector, 0);
- if (status != RT_EOK)
- {
- /* there is no partition table */
- part.offset = 0;
- part.size = 0;
- }
- }
- else
- {
- /* there is no partition table */
- part.offset = 0;
- part.size = 0;
- }
+ /* get the first partition */
+ status = dfs_filesystem_get_partition(&part, sector, 0);
+ if (status != RT_EOK)
+ {
+ /* there is no partition table */
+ part.offset = 0;
+ part.size = 0;
+ }
+ }
+ else
+ {
+ /* there is no partition table */
+ part.offset = 0;
+ part.size = 0;
+ }
- rt_device_register(&sd,
- "sd", RT_DEVICE_FLAG_RDWR);
+ rt_device_register(&sd,
+ "sd", RT_DEVICE_FLAG_RDWR);
}
diff --git a/bsp/lpc2148/drivers/serial.c b/bsp/lpc2148/drivers/serial.c
index 0c78ecc026..36bbcbd608 100644
--- a/bsp/lpc2148/drivers/serial.c
+++ b/bsp/lpc2148/drivers/serial.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -15,8 +15,8 @@
#include "board.h"
/* serial hardware register */
-#define REG8(d) (*((volatile unsigned char *)(d)))
-#define REG32(d) (*((volatile unsigned long *)(d)))
+#define REG8(d) (*((volatile unsigned char *)(d)))
+#define REG32(d) (*((volatile unsigned long *)(d)))
#define UART_RBR(base) REG8(base + 0x00)
#define UART_THR(base) REG8(base + 0x00)
@@ -37,16 +37,16 @@
/* LPC serial device */
struct rt_lpcserial
{
- /* inherit from device */
- struct rt_device parent;
+ /* inherit from device */
+ struct rt_device parent;
- rt_uint32_t hw_base;
- rt_uint32_t irqno;
- rt_uint32_t baudrate;
+ rt_uint32_t hw_base;
+ rt_uint32_t irqno;
+ rt_uint32_t baudrate;
- /* reception field */
- rt_uint16_t save_index, read_index;
- rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
+ /* reception field */
+ rt_uint16_t save_index, read_index;
+ rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
};
#ifdef RT_USING_UART1
@@ -58,70 +58,70 @@ struct rt_lpcserial serial2;
void rt_hw_serial_init(void);
-#define U0PINS 0x00000005
+#define U0PINS 0x00000005
void rt_hw_uart_isr(struct rt_lpcserial* lpc_serial)
{
- RT_UNUSED rt_uint32_t iir;
+ RT_UNUSED rt_uint32_t iir;
- RT_ASSERT(lpc_serial != RT_NULL)
+ RT_ASSERT(lpc_serial != RT_NULL)
- if (UART_LSR(lpc_serial->hw_base) & 0x01)
- {
- rt_base_t level;
+ if (UART_LSR(lpc_serial->hw_base) & 0x01)
+ {
+ rt_base_t level;
- while (UART_LSR(lpc_serial->hw_base) & 0x01)
- {
- /* disable interrupt */
- level = rt_hw_interrupt_disable();
+ while (UART_LSR(lpc_serial->hw_base) & 0x01)
+ {
+ /* disable interrupt */
+ level = rt_hw_interrupt_disable();
- /* read character */
- lpc_serial->rx_buffer[lpc_serial->save_index] =
- UART_RBR(lpc_serial->hw_base);
- lpc_serial->save_index ++;
- if (lpc_serial->save_index >= RT_UART_RX_BUFFER_SIZE)
- lpc_serial->save_index = 0;
+ /* read character */
+ lpc_serial->rx_buffer[lpc_serial->save_index] =
+ UART_RBR(lpc_serial->hw_base);
+ lpc_serial->save_index ++;
+ if (lpc_serial->save_index >= RT_UART_RX_BUFFER_SIZE)
+ lpc_serial->save_index = 0;
- /* if the next position is read index, discard this 'read char' */
- if (lpc_serial->save_index == lpc_serial->read_index)
- {
- lpc_serial->read_index ++;
- if (lpc_serial->read_index >= RT_UART_RX_BUFFER_SIZE)
- lpc_serial->read_index = 0;
- }
+ /* if the next position is read index, discard this 'read char' */
+ if (lpc_serial->save_index == lpc_serial->read_index)
+ {
+ lpc_serial->read_index ++;
+ if (lpc_serial->read_index >= RT_UART_RX_BUFFER_SIZE)
+ lpc_serial->read_index = 0;
+ }
- /* enable interrupt */
- rt_hw_interrupt_enable(level);
- }
+ /* enable interrupt */
+ rt_hw_interrupt_enable(level);
+ }
- /* invoke callback */
- if(lpc_serial->parent.rx_indicate != RT_NULL)
- {
- lpc_serial->parent.rx_indicate(&lpc_serial->parent, 1);
- }
- }
+ /* invoke callback */
+ if(lpc_serial->parent.rx_indicate != RT_NULL)
+ {
+ lpc_serial->parent.rx_indicate(&lpc_serial->parent, 1);
+ }
+ }
- /* clear interrupt source */
- iir = UART_IIR(lpc_serial->hw_base);
+ /* clear interrupt source */
+ iir = UART_IIR(lpc_serial->hw_base);
- /* acknowledge Interrupt */
- VICVectAddr = 0;
+ /* acknowledge Interrupt */
+ VICVectAddr = 0;
}
#ifdef RT_USING_UART1
void rt_hw_uart_isr_1(int irqno, void *param)
{
- /* get lpc serial device */
- rt_hw_uart_isr(&serial1);
-}
+ /* get lpc serial device */
+ rt_hw_uart_isr(&serial1);
+}
#endif
#ifdef RT_USING_UART2
void rt_hw_uart_isr_2(int irqno, void *param)
{
- /* get lpc serial device */
- rt_hw_uart_isr(&serial2);
-}
+ /* get lpc serial device */
+ rt_hw_uart_isr(&serial2);
+}
#endif
/**
@@ -131,256 +131,256 @@ void rt_hw_uart_isr_2(int irqno, void *param)
static rt_err_t rt_serial_init (rt_device_t dev)
{
- return RT_EOK;
+ return RT_EOK;
}
static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
{
- struct rt_lpcserial* lpc_serial;
- lpc_serial = (struct rt_lpcserial*) dev;
-
- RT_ASSERT(lpc_serial != RT_NULL);
- if (dev->flag & RT_DEVICE_FLAG_INT_RX)
- {
- /* init UART rx interrupt */
- UART_IER(lpc_serial->hw_base) = 0x01;
+ struct rt_lpcserial* lpc_serial;
+ lpc_serial = (struct rt_lpcserial*) dev;
+
+ RT_ASSERT(lpc_serial != RT_NULL);
+ if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+ {
+ /* init UART rx interrupt */
+ UART_IER(lpc_serial->hw_base) = 0x01;
- /* install ISR */
- if (lpc_serial->irqno == UART0_INT)
- {
+ /* install ISR */
+ if (lpc_serial->irqno == UART0_INT)
+ {
#ifdef RT_USING_UART1
- rt_hw_interrupt_install(lpc_serial->irqno,
+ rt_hw_interrupt_install(lpc_serial->irqno,
rt_hw_uart_isr_1, &serial1, "UART1");
#endif
- }
- else
- {
+ }
+ else
+ {
#ifdef RT_USING_UART2
- rt_hw_interrupt_install(lpc_serial->irqno,
+ rt_hw_interrupt_install(lpc_serial->irqno,
rt_hw_uart_isr_2, &serial2, "UART2");
#endif
- }
+ }
- rt_hw_interrupt_umask(lpc_serial->irqno);
- }
+ rt_hw_interrupt_umask(lpc_serial->irqno);
+ }
- return RT_EOK;
+ return RT_EOK;
}
static rt_err_t rt_serial_close(rt_device_t dev)
{
- struct rt_lpcserial* lpc_serial;
- lpc_serial = (struct rt_lpcserial*) dev;
+ struct rt_lpcserial* lpc_serial;
+ lpc_serial = (struct rt_lpcserial*) dev;
- RT_ASSERT(lpc_serial != RT_NULL);
+ RT_ASSERT(lpc_serial != RT_NULL);
- if (dev->flag & RT_DEVICE_FLAG_INT_RX)
- {
- /* disable UART rx interrupt */
- UART_IER(lpc_serial->hw_base) = 0x00;
- }
+ if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+ {
+ /* disable UART rx interrupt */
+ UART_IER(lpc_serial->hw_base) = 0x00;
+ }
- return RT_EOK;
+ return RT_EOK;
}
static rt_err_t rt_serial_control(rt_device_t dev, int cmd, void *args)
{
- return RT_EOK;
+ return RT_EOK;
}
static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
- rt_uint8_t* ptr;
- struct rt_lpcserial *lpc_serial = (struct rt_lpcserial*)dev;
- RT_ASSERT(lpc_serial != RT_NULL);
+ rt_uint8_t* ptr;
+ struct rt_lpcserial *lpc_serial = (struct rt_lpcserial*)dev;
+ RT_ASSERT(lpc_serial != RT_NULL);
- /* point to buffer */
- ptr = (rt_uint8_t*) buffer;
+ /* point to buffer */
+ ptr = (rt_uint8_t*) buffer;
- if (dev->flag & RT_DEVICE_FLAG_INT_RX)
- {
- while (size)
- {
- /* interrupt receive */
- rt_base_t level;
+ if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+ {
+ while (size)
+ {
+ /* interrupt receive */
+ rt_base_t level;
- /* disable interrupt */
- level = rt_hw_interrupt_disable();
- if (lpc_serial->read_index != lpc_serial->save_index)
- {
- *ptr = lpc_serial->rx_buffer[lpc_serial->read_index];
+ /* disable interrupt */
+ level = rt_hw_interrupt_disable();
+ if (lpc_serial->read_index != lpc_serial->save_index)
+ {
+ *ptr = lpc_serial->rx_buffer[lpc_serial->read_index];
- lpc_serial->read_index ++;
- if (lpc_serial->read_index >= RT_UART_RX_BUFFER_SIZE)
- lpc_serial->read_index = 0;
- }
- else
- {
- /* no data in rx buffer */
+ lpc_serial->read_index ++;
+ if (lpc_serial->read_index >= RT_UART_RX_BUFFER_SIZE)
+ lpc_serial->read_index = 0;
+ }
+ else
+ {
+ /* no data in rx buffer */
- /* enable interrupt */
- rt_hw_interrupt_enable(level);
- break;
- }
+ /* enable interrupt */
+ rt_hw_interrupt_enable(level);
+ break;
+ }
- /* enable interrupt */
- rt_hw_interrupt_enable(level);
+ /* enable interrupt */
+ rt_hw_interrupt_enable(level);
- ptr ++; size --;
- }
+ ptr ++; size --;
+ }
- return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
- }
- else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
- {
- /* not support right now */
- RT_ASSERT(0);
- }
+ return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+ }
+ else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
+ {
+ /* not support right now */
+ RT_ASSERT(0);
+ }
- /* polling mode */
- while (size && (UART_LSR(lpc_serial->hw_base) & 0x01))
- {
- /* Read Character */
- *ptr = UART_RBR(lpc_serial->hw_base);
+ /* polling mode */
+ while (size && (UART_LSR(lpc_serial->hw_base) & 0x01))
+ {
+ /* Read Character */
+ *ptr = UART_RBR(lpc_serial->hw_base);
- ptr ++;
- size --;
- }
+ ptr ++;
+ size --;
+ }
- return (rt_size_t)ptr - (rt_size_t)buffer;
+ return (rt_size_t)ptr - (rt_size_t)buffer;
}
static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
- struct rt_lpcserial* lpc_serial;
- char *ptr;
+ struct rt_lpcserial* lpc_serial;
+ char *ptr;
- lpc_serial = (struct rt_lpcserial*) dev;
- if (dev->flag & RT_DEVICE_FLAG_INT_TX)
- {
- /* not support */
- RT_ASSERT(0);
- }
- else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
- {
- /* not support */
- RT_ASSERT(0);
- }
+ lpc_serial = (struct rt_lpcserial*) dev;
+ if (dev->flag & RT_DEVICE_FLAG_INT_TX)
+ {
+ /* not support */
+ RT_ASSERT(0);
+ }
+ else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
+ {
+ /* not support */
+ RT_ASSERT(0);
+ }
- /* polling write */
- ptr = (char *)buffer;
+ /* polling write */
+ ptr = (char *)buffer;
- if (dev->flag & RT_DEVICE_FLAG_STREAM)
- {
- /* stream mode */
- while (size)
- {
- if (*ptr == '\n')
- {
- while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
- UART_THR(lpc_serial->hw_base) = '\r';
- }
+ if (dev->flag & RT_DEVICE_FLAG_STREAM)
+ {
+ /* stream mode */
+ while (size)
+ {
+ if (*ptr == '\n')
+ {
+ while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
+ UART_THR(lpc_serial->hw_base) = '\r';
+ }
- while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
- UART_THR(lpc_serial->hw_base) = *ptr;
+ while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
+ UART_THR(lpc_serial->hw_base) = *ptr;
- ptr ++;
- size --;
- }
- }
- else
- {
- while (size)
- {
- while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
- UART_THR(lpc_serial->hw_base) = *ptr;
+ ptr ++;
+ size --;
+ }
+ }
+ else
+ {
+ while (size)
+ {
+ while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
+ UART_THR(lpc_serial->hw_base) = *ptr;
- ptr ++;
- size --;
- }
- }
+ ptr ++;
+ size --;
+ }
+ }
- return (rt_size_t) ptr - (rt_size_t) buffer;
+ return (rt_size_t) ptr - (rt_size_t) buffer;
}
void rt_hw_serial_init(void)
{
- struct rt_lpcserial* lpc_serial;
+ struct rt_lpcserial* lpc_serial;
#ifdef RT_USING_UART1
- lpc_serial = &serial1;
+ lpc_serial = &serial1;
- lpc_serial->parent.type = RT_Device_Class_Char;
+ lpc_serial->parent.type = RT_Device_Class_Char;
- lpc_serial->hw_base = 0xE000C000;
- lpc_serial->baudrate = 115200;
- lpc_serial->irqno = UART0_INT;
+ lpc_serial->hw_base = 0xE000C000;
+ lpc_serial->baudrate = 115200;
+ lpc_serial->irqno = UART0_INT;
- rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer));
- lpc_serial->read_index = lpc_serial->save_index = 0;
+ rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer));
+ lpc_serial->read_index = lpc_serial->save_index = 0;
- /* Enable UART0 RxD and TxD pins */
+ /* Enable UART0 RxD and TxD pins */
PINSEL0 |= 0x05;
- /* 8 bits, no Parity, 1 Stop bit */
- UART_LCR(lpc_serial->hw_base) = 0x83;
+ /* 8 bits, no Parity, 1 Stop bit */
+ UART_LCR(lpc_serial->hw_base) = 0x83;
- /* Setup Baudrate */
- UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF;
- UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF;
+ /* Setup Baudrate */
+ UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF;
+ UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF;
- /* DLAB = 0 */
- UART_LCR(lpc_serial->hw_base) = 0x03;
+ /* DLAB = 0 */
+ UART_LCR(lpc_serial->hw_base) = 0x03;
- lpc_serial->parent.type = RT_Device_Class_Char;
- lpc_serial->parent.init = rt_serial_init;
- lpc_serial->parent.open = rt_serial_open;
- lpc_serial->parent.close = rt_serial_close;
- lpc_serial->parent.read = rt_serial_read;
- lpc_serial->parent.write = rt_serial_write;
- lpc_serial->parent.control = rt_serial_control;
- lpc_serial->parent.user_data = RT_NULL;
+ lpc_serial->parent.type = RT_Device_Class_Char;
+ lpc_serial->parent.init = rt_serial_init;
+ lpc_serial->parent.open = rt_serial_open;
+ lpc_serial->parent.close = rt_serial_close;
+ lpc_serial->parent.read = rt_serial_read;
+ lpc_serial->parent.write = rt_serial_write;
+ lpc_serial->parent.control = rt_serial_control;
+ lpc_serial->parent.user_data = RT_NULL;
- rt_device_register(&lpc_serial->parent,
- "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
+ rt_device_register(&lpc_serial->parent,
+ "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
#endif
#ifdef RT_USING_UART2
- lpc_serial = &serial2;
+ lpc_serial = &serial2;
- lpc_serial->parent.type = RT_Device_Class_Char;
+ lpc_serial->parent.type = RT_Device_Class_Char;
- lpc_serial->hw_base = 0xE0010000;
- lpc_serial->baudrate = 115200;
- lpc_serial->irqno = UART1_INT;
+ lpc_serial->hw_base = 0xE0010000;
+ lpc_serial->baudrate = 115200;
+ lpc_serial->irqno = UART1_INT;
- rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer));
- lpc_serial->read_index = lpc_serial->save_index = 0;
+ rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer));
+ lpc_serial->read_index = lpc_serial->save_index = 0;
- /* Enable UART1 RxD and TxD pins */
- PINSEL0 |= 0x05 << 16;
+ /* Enable UART1 RxD and TxD pins */
+ PINSEL0 |= 0x05 << 16;
- /* 8 bits, no Parity, 1 Stop bit */
- UART_LCR(lpc_serial->hw_base) = 0x83;
+ /* 8 bits, no Parity, 1 Stop bit */
+ UART_LCR(lpc_serial->hw_base) = 0x83;
- /* Setup Baudrate */
- UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF;
- UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF;
+ /* Setup Baudrate */
+ UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF;
+ UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF;
- /* DLAB = 0 */
- UART_LCR(lpc_serial->hw_base) = 0x03;
+ /* DLAB = 0 */
+ UART_LCR(lpc_serial->hw_base) = 0x03;
- lpc_serial->parent.type = RT_Device_Class_Char;
- lpc_serial->parent.init = rt_serial_init;
- lpc_serial->parent.open = rt_serial_open;
- lpc_serial->parent.close = rt_serial_close;
- lpc_serial->parent.read = rt_serial_read;
- lpc_serial->parent.write = rt_serial_write;
- lpc_serial->parent.control = rt_serial_control;
- lpc_serial->parent.user_data = RT_NULL;
+ lpc_serial->parent.type = RT_Device_Class_Char;
+ lpc_serial->parent.init = rt_serial_init;
+ lpc_serial->parent.open = rt_serial_open;
+ lpc_serial->parent.close = rt_serial_close;
+ lpc_serial->parent.read = rt_serial_read;
+ lpc_serial->parent.write = rt_serial_write;
+ lpc_serial->parent.control = rt_serial_control;
+ lpc_serial->parent.user_data = RT_NULL;
- rt_device_register(&lpc_serial->parent,
- "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
+ rt_device_register(&lpc_serial->parent,
+ "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
#endif
}
diff --git a/bsp/lpc2148/rtconfig.h b/bsp/lpc2148/rtconfig.h
index 70a6ef0325..a28e205a56 100644
--- a/bsp/lpc2148/rtconfig.h
+++ b/bsp/lpc2148/rtconfig.h
@@ -3,16 +3,16 @@
#define __RTTHREAD_CFG_H__
/* RT_NAME_MAX*/
-#define RT_NAME_MAX 8
+#define RT_NAME_MAX 8
/* RT_ALIGN_SIZE*/
-#define RT_ALIGN_SIZE 4
+#define RT_ALIGN_SIZE 4
/* PRIORITY_MAX*/
-#define RT_THREAD_PRIORITY_MAX 32
+#define RT_THREAD_PRIORITY_MAX 32
/* Tick per Second*/
-#define RT_TICK_PER_SECOND 100
+#define RT_TICK_PER_SECOND 100
/* SECTION: RT_DEBUG */
/* Thread Debug */
@@ -62,12 +62,12 @@
#define RT_USING_DEVICE
#define RT_USING_UART1
#define RT_USING_UART2
-#define RT_UART_RX_BUFFER_SIZE 64
+#define RT_UART_RX_BUFFER_SIZE 64
/* SECTION: Console options */
#define RT_USING_CONSOLE
/* the buffer size of console*/
-#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLEBUF_SIZE 128
/* SECTION: FinSH shell options */
/* Using FinSH as Shell*/
@@ -91,11 +91,11 @@
/* SECTION: DFS options */
/* #define RT_USING_DFS */
/* the max number of mounted filesystem */
-#define DFS_FILESYSTEMS_MAX 2
-/* the max number of opened files */
-#define DFS_FD_MAX 4
-/* the max number of cached sector */
-#define DFS_CACHE_MAX_NUM 8
+#define DFS_FILESYSTEMS_MAX 2
+/* the max number of opened files */
+#define DFS_FD_MAX 4
+/* the max number of cached sector */
+#define DFS_CACHE_MAX_NUM 8
/* SECTION: lwip, a lighwight TCP/IP protocol stack */
/* Using lighweight TCP/IP protocol stack*/
@@ -123,21 +123,21 @@
/* #define RT_LWIP_DHCP */
/* ip address of target*/
-#define RT_LWIP_IPADDR0 192
-#define RT_LWIP_IPADDR1 168
-#define RT_LWIP_IPADDR2 0
-#define RT_LWIP_IPADDR3 30
+#define RT_LWIP_IPADDR0 192
+#define RT_LWIP_IPADDR1 168
+#define RT_LWIP_IPADDR2 0
+#define RT_LWIP_IPADDR3 30
/* gateway address of target*/
-#define RT_LWIP_GWADDR0 192
-#define RT_LWIP_GWADDR1 168
-#define RT_LWIP_GWADDR2 0
-#define RT_LWIP_GWADDR3 1
+#define RT_LWIP_GWADDR0 192
+#define RT_LWIP_GWADDR1 168
+#define RT_LWIP_GWADDR2 0
+#define RT_LWIP_GWADDR3 1
/* mask address of target*/
-#define RT_LWIP_MSKADDR0 255
-#define RT_LWIP_MSKADDR1 255
-#define RT_LWIP_MSKADDR2 255
-#define RT_LWIP_MSKADDR3 0
+#define RT_LWIP_MSKADDR0 255
+#define RT_LWIP_MSKADDR1 255
+#define RT_LWIP_MSKADDR2 255
+#define RT_LWIP_MSKADDR3 0
#endif
generated by cgit v1.3.1 (git 2.54.0) at 2026-10-24 00:01:39 +0000