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-rw-r--r--bsp/lpc824/drivers/board.c4
-rw-r--r--bsp/lpc824/drivers/board.h2
-rw-r--r--bsp/lpc824/drivers/usart.c86
-rw-r--r--bsp/lpc824/drivers/usart.h2
4 files changed, 47 insertions, 47 deletions
diff --git a/bsp/lpc824/drivers/board.c b/bsp/lpc824/drivers/board.c
index 51656718b8..0817a3b7e8 100644
--- a/bsp/lpc824/drivers/board.c
+++ b/bsp/lpc824/drivers/board.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -62,7 +62,7 @@ void rt_hw_board_init()
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
-
+
#ifdef RT_USING_CONSOLE
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
diff --git a/bsp/lpc824/drivers/board.h b/bsp/lpc824/drivers/board.h
index c8d21d94b5..d86369ce31 100644
--- a/bsp/lpc824/drivers/board.h
+++ b/bsp/lpc824/drivers/board.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
diff --git a/bsp/lpc824/drivers/usart.c b/bsp/lpc824/drivers/usart.c
index 5109164a9a..54a56501c9 100644
--- a/bsp/lpc824/drivers/usart.c
+++ b/bsp/lpc824/drivers/usart.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -28,7 +28,7 @@ struct lpc8xx_uart
LPC_USART_T * uart_base;
IRQn_Type uart_irq;
rt_uint8_t rx_buffer[UART_RX_BUFSZ];
-
+
};
#ifdef RT_USING_UART0
struct lpc8xx_uart uart0_device;
@@ -45,10 +45,10 @@ struct lpc8xx_uart uart2_device;
void uart_irq_handler(struct lpc8xx_uart* uart)
{
uint32_t status;
-
+
/* enter interrupt */
rt_interrupt_enter();
-
+
status = Chip_UART_GetStatus(uart->uart_base);
if(status & UART_STAT_RXRDY) // RXIRQ
{
@@ -57,9 +57,9 @@ void uart_irq_handler(struct lpc8xx_uart* uart)
if(uart->parent.rx_indicate != RT_NULL)
{
uart->parent.rx_indicate(&uart->parent, rt_ringbuffer_data_len(&uart->rx_rb));
- }
+ }
}
-
+
/* leave interrupt */
rt_interrupt_leave();
}
@@ -88,15 +88,15 @@ void UART2_IRQHandler(void)
static void uart1_io_init(LPC_USART_T * uart_base)
{
/* Enable the clock to the Switch Matrix */
- Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);
-
+ Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);
+
Chip_Clock_SetUARTClockDiv(1);
-
+
#ifdef RT_USING_UART0
if (uart_base == LPC_USART0)
{
- Chip_SWM_MovablePinAssign(SWM_U0_TXD_O, 4);
- Chip_SWM_MovablePinAssign(SWM_U0_RXD_I, 0);
+ Chip_SWM_MovablePinAssign(SWM_U0_TXD_O, 4);
+ Chip_SWM_MovablePinAssign(SWM_U0_RXD_I, 0);
}
else
#endif
@@ -104,8 +104,8 @@ static void uart1_io_init(LPC_USART_T * uart_base)
#ifdef RT_USING_UART1
if (uart_base == LPC_USART1)
{
- Chip_SWM_MovablePinAssign(SWM_U1_TXD_O, 4);
- Chip_SWM_MovablePinAssign(SWM_U1_RXD_I, 0);
+ Chip_SWM_MovablePinAssign(SWM_U1_TXD_O, 4);
+ Chip_SWM_MovablePinAssign(SWM_U1_RXD_I, 0);
}
else
#endif
@@ -113,32 +113,32 @@ static void uart1_io_init(LPC_USART_T * uart_base)
#ifdef RT_USING_UART2
if (uart_base == LPC_USART2)
{
- Chip_SWM_MovablePinAssign(SWM_U2_TXD_O, 4);
- Chip_SWM_MovablePinAssign(SWM_U2_RXD_I, 0);
+ Chip_SWM_MovablePinAssign(SWM_U2_TXD_O, 4);
+ Chip_SWM_MovablePinAssign(SWM_U2_RXD_I, 0);
}
else
#endif
{
RT_ASSERT((uart_base == USART0) || (uart_base == USART2) || (uart_base == USART2));
}
-
- /* Disable the clock to the Switch Matrix to save power */
- Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_SWM);
+
+ /* Disable the clock to the Switch Matrix to save power */
+ Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_SWM);
}
static void uart_ll_init(LPC_USART_T * uart)
{
Chip_UART_Init(uart);
Chip_UART_ConfigData(uart, UART_CFG_DATALEN_8 | UART_CFG_PARITY_NONE | UART_CFG_STOPLEN_1);
- Chip_Clock_SetUSARTNBaseClockRate((115200 * 6 * 16), true);
- Chip_UART_SetBaud(uart, 115200);
- Chip_UART_Enable(uart);
- Chip_UART_TXEnable(uart);
-
- // we must NOT enable TX ready/idle IRQ before we want to write data
- // otherwise the IRQs will happen as soon as Uart IRQ is enabled in NVIC
- Chip_UART_IntDisable(uart, UART_INTEN_TXRDY | UART_INTEN_TXIDLE);
- Chip_UART_IntEnable(uart, UART_INTEN_RXRDY);
+ Chip_Clock_SetUSARTNBaseClockRate((115200 * 6 * 16), true);
+ Chip_UART_SetBaud(uart, 115200);
+ Chip_UART_Enable(uart);
+ Chip_UART_TXEnable(uart);
+
+ // we must NOT enable TX ready/idle IRQ before we want to write data
+ // otherwise the IRQs will happen as soon as Uart IRQ is enabled in NVIC
+ Chip_UART_IntDisable(uart, UART_INTEN_TXRDY | UART_INTEN_TXIDLE);
+ Chip_UART_IntEnable(uart, UART_INTEN_RXRDY);
}
static rt_err_t rt_uart_init (rt_device_t dev)
@@ -146,7 +146,7 @@ static rt_err_t rt_uart_init (rt_device_t dev)
struct lpc8xx_uart* uart;
RT_ASSERT(dev != RT_NULL);
uart = (struct lpc8xx_uart *)dev;
-
+
uart1_io_init(uart->uart_base);
uart_ll_init(uart->uart_base);
@@ -220,11 +220,11 @@ static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer
if (*ptr == '\n')
{
while (!(Chip_UART_GetStatus(uart->uart_base) & UART_STAT_TXRDY));
- Chip_UART_SendByte(uart->uart_base, '\r');
+ Chip_UART_SendByte(uart->uart_base, '\r');
}
while (!(Chip_UART_GetStatus(uart->uart_base) & UART_STAT_TXRDY));
- Chip_UART_SendByte(uart->uart_base, *ptr);
+ Chip_UART_SendByte(uart->uart_base, *ptr);
ptr ++;
size --;
@@ -235,7 +235,7 @@ static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer
while (size)
{
while (!(Chip_UART_GetStatus(uart->uart_base) & UART_STAT_TXRDY));
- Chip_UART_SendByte(uart->uart_base, *ptr);
+ Chip_UART_SendByte(uart->uart_base, *ptr);
ptr++;
size--;
@@ -258,14 +258,14 @@ int rt_hw_usart_init(void)
uart->parent.type = RT_Device_Class_Char;
uart->uart_base = LPC_USART0;
uart->uart_irq = UART0_IRQn;
-
+
rt_ringbuffer_init(&(uart->rx_rb), uart->rx_buffer, sizeof(uart->rx_buffer));
/* device interface */
- uart->parent.init = rt_uart_init;
- uart->parent.open = rt_uart_open;
+ uart->parent.init = rt_uart_init;
+ uart->parent.open = rt_uart_open;
uart->parent.close = rt_uart_close;
- uart->parent.read = rt_uart_read;
+ uart->parent.read = rt_uart_read;
uart->parent.write = rt_uart_write;
uart->parent.control = RT_NULL;
uart->parent.user_data = RT_NULL;
@@ -273,7 +273,7 @@ int rt_hw_usart_init(void)
rt_device_register(&uart->parent, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
}
#endif
-
+
#ifdef RT_USING_UART1
{
struct lpc8xx_uart* uart;
@@ -285,14 +285,14 @@ int rt_hw_usart_init(void)
uart->parent.type = RT_Device_Class_Char;
uart->uart_base = LPC_USART1;
uart->uart_irq = UART1_IRQn;
-
+
rt_ringbuffer_init(&(uart->rx_rb), uart->rx_buffer, sizeof(uart->rx_buffer));
/* device interface */
- uart->parent.init = rt_uart_init;
- uart->parent.open = rt_uart_open;
+ uart->parent.init = rt_uart_init;
+ uart->parent.open = rt_uart_open;
uart->parent.close = rt_uart_close;
- uart->parent.read = rt_uart_read;
+ uart->parent.read = rt_uart_read;
uart->parent.write = rt_uart_write;
uart->parent.control = RT_NULL;
uart->parent.user_data = RT_NULL;
@@ -315,10 +315,10 @@ int rt_hw_usart_init(void)
rt_ringbuffer_init(&(uart->rx_rb), uart->rx_buffer, sizeof(uart->rx_buffer));
/* device interface */
- uart->parent.init = rt_uart_init;
- uart->parent.open = rt_uart_open;
+ uart->parent.init = rt_uart_init;
+ uart->parent.open = rt_uart_open;
uart->parent.close = rt_uart_close;
- uart->parent.read = rt_uart_read;
+ uart->parent.read = rt_uart_read;
uart->parent.write = rt_uart_write;
uart->parent.control = RT_NULL;
uart->parent.user_data = RT_NULL;
diff --git a/bsp/lpc824/drivers/usart.h b/bsp/lpc824/drivers/usart.h
index 1db28e9385..7298cdab8b 100644
--- a/bsp/lpc824/drivers/usart.h
+++ b/bsp/lpc824/drivers/usart.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
generated by cgit v1.3.1 (git 2.54.0) at 2026-10-24 00:46:56 +0000