diff options
Diffstat (limited to 'bsp/stm32/libraries/HAL_Drivers')
22 files changed, 288 insertions, 47 deletions
diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h index 6f218780c8..5aacf9de90 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-11-06 SummerGift change to new framework + * 2018-11-06 SummerGift first version */ #ifndef __SPI_CONFIG_H__ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f7/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f7/spi_config.h index 86bf38199e..ef32a32f4f 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f7/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f7/spi_config.h @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-11-06 SummerGift change to new framework + * 2018-11-06 SummerGift first version */ #ifndef __SPI_CONFIG_H__ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g0/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g0/dma_config.h new file mode 100644 index 0000000000..8dd8598a28 --- /dev/null +++ b/bsp/stm32/libraries/HAL_Drivers/config/g0/dma_config.h @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-01-05 zylx first version + * 2019-01-08 SummerGift clean up the code + */ + +#ifndef __DMA_CONFIG_H__ +#define __DMA_CONFIG_H__ + +#include <rtthread.h> + +#ifdef __cplusplus +extern "C" { +#endif + +/* DMA1 channel1 */ + +/* DMA1 channel2-3 DMA2 channel1-2 */ +#if defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE) +#define UART1_DMA_RX_IRQHandler DMA1_Channel2_3_IRQHandler +#define UART1_RX_DMA_RCC RCC_AHBENR_DMA1EN +#define UART1_RX_DMA_INSTANCE DMA1_Channel3 +#define UART1_RX_DMA_IRQ DMA1_Channel2_3_IRQn +#endif +/* DMA1 channel2-3 DMA2 channel1-2 */ + +/* DMA1 channel4-7 DMA2 channel3-5 */ +#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE) +#define UART2_DMA_RX_IRQHandler DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler +#define UART2_RX_DMA_RCC RCC_AHBENR_DMA1EN +#define UART2_RX_DMA_INSTANCE DMA1_Channel5 +#define UART2_RX_DMA_IRQ DMA1_Ch4_7_DMAMUX1_OVR_IRQn +#endif +/* DMA1 channel4-7 DMA2 channel3-5 */ +#if defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE) +#define UART3_DMA_RX_IRQHandler DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler +#define UART3_RX_DMA_RCC RCC_AHBENR_DMA1EN +#define UART3_RX_DMA_INSTANCE DMA1_Channel4 +#define UART3_RX_DMA_IRQ DMA1_Ch4_7_DMAMUX1_OVR_IRQn +#endif +#if defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_INSTANCE) +#define UART4_DMA_RX_IRQHandler DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler +#define UART4_RX_DMA_RCC RCC_AHBENR_DMA1EN +#define UART4_RX_DMA_INSTANCE DMA1_Channel6 +#define UART4_RX_DMA_IRQ DMA1_Ch4_7_DMAMUX1_OVR_IRQn +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __DMA_CONFIG_H__ */ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g0/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g0/uart_config.h new file mode 100644 index 0000000000..bca5ef2cc4 --- /dev/null +++ b/bsp/stm32/libraries/HAL_Drivers/config/g0/uart_config.h @@ -0,0 +1,167 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-10-30 zylx first version + */ + +#ifndef __UART_CONFIG_H__ +#define __UART_CONFIG_H__ + +#include <rtthread.h> + +#if defined(BSP_USING_LPUART1) +#ifndef LPUART1_CONFIG +#define LPUART1_CONFIG \ + { \ + .name = "lpuart1", \ + .Instance = LPUART1, \ + .irq_type = USART3_4_LPUART1_IRQn, \ + } +#endif /* LPUART1_CONFIG */ +#if defined(BSP_LPUART1_RX_USING_DMA) +#ifndef LPUART1_DMA_CONFIG +#define LPUART1_DMA_CONFIG \ + { \ + .Instance = DMA1_Channel1, \ + .dma_rcc = RCC_AHBENR_DMA1EN, \ + .dma_irq = DMA1_Channel1_IRQn, \ + } +#endif /* LPUART1_DMA_CONFIG */ +#endif /* BSP_LPUART1_RX_USING_DMA */ +#endif /* BSP_USING_LPUART1 */ + +#if defined(BSP_USING_UART1) +#ifndef UART1_CONFIG +#define UART1_CONFIG \ + { \ + .name = "uart1", \ + .Instance = USART1, \ + .irq_type = USART1_IRQn, \ + } +#endif /* UART1_CONFIG */ +#endif /* BSP_USING_UART1 */ + +#if defined(BSP_UART1_RX_USING_DMA) +#ifndef UART1_DMA_CONFIG +#define UART1_DMA_CONFIG \ + { \ + .Instance = UART1_RX_DMA_INSTANCE, \ + .dma_rcc = UART1_RX_DMA_RCC, \ + .dma_irq = UART1_RX_DMA_IRQ, \ + } +#endif /* UART1_DMA_CONFIG */ +#endif /* BSP_UART1_RX_USING_DMA */ + +#if defined(BSP_USING_UART2) +#ifndef UART2_CONFIG +#define UART2_CONFIG \ + { \ + .name = "uart2", \ + .Instance = USART2, \ + .irq_type = USART2_IRQn, \ + } +#endif /* UART2_CONFIG */ +#endif /* BSP_USING_UART2 */ + +#if defined(BSP_UART2_RX_USING_DMA) +#ifndef UART2_DMA_CONFIG +#define UART2_DMA_CONFIG \ + { \ + .Instance = UART2_RX_DMA_INSTANCE, \ + .dma_rcc = UART2_RX_DMA_RCC, \ + .dma_irq = UART2_RX_DMA_IRQ, \ + } +#endif /* UART2_DMA_CONFIG */ +#endif /* BSP_UART2_RX_USING_DMA */ + +#if defined(BSP_USING_UART3) +#ifndef UART3_CONFIG +#ifndef SOC_SERIES_STM32G0 +#define UART3_CONFIG \ + { \ + .name = "uart3", \ + .Instance = USART3, \ + .irq_type = USART3_IRQn, \ + } +#else +#define UART3_CONFIG \ + { \ + .name = "uart3", \ + .Instance = USART3, \ + .irq_type = USART3_4_LPUART1_IRQn, \ + } +#endif /* SOC_SERIES_STM32G0 */ +#endif /* UART3_CONFIG */ +#endif /* BSP_USING_UART3 */ + +#if defined(BSP_UART3_RX_USING_DMA) +#ifndef UART3_DMA_CONFIG +#define UART3_DMA_CONFIG \ + { \ + .Instance = UART3_RX_DMA_INSTANCE, \ + .dma_rcc = UART3_RX_DMA_RCC, \ + .dma_irq = UART3_RX_DMA_IRQ, \ + } +#endif /* UART3_DMA_CONFIG */ +#endif /* BSP_UART3_RX_USING_DMA */ + +#if defined(BSP_USING_UART4) +#ifndef UART4_CONFIG +#ifndef SOC_SERIES_STM32G0 +#define UART4_CONFIG \ + { \ + .name = "uart4", \ + .Instance = UART4, \ + .irq_type = UART4_IRQn, \ + } +#else +#define UART4_CONFIG \ + { \ + .name = "uart4", \ + .Instance = USART4, \ + .irq_type = USART3_4_LPUART1_IRQn, \ + } +#endif /* UART4_CONFIG */ +#endif /* SOC_SERIES_STM32G0 */ +#endif /* BSP_USING_UART4 */ + +#if defined(BSP_UART4_RX_USING_DMA) +#ifndef UART4_DMA_CONFIG +#define UART4_DMA_CONFIG \ + { \ + .Instance = UART4_RX_DMA_INSTANCE, \ + .dma_rcc = UART4_RX_DMA_RCC, \ + .dma_irq = UART4_RX_DMA_IRQ, \ + } +#endif /* UART4_DMA_CONFIG */ +#endif /* BSP_UART4_RX_USING_DMA */ + +#if defined(BSP_USING_UART5) +#ifndef UART5_CONFIG +#define UART5_CONFIG \ + { \ + .name = "uart5", \ + .Instance = UART5, \ + .irq_type = UART5_IRQn, \ + } +#endif /* UART5_CONFIG */ +#endif /* BSP_USING_UART5 */ + +#if defined(BSP_UART5_RX_USING_DMA) +#ifndef UART5_DMA_CONFIG +#define UART5_DMA_CONFIG \ + { \ + .Instance = DMA_NOT_AVAILABLE, \ + } +#endif /* UART5_DMA_CONFIG */ +#endif /* BSP_UART5_RX_USING_DMA */ + +#ifdef __cplusplus +} +#endif + +#endif /* __UART_CONFIG_H__ */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_common.c b/bsp/stm32/libraries/HAL_Drivers/drv_common.c index f67a498a26..e267b94b24 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_common.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_common.c @@ -5,15 +5,11 @@ * * Change Logs: * Date Author Notes - * 2018-11-7 SummerGift change to new framework + * 2018-11-7 SummerGift first version */ #include "drv_common.h" -#ifdef RT_USING_PIN -#include "drv_gpio.h" -#endif - #ifdef RT_USING_SERIAL #include "drv_usart.h" #endif diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_common.h b/bsp/stm32/libraries/HAL_Drivers/drv_common.h index 751305eb71..bffedddcd0 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_common.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_common.h @@ -14,7 +14,6 @@ #include <rtthread.h> #include <rthw.h> #include <rtdevice.h> -#include <board.h> #ifdef __cplusplus extern "C" { diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_config.h b/bsp/stm32/libraries/HAL_Drivers/drv_config.h index 91f0174e41..969c9c139d 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_config.h @@ -58,6 +58,9 @@ extern "C" { #include "l4/adc_config.h" #include "l4/tim_config.h" #include "l4/pwm_config.h" +#elif defined(SOC_SERIES_STM32G0) +#include "g0/dma_config.h" +#include "g0/uart_config.h" #endif #ifdef __cplusplus diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_dma.h b/bsp/stm32/libraries/HAL_Drivers/drv_dma.h index 719cf80310..91c3c22e91 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_dma.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_dma.h @@ -12,15 +12,14 @@ #define __DRV_DMA_H_ #include <rtthread.h> -#include "rtdevice.h" -#include <rthw.h> -#include <drv_common.h> +#include <board.h> #ifdef __cplusplus extern "C" { #endif -#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) +#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) \ + || defined(SOC_SERIES_STM32G0) #define DMA_INSTANCE_TYPE DMA_Channel_TypeDef #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) #define DMA_INSTANCE_TYPE DMA_Stream_TypeDef diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f4.c b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f4.c index 7664e7a4b4..0bafd5b779 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f4.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f4.c @@ -327,9 +327,9 @@ static int fal_flash_erase_16k(long offset, size_t size); static int fal_flash_erase_64k(long offset, size_t size); static int fal_flash_erase_128k(long offset, size_t size); -const struct fal_flash_dev stm32_onchip_flash_16k = { "onchip_flash_16k", STM32_FLASH_START_ADRESS, FLASH_SIZE_GRANULARITY_16K, (16 * 1024), {NULL, fal_flash_read_16k, fal_flash_write_16k, fal_flash_erase_16k} }; -const struct fal_flash_dev stm32_onchip_flash_64k = { "onchip_flash_64k", STM32_FLASH_START_ADRESS, FLASH_SIZE_GRANULARITY_64K, (64 * 1024), {NULL, fal_flash_read_64k, fal_flash_write_64k, fal_flash_erase_64k} }; -const struct fal_flash_dev stm32_onchip_flash_128k = { "onchip_flash_128k", STM32_FLASH_START_ADRESS, FLASH_SIZE_GRANULARITY_128K, (128 * 1024), {NULL, fal_flash_read_128k, fal_flash_write_128k, fal_flash_erase_128k} }; +const struct fal_flash_dev stm32_onchip_flash_16k = { "onchip_flash_16k", STM32_FLASH_START_ADRESS_16K, FLASH_SIZE_GRANULARITY_16K, (16 * 1024), {NULL, fal_flash_read_16k, fal_flash_write_16k, fal_flash_erase_16k} }; +const struct fal_flash_dev stm32_onchip_flash_64k = { "onchip_flash_64k", STM32_FLASH_START_ADRESS_64K, FLASH_SIZE_GRANULARITY_64K, (64 * 1024), {NULL, fal_flash_read_64k, fal_flash_write_64k, fal_flash_erase_64k} }; +const struct fal_flash_dev stm32_onchip_flash_128k = { "onchip_flash_128k", STM32_FLASH_START_ADRESS_128K, FLASH_SIZE_GRANULARITY_128K, (128 * 1024), {NULL, fal_flash_read_128k, fal_flash_write_128k, fal_flash_erase_128k} }; static int fal_flash_read_16k(long offset, rt_uint8_t *buf, size_t size) { diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f7.c b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f7.c index d71013d3ea..d92e11b583 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f7.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f7.c @@ -253,9 +253,9 @@ static int fal_flash_erase_32k(long offset, size_t size); static int fal_flash_erase_128k(long offset, size_t size); static int fal_flash_erase_256k(long offset, size_t size); -const struct fal_flash_dev stm32_onchip_flash_32k = { "onchip_flash_32k", STM32_FLASH_START_ADRESS, FLASH_SIZE_GRANULARITY_32K, (32 * 1024), {NULL, fal_flash_read_32k, fal_flash_write_32k, fal_flash_erase_32k} }; -const struct fal_flash_dev stm32_onchip_flash_128k = { "onchip_flash_128k", STM32_FLASH_START_ADRESS, FLASH_SIZE_GRANULARITY_128K, (128 * 1024), {NULL, fal_flash_read_128k, fal_flash_write_128k, fal_flash_erase_128k} }; -const struct fal_flash_dev stm32_onchip_flash_256k = { "onchip_flash_256k", STM32_FLASH_START_ADRESS, FLASH_SIZE_GRANULARITY_256K, (256 * 1024), {NULL, fal_flash_read_256k, fal_flash_write_256k, fal_flash_erase_256k} }; +const struct fal_flash_dev stm32_onchip_flash_32k = { "onchip_flash_32k", STM32_FLASH_START_ADRESS_32K, FLASH_SIZE_GRANULARITY_32K, (32 * 1024), {NULL, fal_flash_read_32k, fal_flash_write_32k, fal_flash_erase_32k} }; +const struct fal_flash_dev stm32_onchip_flash_128k = { "onchip_flash_128k", STM32_FLASH_START_ADRESS_128K, FLASH_SIZE_GRANULARITY_128K, (128 * 1024), {NULL, fal_flash_read_128k, fal_flash_write_128k, fal_flash_erase_128k} }; +const struct fal_flash_dev stm32_onchip_flash_256k = { "onchip_flash_256k", STM32_FLASH_START_ADRESS_256K, FLASH_SIZE_GRANULARITY_256K, (256 * 1024), {NULL, fal_flash_read_256k, fal_flash_write_256k, fal_flash_erase_256k} }; static int fal_flash_read_32k(long offset, rt_uint8_t *buf, size_t size) { diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c b/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c index b10eebd393..76cd308299 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c @@ -217,7 +217,7 @@ static const struct pin_index pins[] = static const struct pin_irq_map pin_irq_map[] = { -#if defined(SOC_SERIES_STM32F0) +#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) {GPIO_PIN_0, EXTI0_1_IRQn}, {GPIO_PIN_1, EXTI0_1_IRQn}, {GPIO_PIN_2, EXTI2_3_IRQn}, diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_gpio.h b/bsp/stm32/libraries/HAL_Drivers/drv_gpio.h index a62370cae4..a485dd8bbc 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_gpio.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_gpio.h @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-11-06 balanceTWK change to new framework + * 2018-11-06 balanceTWK first version */ #ifndef __DRV_GPIO_H__ diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_lcd.c b/bsp/stm32/libraries/HAL_Drivers/drv_lcd.c index 42a3aab034..3f6de0286f 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_lcd.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_lcd.c @@ -8,14 +8,11 @@ * 2019-01-08 zylx first version */ -#include <rtthread.h> -#include <rtdevice.h> #include <board.h> #ifdef BSP_USING_LCD #include <lcd_port.h> #include <string.h> -#include "drv_gpio.h" //#define DRV_DEBUG #define LOG_TAG "drv.lcd" diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_log.h b/bsp/stm32/libraries/HAL_Drivers/drv_log.h index 625cac367a..f7461223d7 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_log.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_log.h @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-11-15 SummerGift change to new framework + * 2018-11-15 SummerGift first version */ /* diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_qspi.h b/bsp/stm32/libraries/HAL_Drivers/drv_qspi.h index 28dbf437d1..d4609e3dc9 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_qspi.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_qspi.h @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-11-27 zylx change to new framework + * 2018-11-27 zylx first version */ #ifndef __DRV_QSPI_H_ diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_rtc.c b/bsp/stm32/libraries/HAL_Drivers/drv_rtc.c index c7ffc8d8de..b96d9aa524 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_rtc.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_rtc.c @@ -4,8 +4,8 @@ * SPDX-License-Identifier: Apache-2.0 * * Change Logs: - * Date Author Notes - * 2018-12-04 balanceTWK change to new framework + * Date Author Notes + * 2018-12-04 balanceTWK first version */ #include "board.h" diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c b/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c index c2d7708575..84eccb519b 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c @@ -6,7 +6,7 @@ * Change Logs: * Date Author Notes * 2018-06-22 tyx first - * 2018-12-12 balanceTWK change to new framework + * 2018-12-12 balanceTWK first version */ #include "board.h" diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_sdram.c b/bsp/stm32/libraries/HAL_Drivers/drv_sdram.c index c5964a3fe0..97731ff3b1 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_sdram.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_sdram.c @@ -8,8 +8,6 @@ * 2018-12-04 zylx first version */ -#include <rtthread.h> -#include <rtdevice.h> #include <board.h> #ifdef BSP_USING_SDRAM diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c b/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c index a19c5c2984..819b3b1da0 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-11-08 balanceTWK change to new framework + * 2018-11-08 balanceTWK first version */ #include <board.h> diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h b/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h index dc4238f3d0..e87eec8201 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-11-08 balanceTWK change to new framework + * 2018-11-08 balanceTWK first version */ #ifndef __DRV_I2C__ diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c index 47a2be5abb..fa25402f09 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-10-30 SummerGift change to new framework + * 2018-10-30 SummerGift first version */ #include "board.h" @@ -18,7 +18,8 @@ #define LOG_TAG "drv.usart" #include <drv_log.h> -#if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) && !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) +#if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) \ + && !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && !defined(BSP_USING_LPUART1) #error "Please define at least one BSP_USING_UARTx" /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */ #endif @@ -44,6 +45,9 @@ enum #ifdef BSP_USING_UART5 UART5_INDEX, #endif +#ifdef BSP_USING_LPUART1 + LPUART1_INDEX, +#endif }; static struct stm32_uart_config uart_config[] = @@ -63,6 +67,9 @@ static struct stm32_uart_config uart_config[] = #ifdef BSP_USING_UART5 UART5_CONFIG, #endif +#ifdef BSP_USING_LPUART1 + LPUART1_CONFIG, +#endif }; static struct stm32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0}; @@ -175,7 +182,8 @@ static int stm32_putc(struct rt_serial_device *serial, char c) uart = (struct stm32_uart *)serial->parent.user_data; UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC); -#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \ + || defined(SOC_SERIES_STM32G0) uart->handle.Instance->TDR = c; #else uart->handle.Instance->DR = c; @@ -195,7 +203,8 @@ static int stm32_getc(struct rt_serial_device *serial) ch = -1; if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) { -#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \ + || defined(SOC_SERIES_STM32G0) ch = uart->handle.Instance->RDR & 0xff; #else ch = uart->handle.Instance->DR & 0xff; @@ -271,7 +280,8 @@ static void uart_isr(struct rt_serial_device *serial) { __HAL_UART_CLEAR_PEFLAG(&uart->handle); } -#if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) +#if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) \ + && !defined(SOC_SERIES_STM32G0) if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET) { UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD); @@ -421,6 +431,19 @@ void UART5_DMA_RX_IRQHandler(void) #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */ #endif /* BSP_USING_UART5*/ +#if defined(BSP_USING_LPUART1) +void USART3_4_LPUART1_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + uart_isr(&(uart_obj[LPUART1_INDEX].serial)); + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + #ifdef RT_SERIAL_USING_DMA static void stm32_dma_config(struct rt_serial_device *serial) { @@ -433,7 +456,7 @@ static void stm32_dma_config(struct rt_serial_device *serial) { rt_uint32_t tmpreg= 0x00U; -#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) +#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) /* enable DMA clock && Delay after an RCC peripheral clock enabling*/ SET_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc); tmpreg = READ_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc); @@ -444,10 +467,10 @@ static void stm32_dma_config(struct rt_serial_device *serial) #endif UNUSED(tmpreg); /* To avoid compiler warnings */ } - + __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma.handle); -#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) +#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) uart->dma.handle.Instance = uart->config->dma_rx->Instance; #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) uart->dma.handle.Instance = uart->config->dma_rx->Instance; @@ -579,7 +602,7 @@ int rt_hw_usart_init(void) rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct stm32_uart); struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; rt_err_t result = 0; - + stm32_uart_get_dma_config(); for (int i = 0; i < obj_num; i++) @@ -587,8 +610,8 @@ int rt_hw_usart_init(void) uart_obj[i].config = &uart_config[i]; uart_obj[i].serial.ops = &stm32_uart_ops; uart_obj[i].serial.config = config; - -#if defined(RT_SERIAL_USING_DMA) + +#if defined(RT_SERIAL_USING_DMA) if(uart_obj[i].uart_dma_flag) { /* register UART device */ @@ -597,7 +620,7 @@ int rt_hw_usart_init(void) ,&uart_obj[i]); } else -#endif +#endif { /* register UART device */ result = rt_hw_serial_register(&uart_obj[i].serial,uart_obj[i].config->name, diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usart.h b/bsp/stm32/libraries/HAL_Drivers/drv_usart.h index 80716933fe..ebd6a717f0 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usart.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usart.h @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018.10.30 SummerGift change to new framework + * 2018.10.30 SummerGift first version */ #ifndef __DRV_USART_H__ @@ -19,13 +19,15 @@ int rt_hw_usart_init(void); -#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) +#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) \ + || defined(SOC_SERIES_STM32G0) #define DMA_INSTANCE_TYPE DMA_Channel_TypeDef #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) #define DMA_INSTANCE_TYPE DMA_Stream_TypeDef #endif /* defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) */ -#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4) +#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4) \ + || defined(SOC_SERIES_STM32G0) #define UART_INSTANCE_CLEAR_FUNCTION __HAL_UART_CLEAR_FLAG #elif defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) #define UART_INSTANCE_CLEAR_FUNCTION __HAL_UART_CLEAR_IT |