diff options
Diffstat (limited to 'bsp/stm32/stm32f107-uc-eval/board/board.c')
| -rw-r--r-- | bsp/stm32/stm32f107-uc-eval/board/board.c | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/bsp/stm32/stm32f107-uc-eval/board/board.c b/bsp/stm32/stm32f107-uc-eval/board/board.c new file mode 100644 index 0000000000..a63b070167 --- /dev/null +++ b/bsp/stm32/stm32f107-uc-eval/board/board.c @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-06 SummerGift change to new framework + */ + +#include "board.h" + +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV5; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.Prediv1Source = RCC_PREDIV1_SOURCE_PLL2; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; + RCC_OscInitStruct.PLL2.PLL2State = RCC_PLL2_ON; + RCC_OscInitStruct.PLL2.PLL2MUL = RCC_PLL2_MUL8; + RCC_OscInitStruct.PLL2.HSEPrediv2Value = RCC_HSE_PREDIV2_DIV5; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) + { + Error_Handler(); + } + +} |
