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-rw-r--r--bsp/ultrarisc/arch/ur-cp100/cache.h92
1 files changed, 92 insertions, 0 deletions
diff --git a/bsp/ultrarisc/arch/ur-cp100/cache.h b/bsp/ultrarisc/arch/ur-cp100/cache.h
new file mode 100644
index 0000000000..55d532f958
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+++ b/bsp/ultrarisc/arch/ur-cp100/cache.h
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2006-2025 RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2022-11-09 RT-Thread The first version
+ */
+#ifndef __CACHE_H__
+#define __CACHE_H__
+
+#include <rtdef.h>
+
+/**
+ * @brief These APIs may not be supported by a specified architecture
+ * But we have to include to all the cases to be 'general purpose'
+ */
+
+rt_always_inline void rt_hw_cpu_dcache_clean_local(void *addr, int size)
+{
+ RT_UNUSED(addr);
+ RT_UNUSED(size);
+}
+
+rt_always_inline void rt_hw_cpu_dcache_invalidate_local(void *addr, int size)
+{
+ RT_UNUSED(addr);
+ RT_UNUSED(size);
+}
+
+rt_always_inline void rt_hw_cpu_dcache_clean_and_invalidate_local(void *addr, int size)
+{
+ RT_UNUSED(addr);
+ RT_UNUSED(size);
+}
+
+rt_always_inline void rt_hw_cpu_dcache_clean_all_local(void)
+{
+}
+
+rt_always_inline void rt_hw_cpu_dcache_invalidate_all_local(void)
+{
+}
+
+rt_always_inline void rt_hw_cpu_dcache_clean_and_invalidate_all_local(void)
+{
+}
+
+/*use fence.i to invalidate all icache*/
+rt_always_inline void rt_hw_cpu_icache_invalidate_local(void *addr, int size)
+{
+ __asm__ __volatile__("fence.i" ::: "memory");
+}
+/*use fence.i to invalidate all icache*/
+rt_always_inline void rt_hw_cpu_icache_invalidate_all_local(void)
+{
+ __asm__ __volatile__("fence.i" ::: "memory");
+}
+
+/**
+ * @brief Multi-core
+ */
+
+#define rt_hw_cpu_dcache_clean rt_hw_cpu_dcache_clean_local
+#define rt_hw_cpu_dcache_invalidate rt_hw_cpu_dcache_invalidate_local
+#define rt_hw_cpu_dcache_clean_and_invalidate rt_hw_cpu_dcache_clean_and_invalidate_local
+
+#define rt_hw_cpu_dcache_clean_all rt_hw_cpu_dcache_clean_all_local
+#define rt_hw_cpu_dcache_invalidate_all rt_hw_cpu_dcache_invalidate_all_local
+#define rt_hw_cpu_dcache_clean_and_invalidate_all rt_hw_cpu_dcache_clean_and_invalidate_all_local
+
+#define rt_hw_cpu_icache_invalidate rt_hw_cpu_icache_invalidate_local
+#define rt_hw_cpu_icache_invalidate_all rt_hw_cpu_icache_invalidate_all_local
+
+#define rt_hw_icache_invalidate_all rt_hw_cpu_icache_invalidate_all
+
+/** instruction barrier */
+static inline void rt_hw_cpu_sync(void)
+{
+ __asm__ __volatile__("fence.i" ::: "memory");
+}
+
+/**
+ * @brief local cpu icahce & dcache synchronization
+ *
+ * @param addr
+ * @param size
+ */
+void rt_hw_sync_cache_local(void *addr, int size);
+
+#endif /* __CACHE_H__ */ \ No newline at end of file