diff options
Diffstat (limited to 'bsp/ultrarisc/ur_dp1000_evb/rtconfig.py')
| -rwxr-xr-x | bsp/ultrarisc/ur_dp1000_evb/rtconfig.py | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/bsp/ultrarisc/ur_dp1000_evb/rtconfig.py b/bsp/ultrarisc/ur_dp1000_evb/rtconfig.py new file mode 100755 index 0000000000..c544da9b28 --- /dev/null +++ b/bsp/ultrarisc/ur_dp1000_evb/rtconfig.py @@ -0,0 +1,60 @@ +import os + +# toolchains options +ARCH ='risc-v' +CPU ='ur-cp100' +CROSS_TOOL ='gcc' + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = r'../../..' + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') + +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = os.getenv('RTT_EXEC_PATH') or '/usr/bin' +else: + print('Please make sure your toolchains is GNU GCC!') + exit(0) + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' +CHIP_TYPE = 'ultrarisc' + +if PLATFORM == 'gcc': + # toolchains + #PREFIX = 'riscv64-unknown-elf-' + PREFIX = os.getenv('RTT_CC_PREFIX') or 'riscv64-unknown-elf-' + CC = PREFIX + 'gcc' + CXX = PREFIX + 'g++' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + # + ' -Wl,--no-warn-rwx-segments' + DEVICE = ' -mcmodel=medany -march=rv64gc -mabi=lp64' + CFLAGS = DEVICE + ' -Wno-cpp -ffreestanding -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -D_POSIX_SOURCE ' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__' + LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds' + ' -lsupc++ -lgcc -static' + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -ggdb -fvar-tracking ' + AFLAGS += ' -ggdb' + else: + CFLAGS += ' -O2 -Os' + + CXXFLAGS = CFLAGS + +DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtthread.asm\n' +POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
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