diff options
Diffstat (limited to 'components/drivers/cputime/cputime_cortexm.c')
| -rw-r--r-- | components/drivers/cputime/cputime_cortexm.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/components/drivers/cputime/cputime_cortexm.c b/components/drivers/cputime/cputime_cortexm.c index 05ed6ed447..071acfe9bb 100644 --- a/components/drivers/cputime/cputime_cortexm.c +++ b/components/drivers/cputime/cputime_cortexm.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -19,7 +19,7 @@ static float cortexm_cputime_getres(void) { float ret = 1000 * 1000 * 1000; - + ret = ret / SystemCoreClock; return ret; } @@ -29,7 +29,7 @@ static uint32_t cortexm_cputime_gettime(void) return DWT->CYCCNT; } -const static struct rt_clock_cputime_ops _cortexm_ops = +const static struct rt_clock_cputime_ops _cortexm_ops = { cortexm_cputime_getres, cortexm_cputime_gettime @@ -38,13 +38,13 @@ const static struct rt_clock_cputime_ops _cortexm_ops = int cortexm_cputime_init(void) { /* check support bit */ - if ((DWT->CTRL & (1UL << DWT_CTRL_NOCYCCNT_Pos)) == 0) + if ((DWT->CTRL & (1UL << DWT_CTRL_NOCYCCNT_Pos)) == 0) { /* enable trace*/ CoreDebug->DEMCR |= (1UL << CoreDebug_DEMCR_TRCENA_Pos); - + /* whether cycle counter not enabled */ - if ((DWT->CTRL & (1UL << DWT_CTRL_CYCCNTENA_Pos)) == 0) + if ((DWT->CTRL & (1UL << DWT_CTRL_CYCCNTENA_Pos)) == 0) { /* enable cycle counter */ DWT->CTRL |= (1UL << DWT_CTRL_CYCCNTENA_Pos); |