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-rw-r--r--libcpu/arm/realview-a8-vmm/armv7.h68
-rw-r--r--libcpu/arm/realview-a8-vmm/cp15.h2
-rw-r--r--libcpu/arm/realview-a8-vmm/cpu.c16
-rw-r--r--libcpu/arm/realview-a8-vmm/gic.c2
-rw-r--r--libcpu/arm/realview-a8-vmm/gic.h2
-rw-r--r--libcpu/arm/realview-a8-vmm/interrupt.c2
-rw-r--r--libcpu/arm/realview-a8-vmm/interrupt.h42
-rw-r--r--libcpu/arm/realview-a8-vmm/mmu.c2
-rw-r--r--libcpu/arm/realview-a8-vmm/pmu.c2
-rw-r--r--libcpu/arm/realview-a8-vmm/pmu.h2
-rw-r--r--libcpu/arm/realview-a8-vmm/stack.c2
-rw-r--r--libcpu/arm/realview-a8-vmm/trap.c4
12 files changed, 73 insertions, 73 deletions
diff --git a/libcpu/arm/realview-a8-vmm/armv7.h b/libcpu/arm/realview-a8-vmm/armv7.h
index d22f72fa68..f284bb5255 100644
--- a/libcpu/arm/realview-a8-vmm/armv7.h
+++ b/libcpu/arm/realview-a8-vmm/armv7.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -12,43 +12,43 @@
/* the exception stack without VFP registers */
struct rt_hw_exp_stack
{
- unsigned long r0;
- unsigned long r1;
- unsigned long r2;
- unsigned long r3;
- unsigned long r4;
- unsigned long r5;
- unsigned long r6;
- unsigned long r7;
- unsigned long r8;
- unsigned long r9;
- unsigned long r10;
- unsigned long fp;
- unsigned long ip;
- unsigned long sp;
- unsigned long lr;
- unsigned long pc;
- unsigned long cpsr;
+ unsigned long r0;
+ unsigned long r1;
+ unsigned long r2;
+ unsigned long r3;
+ unsigned long r4;
+ unsigned long r5;
+ unsigned long r6;
+ unsigned long r7;
+ unsigned long r8;
+ unsigned long r9;
+ unsigned long r10;
+ unsigned long fp;
+ unsigned long ip;
+ unsigned long sp;
+ unsigned long lr;
+ unsigned long pc;
+ unsigned long cpsr;
};
struct rt_hw_stack
{
- unsigned long cpsr;
- unsigned long r0;
- unsigned long r1;
- unsigned long r2;
- unsigned long r3;
- unsigned long r4;
- unsigned long r5;
- unsigned long r6;
- unsigned long r7;
- unsigned long r8;
- unsigned long r9;
- unsigned long r10;
- unsigned long fp;
- unsigned long ip;
- unsigned long lr;
- unsigned long pc;
+ unsigned long cpsr;
+ unsigned long r0;
+ unsigned long r1;
+ unsigned long r2;
+ unsigned long r3;
+ unsigned long r4;
+ unsigned long r5;
+ unsigned long r6;
+ unsigned long r7;
+ unsigned long r8;
+ unsigned long r9;
+ unsigned long r10;
+ unsigned long fp;
+ unsigned long ip;
+ unsigned long lr;
+ unsigned long pc;
};
#define USERMODE 0x10
diff --git a/libcpu/arm/realview-a8-vmm/cp15.h b/libcpu/arm/realview-a8-vmm/cp15.h
index 486f38200d..b18331af92 100644
--- a/libcpu/arm/realview-a8-vmm/cp15.h
+++ b/libcpu/arm/realview-a8-vmm/cp15.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
diff --git a/libcpu/arm/realview-a8-vmm/cpu.c b/libcpu/arm/realview-a8-vmm/cpu.c
index 2d78715011..5f82671c1b 100644
--- a/libcpu/arm/realview-a8-vmm/cpu.c
+++ b/libcpu/arm/realview-a8-vmm/cpu.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -20,14 +20,14 @@
/** shutdown CPU */
void rt_hw_cpu_shutdown()
{
- rt_uint32_t level;
- rt_kprintf("shutdown...\n");
+ rt_uint32_t level;
+ rt_kprintf("shutdown...\n");
- level = rt_hw_interrupt_disable();
- while (level)
- {
- RT_ASSERT(0);
- }
+ level = rt_hw_interrupt_disable();
+ while (level)
+ {
+ RT_ASSERT(0);
+ }
}
/*@}*/
diff --git a/libcpu/arm/realview-a8-vmm/gic.c b/libcpu/arm/realview-a8-vmm/gic.c
index 82f87b7e8f..962317821a 100644
--- a/libcpu/arm/realview-a8-vmm/gic.c
+++ b/libcpu/arm/realview-a8-vmm/gic.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
diff --git a/libcpu/arm/realview-a8-vmm/gic.h b/libcpu/arm/realview-a8-vmm/gic.h
index 8fcdf05f6f..7c781ad4d9 100644
--- a/libcpu/arm/realview-a8-vmm/gic.h
+++ b/libcpu/arm/realview-a8-vmm/gic.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
diff --git a/libcpu/arm/realview-a8-vmm/interrupt.c b/libcpu/arm/realview-a8-vmm/interrupt.c
index 5ef0bdc460..d57588644e 100644
--- a/libcpu/arm/realview-a8-vmm/interrupt.c
+++ b/libcpu/arm/realview-a8-vmm/interrupt.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
diff --git a/libcpu/arm/realview-a8-vmm/interrupt.h b/libcpu/arm/realview-a8-vmm/interrupt.h
index 7461f94da0..90f392f407 100644
--- a/libcpu/arm/realview-a8-vmm/interrupt.h
+++ b/libcpu/arm/realview-a8-vmm/interrupt.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -14,28 +14,28 @@
#define INT_IRQ 0x00
#define INT_FIQ 0x01
-#define INTC_REVISION(hw_base) REG32((hw_base) + 0x0)
-#define INTC_SYSCONFIG(hw_base) REG32((hw_base) + 0x10)
-#define INTC_SYSSTATUS(hw_base) REG32((hw_base) + 0x14)
-#define INTC_SIR_IRQ(hw_base) REG32((hw_base) + 0x40)
-#define INTC_SIR_FIQ(hw_base) REG32((hw_base) + 0x44)
-#define INTC_CONTROL(hw_base) REG32((hw_base) + 0x48)
-#define INTC_PROTECTION(hw_base) REG32((hw_base) + 0x4c)
-#define INTC_IDLE(hw_base) REG32((hw_base) + 0x50)
-#define INTC_IRQ_PRIORITY(hw_base) REG32((hw_base) + 0x60)
-#define INTC_FIQ_PRIORITY(hw_base) REG32((hw_base) + 0x64)
-#define INTC_THRESHOLD(hw_base) REG32((hw_base) + 0x68)
-#define INTC_SICR(hw_base) REG32((hw_base) + 0x6c)
-#define INTC_SCR(hw_base, n) REG32((hw_base) + 0x70 + ((n) * 0x04))
-#define INTC_ITR(hw_base, n) REG32((hw_base) + 0x80 + ((n) * 0x20))
-#define INTC_MIR(hw_base, n) REG32((hw_base) + 0x84 + ((n) * 0x20))
-#define INTC_MIR_CLEAR(hw_base, n) REG32((hw_base) + 0x88 + ((n) * 0x20))
-#define INTC_MIR_SET(hw_base, n) REG32((hw_base) + 0x8c + ((n) * 0x20))
-#define INTC_ISR_SET(hw_base, n) REG32((hw_base) + 0x90 + ((n) * 0x20))
-#define INTC_ISR_CLEAR(hw_base, n) REG32((hw_base) + 0x94 + ((n) * 0x20))
+#define INTC_REVISION(hw_base) REG32((hw_base) + 0x0)
+#define INTC_SYSCONFIG(hw_base) REG32((hw_base) + 0x10)
+#define INTC_SYSSTATUS(hw_base) REG32((hw_base) + 0x14)
+#define INTC_SIR_IRQ(hw_base) REG32((hw_base) + 0x40)
+#define INTC_SIR_FIQ(hw_base) REG32((hw_base) + 0x44)
+#define INTC_CONTROL(hw_base) REG32((hw_base) + 0x48)
+#define INTC_PROTECTION(hw_base) REG32((hw_base) + 0x4c)
+#define INTC_IDLE(hw_base) REG32((hw_base) + 0x50)
+#define INTC_IRQ_PRIORITY(hw_base) REG32((hw_base) + 0x60)
+#define INTC_FIQ_PRIORITY(hw_base) REG32((hw_base) + 0x64)
+#define INTC_THRESHOLD(hw_base) REG32((hw_base) + 0x68)
+#define INTC_SICR(hw_base) REG32((hw_base) + 0x6c)
+#define INTC_SCR(hw_base, n) REG32((hw_base) + 0x70 + ((n) * 0x04))
+#define INTC_ITR(hw_base, n) REG32((hw_base) + 0x80 + ((n) * 0x20))
+#define INTC_MIR(hw_base, n) REG32((hw_base) + 0x84 + ((n) * 0x20))
+#define INTC_MIR_CLEAR(hw_base, n) REG32((hw_base) + 0x88 + ((n) * 0x20))
+#define INTC_MIR_SET(hw_base, n) REG32((hw_base) + 0x8c + ((n) * 0x20))
+#define INTC_ISR_SET(hw_base, n) REG32((hw_base) + 0x90 + ((n) * 0x20))
+#define INTC_ISR_CLEAR(hw_base, n) REG32((hw_base) + 0x94 + ((n) * 0x20))
#define INTC_PENDING_IRQ(hw_base, n) REG32((hw_base) + 0x98 + ((n) * 0x20))
#define INTC_PENDING_FIQ(hw_base, n) REG32((hw_base) + 0x9c + ((n) * 0x20))
-#define INTC_ILR(hw_base, n) REG32((hw_base) + 0x100 + ((n) * 0x04))
+#define INTC_ILR(hw_base, n) REG32((hw_base) + 0x100 + ((n) * 0x04))
void rt_hw_interrupt_control(int vector, int priority, int route);
int rt_hw_interrupt_get_active(int fiq_irq);
diff --git a/libcpu/arm/realview-a8-vmm/mmu.c b/libcpu/arm/realview-a8-vmm/mmu.c
index 58acdd8145..f4d6068099 100644
--- a/libcpu/arm/realview-a8-vmm/mmu.c
+++ b/libcpu/arm/realview-a8-vmm/mmu.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
diff --git a/libcpu/arm/realview-a8-vmm/pmu.c b/libcpu/arm/realview-a8-vmm/pmu.c
index 8ffc1dede6..2b9165cc8b 100644
--- a/libcpu/arm/realview-a8-vmm/pmu.c
+++ b/libcpu/arm/realview-a8-vmm/pmu.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
diff --git a/libcpu/arm/realview-a8-vmm/pmu.h b/libcpu/arm/realview-a8-vmm/pmu.h
index fb8390133d..64a74b5d39 100644
--- a/libcpu/arm/realview-a8-vmm/pmu.h
+++ b/libcpu/arm/realview-a8-vmm/pmu.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
diff --git a/libcpu/arm/realview-a8-vmm/stack.c b/libcpu/arm/realview-a8-vmm/stack.c
index 619a16c446..8cf73ac05c 100644
--- a/libcpu/arm/realview-a8-vmm/stack.c
+++ b/libcpu/arm/realview-a8-vmm/stack.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
diff --git a/libcpu/arm/realview-a8-vmm/trap.c b/libcpu/arm/realview-a8-vmm/trap.c
index 4a522f5126..c6ca45aee7 100644
--- a/libcpu/arm/realview-a8-vmm/trap.c
+++ b/libcpu/arm/realview-a8-vmm/trap.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -131,7 +131,7 @@ void rt_hw_trap_resv(struct rt_hw_exp_stack *regs)
rt_hw_cpu_shutdown();
}
-#define GIC_ACK_INTID_MASK 0x000003ff
+#define GIC_ACK_INTID_MASK 0x000003ff
void rt_hw_trap_irq(void)
{
generated by cgit v1.3.1 (git 2.54.0) at 2026-10-24 03:51:14 +0000